| Message ID | 1434386038-9246-5-git-send-email-eric.auger@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
On 15 June 2015 at 17:33, Eric Auger <eric.auger@linaro.org> wrote: > The arm_gic_kvm now calls kvm_irqchip_set_qemuirq_gsi to build > the hash table storing qemu_irq/gsi mappings. From that point on > irqfd can be setup directly from the qemu_irq using > kvm_irqchip_add_irqfd_notifier. > > Signed-off-by: Eric Auger <eric.auger@linaro.org> > Tested-by: Vikram Sethi <vikrams@codeaurora.org> > > --- > v15 -> v16: > - added Vikram's T-b > - Resolve rebase conflict > > v2 -> v3: > - kvm_irqchip_add_qemuirq_irqfd_notifier renamed into > kvm_irqchip_add_irqfd_notifier > --- > hw/intc/arm_gic_kvm.c | 6 ++++++ > 1 file changed, 6 insertions(+) > > diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/arm_gic_kvm.c > index 2cb7d25..f56bff1 100644 > --- a/hw/intc/arm_gic_kvm.c > +++ b/hw/intc/arm_gic_kvm.c > @@ -570,6 +570,12 @@ static void kvm_arm_gic_realize(DeviceState *dev, Error **errp) > */ > i += (GIC_INTERNAL * s->num_cpu); > qdev_init_gpio_in(dev, kvm_arm_gic_set_irq, i); > + > + for (i = 0; i < s->num_irq - GIC_INTERNAL; i++) { > + qemu_irq irq = qdev_get_gpio_in(dev, i); > + kvm_irqchip_set_qemuirq_gsi(kvm_state, irq, i); > + } > + Is there documentation anywhere about what a "GSI" number is for ARM? Is this part of the kernel ABI? thanks -- PMM
On 06/26/2015 01:43 PM, Peter Maydell wrote: > On 15 June 2015 at 17:33, Eric Auger <eric.auger@linaro.org> wrote: >> The arm_gic_kvm now calls kvm_irqchip_set_qemuirq_gsi to build >> the hash table storing qemu_irq/gsi mappings. From that point on >> irqfd can be setup directly from the qemu_irq using >> kvm_irqchip_add_irqfd_notifier. >> >> Signed-off-by: Eric Auger <eric.auger@linaro.org> >> Tested-by: Vikram Sethi <vikrams@codeaurora.org> >> >> --- >> v15 -> v16: >> - added Vikram's T-b >> - Resolve rebase conflict >> >> v2 -> v3: >> - kvm_irqchip_add_qemuirq_irqfd_notifier renamed into >> kvm_irqchip_add_irqfd_notifier >> --- >> hw/intc/arm_gic_kvm.c | 6 ++++++ >> 1 file changed, 6 insertions(+) >> >> diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/arm_gic_kvm.c >> index 2cb7d25..f56bff1 100644 >> --- a/hw/intc/arm_gic_kvm.c >> +++ b/hw/intc/arm_gic_kvm.c >> @@ -570,6 +570,12 @@ static void kvm_arm_gic_realize(DeviceState *dev, Error **errp) >> */ >> i += (GIC_INTERNAL * s->num_cpu); >> qdev_init_gpio_in(dev, kvm_arm_gic_set_irq, i); >> + >> + for (i = 0; i < s->num_irq - GIC_INTERNAL; i++) { >> + qemu_irq irq = qdev_get_gpio_in(dev, i); >> + kvm_irqchip_set_qemuirq_gsi(kvm_state, irq, i); >> + } >> + > > Is there documentation anywhere about what a "GSI" number is > for ARM? Is this part of the kernel ABI? Currently this is documented in kernel Documentation/virtual/kvm/api.txt in the KVM_IRQFD part. With current irqfd/arm implementation this GSI number matches an SPI index. Now we are also working on GSI routing support which will extend that meaning. The related RFC also documents ths gsi in the api.txt Thanks Eric > > thanks > -- PMM >
diff --git a/hw/intc/arm_gic_kvm.c b/hw/intc/arm_gic_kvm.c index 2cb7d25..f56bff1 100644 --- a/hw/intc/arm_gic_kvm.c +++ b/hw/intc/arm_gic_kvm.c @@ -570,6 +570,12 @@ static void kvm_arm_gic_realize(DeviceState *dev, Error **errp) */ i += (GIC_INTERNAL * s->num_cpu); qdev_init_gpio_in(dev, kvm_arm_gic_set_irq, i); + + for (i = 0; i < s->num_irq - GIC_INTERNAL; i++) { + qemu_irq irq = qdev_get_gpio_in(dev, i); + kvm_irqchip_set_qemuirq_gsi(kvm_state, irq, i); + } + /* We never use our outbound IRQ/FIQ lines but provide them so that * we maintain the same interface as the non-KVM GIC. */