diff mbox series

clk: qcom: gcc-msm8996: Mark aggre0 noc clks as critical

Message ID 20171207105922.31986-1-srinivas.kandagatla@linaro.org
State Accepted
Commit 496037c015079ece7ebc1344fcab80f0618eae5e
Headers show
Series clk: qcom: gcc-msm8996: Mark aggre0 noc clks as critical | expand

Commit Message

Srinivas Kandagatla Dec. 7, 2017, 10:59 a.m. UTC 
From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>


aggre0 bus clks are not associated with any of the drivers, so its
important that these clks are always on to get peripherals on this
bus working. So mark them as critical.

Eventually when we have a proper bus driver these clks can be marked
appropriately.

Without this patch pcie on db820c is not functional.

Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

---
 drivers/clk/qcom/gcc-msm8996.c | 8 ++++----
 1 file changed, 4 insertions(+), 4 deletions(-)

-- 
2.15.0

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Comments

Stephen Boyd March 16, 2018, 10:37 p.m. UTC | #1 
Quoting srinivas.kandagatla@linaro.org (2017-12-07 02:59:22)
> From: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

> 

> aggre0 bus clks are not associated with any of the drivers, so its

> important that these clks are always on to get peripherals on this

> bus working. So mark them as critical.

> 

> Eventually when we have a proper bus driver these clks can be marked

> appropriately.

> 

> Without this patch pcie on db820c is not functional.

> 

> Signed-off-by: Srinivas Kandagatla <srinivas.kandagatla@linaro.org>

> ---


Applied to clk-next

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diff mbox series

Patch

diff --git a/drivers/clk/qcom/gcc-msm8996.c b/drivers/clk/qcom/gcc-msm8996.c
index 7ddec886fcd3..0146d8853488 100644
--- a/drivers/clk/qcom/gcc-msm8996.c
+++ b/drivers/clk/qcom/gcc-msm8996.c
@@ -2891,7 +2891,7 @@  static struct clk_branch gcc_aggre0_snoc_axi_clk = {
 			.name = "gcc_aggre0_snoc_axi_clk",
 			.parent_names = (const char *[]){ "system_noc_clk_src" },
 			.num_parents = 1,
-			.flags = CLK_SET_RATE_PARENT,
+			.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
 			.ops = &clk_branch2_ops,
 		},
 	},
@@ -2906,7 +2906,7 @@  static struct clk_branch gcc_aggre0_cnoc_ahb_clk = {
 			.name = "gcc_aggre0_cnoc_ahb_clk",
 			.parent_names = (const char *[]){ "config_noc_clk_src" },
 			.num_parents = 1,
-			.flags = CLK_SET_RATE_PARENT,
+			.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
 			.ops = &clk_branch2_ops,
 		},
 	},
@@ -2921,7 +2921,7 @@  static struct clk_branch gcc_smmu_aggre0_axi_clk = {
 			.name = "gcc_smmu_aggre0_axi_clk",
 			.parent_names = (const char *[]){ "system_noc_clk_src" },
 			.num_parents = 1,
-			.flags = CLK_SET_RATE_PARENT,
+			.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
 			.ops = &clk_branch2_ops,
 		},
 	},
@@ -2936,7 +2936,7 @@  static struct clk_branch gcc_smmu_aggre0_ahb_clk = {
 			.name = "gcc_smmu_aggre0_ahb_clk",
 			.parent_names = (const char *[]){ "config_noc_clk_src" },
 			.num_parents = 1,
-			.flags = CLK_SET_RATE_PARENT,
+			.flags = CLK_SET_RATE_PARENT | CLK_IS_CRITICAL,
 			.ops = &clk_branch2_ops,
 		},
 	},