| Message ID | 1545039990-19984-12-git-send-email-jorge.ramirez-ortiz@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [01/13] clk: qcom: gcc: limit GPLL0_AO_OUT operating frequency | expand |
On Mon 17 Dec 01:46 PST 2018, Jorge Ramirez-Ortiz wrote: > Specify the clocks that feed the APCS mux/divider instead of using > default hardcoded values in the source code. > Reviewed-by: Bjorn Andersson <bjorn.andersson@linaro.org> > Co-developed-by: Niklas Cassel <niklas.cassel@linaro.org> > Signed-off-by: Niklas Cassel <niklas.cassel@linaro.org> > Signed-off-by: Jorge Ramirez-Ortiz <jorge.ramirez-ortiz@linaro.org> > --- > arch/arm64/boot/dts/qcom/qcs404.dtsi | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi > index ec3f6c7..2d9e70e 100644 > --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi > +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi > @@ -373,6 +373,9 @@ > compatible = "qcom,qcs404-apcs-apps-global", "syscon"; > reg = <0x0b011000 0x1000>; > #mbox-cells = <1>; > + clocks = <&gcc GCC_GPLL0_AO_OUT_MAIN>, <&apcs_hfpll>; > + clock-names = "aux", "pll"; > + #clock-cells = <0>; > }; > > apcs_hfpll: clock-controller@0b016000 { > -- > 2.7.4 >
diff --git a/arch/arm64/boot/dts/qcom/qcs404.dtsi b/arch/arm64/boot/dts/qcom/qcs404.dtsi index ec3f6c7..2d9e70e 100644 --- a/arch/arm64/boot/dts/qcom/qcs404.dtsi +++ b/arch/arm64/boot/dts/qcom/qcs404.dtsi @@ -373,6 +373,9 @@ compatible = "qcom,qcs404-apcs-apps-global", "syscon"; reg = <0x0b011000 0x1000>; #mbox-cells = <1>; + clocks = <&gcc GCC_GPLL0_AO_OUT_MAIN>, <&apcs_hfpll>; + clock-names = "aux", "pll"; + #clock-cells = <0>; }; apcs_hfpll: clock-controller@0b016000 {