| Message ID | 20190709121900.25644-1-richard.henderson@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | [for-4.1] tcg: Fix constant folding of INDEX_op_extract2_i32 | expand |
Richard Henderson <richard.henderson@linaro.org> writes: > On a 64-bit host, discard any replications of the 32-bit > sign bit when performing the shift and merge. > > Fixes: https://bugs.launchpad.net/bugs/1834496 > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Tested-by: Alex Bennée <alex.bennee@linaro.org> > --- > tcg/optimize.c | 4 ++-- > 1 file changed, 2 insertions(+), 2 deletions(-) > > diff --git a/tcg/optimize.c b/tcg/optimize.c > index d7c71a6085..d2424de4af 100644 > --- a/tcg/optimize.c > +++ b/tcg/optimize.c > @@ -1213,8 +1213,8 @@ void tcg_optimize(TCGContext *s) > if (opc == INDEX_op_extract2_i64) { > tmp = (v1 >> op->args[3]) | (v2 << (64 - op->args[3])); > } else { > - tmp = (v1 >> op->args[3]) | (v2 << (32 - op->args[3])); > - tmp = (int32_t)tmp; > + tmp = (int32_t)(((uint32_t)v1 >> op->args[3]) | > + ((uint32_t)v2 << (32 - op->args[3]))); > } > tcg_opt_gen_movi(s, op, op->args[0], tmp); > break; -- Alex Bennée
On Tue, 9 Jul 2019 at 15:02, Alex Bennée <alex.bennee@linaro.org> wrote: > > > Richard Henderson <richard.henderson@linaro.org> writes: > > > On a 64-bit host, discard any replications of the 32-bit > > sign bit when performing the shift and merge. > > > > Fixes: https://bugs.launchpad.net/bugs/1834496 > > Signed-off-by: Richard Henderson <richard.henderson@linaro.org> > > Reviewed-by: Alex Bennée <alex.bennee@linaro.org> > Tested-by: Alex Bennée <alex.bennee@linaro.org> > Tested-by: Christophe Lyon <christophe.lyon@linaro.org> Hi, I ran GCC validations with your fix, it does fix the problems I reported with the arm-none-linux-gnueabi target. Unfortunately, we are unlucky because there are still regressions compared to qemu-3.1 when using the arm-none-linux-gnueabihf target, as well as arm-eabi and aarch64-elf. I hoped all had the same root cause..... I'll report the remaining ones in a new launchpad bug. Thanks Christophe > > --- > > tcg/optimize.c | 4 ++-- > > 1 file changed, 2 insertions(+), 2 deletions(-) > > > > diff --git a/tcg/optimize.c b/tcg/optimize.c > > index d7c71a6085..d2424de4af 100644 > > --- a/tcg/optimize.c > > +++ b/tcg/optimize.c > > @@ -1213,8 +1213,8 @@ void tcg_optimize(TCGContext *s) > > if (opc == INDEX_op_extract2_i64) { > > tmp = (v1 >> op->args[3]) | (v2 << (64 - op->args[3])); > > } else { > > - tmp = (v1 >> op->args[3]) | (v2 << (32 - op->args[3])); > > - tmp = (int32_t)tmp; > > + tmp = (int32_t)(((uint32_t)v1 >> op->args[3]) | > > + ((uint32_t)v2 << (32 - op->args[3]))); > > } > > tcg_opt_gen_movi(s, op, op->args[0], tmp); > > break; > > > -- > Alex Bennée
diff --git a/tcg/optimize.c b/tcg/optimize.c index d7c71a6085..d2424de4af 100644 --- a/tcg/optimize.c +++ b/tcg/optimize.c @@ -1213,8 +1213,8 @@ void tcg_optimize(TCGContext *s) if (opc == INDEX_op_extract2_i64) { tmp = (v1 >> op->args[3]) | (v2 << (64 - op->args[3])); } else { - tmp = (v1 >> op->args[3]) | (v2 << (32 - op->args[3])); - tmp = (int32_t)tmp; + tmp = (int32_t)(((uint32_t)v1 >> op->args[3]) | + ((uint32_t)v2 << (32 - op->args[3]))); } tcg_opt_gen_movi(s, op, op->args[0], tmp); break;
On a 64-bit host, discard any replications of the 32-bit sign bit when performing the shift and merge. Fixes: https://bugs.launchpad.net/bugs/1834496 Signed-off-by: Richard Henderson <richard.henderson@linaro.org> --- tcg/optimize.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) -- 2.17.1