diff mbox series

[SVE,aarch64] Add "@" in vcond_mask pattern

Message ID CAAgBjMncK6+H2JxqU69ttpXivvPzyxMZXwYoRWNVcz6Ctv_zUg@mail.gmail.com
State New
Headers show
Series [SVE,aarch64] Add "@" in vcond_mask pattern | expand

Commit Message

Prathamesh Kulkarni Aug. 22, 2019, 5:47 a.m. UTC 
Hi Richard,
I screwed up while committing pr88839 fix, by not including the change
to aarch64-sve.md
that adds "@" to vcond_mask pattern, which resulted in trunk failing to build
with: "gen_vcond_mask" was not declared in this scope -:/
The attached patch resolves the failure.
OK to commit ?

Thanks,
Prathamesh
2019-08-22  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

	* aarch64-sve.md (vcond_mask): Add "@".

Comments

Richard Sandiford Aug. 22, 2019, 8:07 a.m. UTC | #1 
Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org> writes:
> Hi Richard,

> I screwed up while committing pr88839 fix, by not including the change

> to aarch64-sve.md

> that adds "@" to vcond_mask pattern, which resulted in trunk failing to build

> with: "gen_vcond_mask" was not declared in this scope -:/

> The attached patch resolves the failure.

> OK to commit ?


OK, thanks.  (And would have been OK as obvious FWIW.)

Richard

>

> Thanks,

> Prathamesh

>

> 2019-08-22  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

>

> 	* aarch64-sve.md (vcond_mask): Add "@".

>

> diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md

> index ac65e691d73..f58353e9c6d 100644

> --- a/gcc/config/aarch64/aarch64-sve.md

> +++ b/gcc/config/aarch64/aarch64-sve.md

> @@ -3927,7 +3927,7 @@

>  ;; vcond_mask operand order: true, false, mask

>  ;; UNSPEC_SEL operand order: mask, true, false (as for VEC_COND_EXPR)

>  ;; SEL operand order:        mask, true, false

> -(define_expand "vcond_mask_<mode><vpred>"

> +(define_expand "@vcond_mask_<mode><vpred>"

>    [(set (match_operand:SVE_ALL 0 "register_operand")

>  	(unspec:SVE_ALL

>  	  [(match_operand:<VPRED> 3 "register_operand")
diff mbox series

Patch

diff --git a/gcc/config/aarch64/aarch64-sve.md b/gcc/config/aarch64/aarch64-sve.md
index ac65e691d73..f58353e9c6d 100644
--- a/gcc/config/aarch64/aarch64-sve.md
+++ b/gcc/config/aarch64/aarch64-sve.md
@@ -3927,7 +3927,7 @@ 
 ;; vcond_mask operand order: true, false, mask
 ;; UNSPEC_SEL operand order: mask, true, false (as for VEC_COND_EXPR)
 ;; SEL operand order:        mask, true, false
-(define_expand "vcond_mask_<mode><vpred>"
+(define_expand "@vcond_mask_<mode><vpred>"
   [(set (match_operand:SVE_ALL 0 "register_operand")
 	(unspec:SVE_ALL
 	  [(match_operand:<VPRED> 3 "register_operand")