| Message ID | 20191014160404.19553-60-peter.maydell@linaro.org |
|---|---|
| State | Superseded |
| Headers | show |
| Series | target-arm queue | expand |
On Mon, 14 Oct 2019 at 17:05, Peter Maydell <peter.maydell@linaro.org> wrote: > > From: Cédric Le Goater <clg@kaod.org> > > Signed-off-by: Cédric Le Goater <clg@kaod.org> > Reviewed-by: Joel Stanley <joel@jms.id.au> > Message-id: 20190925143248.10000-21-clg@kaod.org > Signed-off-by: Peter Maydell <peter.maydell@linaro.org> > --- > include/hw/arm/aspeed.h | 1 + > hw/arm/aspeed.c | 23 +++++++++++++++++++++++ > 2 files changed, 24 insertions(+) > @@ -455,6 +467,17 @@ static const AspeedBoardConfig aspeed_boards[] = { > .num_cs = 2, > .i2c_init = witherspoon_bmc_i2c_init, > .ram = 512 * MiB, > + }, { > + .name = MACHINE_TYPE_NAME("ast2600-evb"), > + .desc = "Aspeed AST2600 EVB (Cortex A7)", > + .soc_name = "ast2600-a0", > + .hw_strap1 = AST2600_EVB_HW_STRAP1, > + .hw_strap2 = AST2600_EVB_HW_STRAP2, > + .fmc_model = "w25q512jv", > + .spi_model = "mx66u51235f", > + .num_cs = 1, > + .i2c_init = ast2600_evb_i2c_init, > + .ram = 2 * GiB, Hi. I just discovered that this makes 'make check' fail on 32-bit systems, because you can't default to 2GB of RAM for a board: (armhf)pmaydell@mustang-maydell:~/qemu$ ./build/all-a32/arm-softmmu/qemu-system-arm -M ast2600-evb qemu-system-arm: at most 2047 MB RAM can be simulated It's also a pretty rudely large amount of RAM to allocate by default: it caused 'make check' to fail on my OSX box, which is 64-bits but doesn't have huge swathes of free RAM. I'm going to drop this patch from my queue and redo the pullreq. thanks -- PMM
On 15/10/2019 19:03, Peter Maydell wrote: > On Mon, 14 Oct 2019 at 17:05, Peter Maydell <peter.maydell@linaro.org> wrote: >> >> From: Cédric Le Goater <clg@kaod.org> >> >> Signed-off-by: Cédric Le Goater <clg@kaod.org> >> Reviewed-by: Joel Stanley <joel@jms.id.au> >> Message-id: 20190925143248.10000-21-clg@kaod.org >> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> >> --- >> include/hw/arm/aspeed.h | 1 + >> hw/arm/aspeed.c | 23 +++++++++++++++++++++++ >> 2 files changed, 24 insertions(+) > >> @@ -455,6 +467,17 @@ static const AspeedBoardConfig aspeed_boards[] = { >> .num_cs = 2, >> .i2c_init = witherspoon_bmc_i2c_init, >> .ram = 512 * MiB, >> + }, { >> + .name = MACHINE_TYPE_NAME("ast2600-evb"), >> + .desc = "Aspeed AST2600 EVB (Cortex A7)", >> + .soc_name = "ast2600-a0", >> + .hw_strap1 = AST2600_EVB_HW_STRAP1, >> + .hw_strap2 = AST2600_EVB_HW_STRAP2, >> + .fmc_model = "w25q512jv", >> + .spi_model = "mx66u51235f", >> + .num_cs = 1, >> + .i2c_init = ast2600_evb_i2c_init, >> + .ram = 2 * GiB, > > Hi. I just discovered that this makes 'make check' fail on > 32-bit systems, because you can't default to 2GB of RAM > for a board: > > (armhf)pmaydell@mustang-maydell:~/qemu$ > ./build/all-a32/arm-softmmu/qemu-system-arm -M ast2600-evb > qemu-system-arm: at most 2047 MB RAM can be simulated > > It's also a pretty rudely large amount of RAM to allocate > by default: it caused 'make check' to fail on my OSX > box, which is 64-bits but doesn't have huge swathes > of free RAM. > > I'm going to drop this patch from my queue and redo > the pullreq. ok. We do have such a board. What do you suggest ? We can lower the RAM to 1G for QEMU. Thanks, C. U-Boot 2019.04-00299-g7eb9da617d8e (Aug 21 2019 - 17:46:13 +0930) SOC : AST2600-A0 RST : WDT1 SOC PCI RST : #1 #2 eSPI Mode : SIO:Enable : SuperIO-2e Eth : MAC0: RGMII ,MAC1: RGMII ,MAC2: RGMII ,MAC3: RGMII Model: Aspeed BMC DRAM: 2 GiB WARNING: Caches not enabled MMC: emmc_slot0@100: 0 Loading Environment from SPI Flash... SF: Detected w25q512jv with page size 256 Bytes, erase size 4 KiB, total 64 MiB OK In: serial@1e784000 Out: serial@1e784000 Err: serial@1e784000 Model: Aspeed BMC Net: eth1: ftgmac@1e680000, eth2: ftgmac@1e670000 Warning: ftgmac@1e690000 (eth3) using random MAC address - 96:5c:26:8e:5e:0a , eth3: ftgmac@1e690000 Hit any key to stop autoboot: 0
On Tue, 15 Oct 2019 at 18:43, Cédric Le Goater <clg@kaod.org> wrote: > On 15/10/2019 19:03, Peter Maydell wrote: > > On Mon, 14 Oct 2019 at 17:05, Peter Maydell <peter.maydell@linaro.org> wrote: > > (armhf)pmaydell@mustang-maydell:~/qemu$ > > ./build/all-a32/arm-softmmu/qemu-system-arm -M ast2600-evb > > qemu-system-arm: at most 2047 MB RAM can be simulated > > > > It's also a pretty rudely large amount of RAM to allocate > > by default: it caused 'make check' to fail on my OSX > > box, which is 64-bits but doesn't have huge swathes > > of free RAM. > > > > I'm going to drop this patch from my queue and redo > > the pullreq. > > ok. We do have such a board. > > What do you suggest ? We can lower the RAM to 1G for QEMU. 1GB is OK -- we have several machines that set default_ram_size to that. If we want to handle more generally boards which have a larger ram size by default then we probably need to work on the 'make check' infrastructure -- right now we have a generic test that just checks "can we instantiate every machine model", which is what's falling over. thanks -- PMM
On Tue, 15 Oct 2019 at 17:55, Peter Maydell <peter.maydell@linaro.org> wrote: > > On Tue, 15 Oct 2019 at 18:43, Cédric Le Goater <clg@kaod.org> wrote: > > On 15/10/2019 19:03, Peter Maydell wrote: > > > On Mon, 14 Oct 2019 at 17:05, Peter Maydell <peter.maydell@linaro.org> wrote: > > > (armhf)pmaydell@mustang-maydell:~/qemu$ > > > ./build/all-a32/arm-softmmu/qemu-system-arm -M ast2600-evb > > > qemu-system-arm: at most 2047 MB RAM can be simulated > > > > > > It's also a pretty rudely large amount of RAM to allocate > > > by default: it caused 'make check' to fail on my OSX > > > box, which is 64-bits but doesn't have huge swathes > > > of free RAM. > > > > > > I'm going to drop this patch from my queue and redo > > > the pullreq. > > > > ok. We do have such a board. > > > > What do you suggest ? We can lower the RAM to 1G for QEMU. > > 1GB is OK -- we have several machines that set default_ram_size to that. > > If we want to handle more generally boards which have a > larger ram size by default then we probably need to > work on the 'make check' infrastructure -- right now we > have a generic test that just checks "can we instantiate > every machine model", which is what's falling over. I hit this when bumping the RAM size for the powernv machine too. In that case it was a convenient size given the memory layout we have, so changing to be less than 2GB was not making the model less accurate. For the ast2600evb machine, the board actually has 2GB of RAM, and it's useful for guests to test in this environment. I'd not had any reports of it failing to launch due to a failed memory allocation, which I guess is indicative of the systems people who use the model have. Peter, did you have any thoughts on how to exclude such guests from testing in environments where memory is limited? Cheers, Joel
Hi Peter, On 10/15/19 7:03 PM, Peter Maydell wrote: > On Mon, 14 Oct 2019 at 17:05, Peter Maydell <peter.maydell@linaro.org> wrote: >> >> From: Cédric Le Goater <clg@kaod.org> >> >> Signed-off-by: Cédric Le Goater <clg@kaod.org> >> Reviewed-by: Joel Stanley <joel@jms.id.au> >> Message-id: 20190925143248.10000-21-clg@kaod.org >> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> >> --- >> include/hw/arm/aspeed.h | 1 + >> hw/arm/aspeed.c | 23 +++++++++++++++++++++++ >> 2 files changed, 24 insertions(+) > >> @@ -455,6 +467,17 @@ static const AspeedBoardConfig aspeed_boards[] = { >> .num_cs = 2, >> .i2c_init = witherspoon_bmc_i2c_init, >> .ram = 512 * MiB, >> + }, { >> + .name = MACHINE_TYPE_NAME("ast2600-evb"), >> + .desc = "Aspeed AST2600 EVB (Cortex A7)", >> + .soc_name = "ast2600-a0", >> + .hw_strap1 = AST2600_EVB_HW_STRAP1, >> + .hw_strap2 = AST2600_EVB_HW_STRAP2, >> + .fmc_model = "w25q512jv", >> + .spi_model = "mx66u51235f", >> + .num_cs = 1, >> + .i2c_init = ast2600_evb_i2c_init, >> + .ram = 2 * GiB, > > Hi. I just discovered that this makes 'make check' fail on > 32-bit systems, because you can't default to 2GB of RAM > for a board: > > (armhf)pmaydell@mustang-maydell:~/qemu$ > ./build/all-a32/arm-softmmu/qemu-system-arm -M ast2600-evb > qemu-system-arm: at most 2047 MB RAM can be simulated > > It's also a pretty rudely large amount of RAM to allocate > by default: it caused 'make check' to fail on my OSX > box, which is 64-bits but doesn't have huge swathes > of free RAM. It is unlikely you use this board on a 32-bit system... You usually prefer to have modeled hardware matching real-life, what about making this board not available on 32-bit systems (we will soon have more boards like this): #if HOST_LONG_BITS > 32 { .name = MACHINE_TYPE_NAME("ast2600-evb"), .desc = "Aspeed AST2600 EVB (Cortex A7)", ... }, #endif /* HOST_LONG_BITS > 32 */ Regards, Phil.
On 16/10/2019 14:20, Philippe Mathieu-Daudé wrote: > Hi Peter, > > On 10/15/19 7:03 PM, Peter Maydell wrote: >> On Mon, 14 Oct 2019 at 17:05, Peter Maydell <peter.maydell@linaro.org> wrote: >>> >>> From: Cédric Le Goater <clg@kaod.org> >>> >>> Signed-off-by: Cédric Le Goater <clg@kaod.org> >>> Reviewed-by: Joel Stanley <joel@jms.id.au> >>> Message-id: 20190925143248.10000-21-clg@kaod.org >>> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> >>> --- >>> include/hw/arm/aspeed.h | 1 + >>> hw/arm/aspeed.c | 23 +++++++++++++++++++++++ >>> 2 files changed, 24 insertions(+) >> >>> @@ -455,6 +467,17 @@ static const AspeedBoardConfig aspeed_boards[] = { >>> .num_cs = 2, >>> .i2c_init = witherspoon_bmc_i2c_init, >>> .ram = 512 * MiB, >>> + }, { >>> + .name = MACHINE_TYPE_NAME("ast2600-evb"), >>> + .desc = "Aspeed AST2600 EVB (Cortex A7)", >>> + .soc_name = "ast2600-a0", >>> + .hw_strap1 = AST2600_EVB_HW_STRAP1, >>> + .hw_strap2 = AST2600_EVB_HW_STRAP2, >>> + .fmc_model = "w25q512jv", >>> + .spi_model = "mx66u51235f", >>> + .num_cs = 1, >>> + .i2c_init = ast2600_evb_i2c_init, >>> + .ram = 2 * GiB, >> >> Hi. I just discovered that this makes 'make check' fail on >> 32-bit systems, because you can't default to 2GB of RAM >> for a board: >> >> (armhf)pmaydell@mustang-maydell:~/qemu$ >> ./build/all-a32/arm-softmmu/qemu-system-arm -M ast2600-evb >> qemu-system-arm: at most 2047 MB RAM can be simulated >> >> It's also a pretty rudely large amount of RAM to allocate >> by default: it caused 'make check' to fail on my OSX >> box, which is 64-bits but doesn't have huge swathes >> of free RAM. > > It is unlikely you use this board on a 32-bit system... > > You usually prefer to have modeled hardware matching real-life, > what about making this board not available on 32-bit systems > (we will soon have more boards like this): > > #if HOST_LONG_BITS > 32 > { > .name = MACHINE_TYPE_NAME("ast2600-evb"), > .desc = "Aspeed AST2600 EVB (Cortex A7)", > ... > }, > #endif /* HOST_LONG_BITS > 32 */ I sent a patch to lower the default RAM size to 1G but you can always increase it on the command line. Making the machine available seems a better choice but that's fine with me if we prefer to restrict its use to 64bits hosts. As you wish. C.
On 10/16/19 2:41 PM, Cédric Le Goater wrote: > On 16/10/2019 14:20, Philippe Mathieu-Daudé wrote: >> Hi Peter, >> >> On 10/15/19 7:03 PM, Peter Maydell wrote: >>> On Mon, 14 Oct 2019 at 17:05, Peter Maydell <peter.maydell@linaro.org> wrote: >>>> >>>> From: Cédric Le Goater <clg@kaod.org> >>>> >>>> Signed-off-by: Cédric Le Goater <clg@kaod.org> >>>> Reviewed-by: Joel Stanley <joel@jms.id.au> >>>> Message-id: 20190925143248.10000-21-clg@kaod.org >>>> Signed-off-by: Peter Maydell <peter.maydell@linaro.org> >>>> --- >>>> include/hw/arm/aspeed.h | 1 + >>>> hw/arm/aspeed.c | 23 +++++++++++++++++++++++ >>>> 2 files changed, 24 insertions(+) >>> >>>> @@ -455,6 +467,17 @@ static const AspeedBoardConfig aspeed_boards[] = { >>>> .num_cs = 2, >>>> .i2c_init = witherspoon_bmc_i2c_init, >>>> .ram = 512 * MiB, >>>> + }, { >>>> + .name = MACHINE_TYPE_NAME("ast2600-evb"), >>>> + .desc = "Aspeed AST2600 EVB (Cortex A7)", >>>> + .soc_name = "ast2600-a0", >>>> + .hw_strap1 = AST2600_EVB_HW_STRAP1, >>>> + .hw_strap2 = AST2600_EVB_HW_STRAP2, >>>> + .fmc_model = "w25q512jv", >>>> + .spi_model = "mx66u51235f", >>>> + .num_cs = 1, >>>> + .i2c_init = ast2600_evb_i2c_init, >>>> + .ram = 2 * GiB, >>> >>> Hi. I just discovered that this makes 'make check' fail on >>> 32-bit systems, because you can't default to 2GB of RAM >>> for a board: >>> >>> (armhf)pmaydell@mustang-maydell:~/qemu$ >>> ./build/all-a32/arm-softmmu/qemu-system-arm -M ast2600-evb >>> qemu-system-arm: at most 2047 MB RAM can be simulated >>> >>> It's also a pretty rudely large amount of RAM to allocate >>> by default: it caused 'make check' to fail on my OSX >>> box, which is 64-bits but doesn't have huge swathes >>> of free RAM. >> >> It is unlikely you use this board on a 32-bit system... >> >> You usually prefer to have modeled hardware matching real-life, >> what about making this board not available on 32-bit systems >> (we will soon have more boards like this): >> >> #if HOST_LONG_BITS > 32 >> { >> .name = MACHINE_TYPE_NAME("ast2600-evb"), >> .desc = "Aspeed AST2600 EVB (Cortex A7)", >> ... >> }, >> #endif /* HOST_LONG_BITS > 32 */ > > I sent a patch to lower the default RAM size to 1G but you can always > increase it on the command line. > > Making the machine available seems a better choice but that's fine with > me if we prefer to restrict its use to 64bits hosts. As you wish. I'd rather keep models consistent with real hardware and not cripple them to test them on unlikely setups.
diff --git a/include/hw/arm/aspeed.h b/include/hw/arm/aspeed.h index 02073a6b4d6..f49bc7081e4 100644 --- a/include/hw/arm/aspeed.h +++ b/include/hw/arm/aspeed.h @@ -18,6 +18,7 @@ typedef struct AspeedBoardConfig { const char *desc; const char *soc_name; uint32_t hw_strap1; + uint32_t hw_strap2; const char *fmc_model; const char *spi_model; uint32_t num_cs; diff --git a/hw/arm/aspeed.c b/hw/arm/aspeed.c index 52993f84b46..65453278a75 100644 --- a/hw/arm/aspeed.c +++ b/hw/arm/aspeed.c @@ -88,6 +88,10 @@ struct AspeedBoardState { /* Witherspoon hardware value: 0xF10AD216 (but use romulus definition) */ #define WITHERSPOON_BMC_HW_STRAP1 ROMULUS_BMC_HW_STRAP1 +/* AST2600 evb hardware value */ +#define AST2600_EVB_HW_STRAP1 0x000000C0 +#define AST2600_EVB_HW_STRAP2 0x00000003 + /* * The max ram region is for firmwares that scan the address space * with load/store to guess how much RAM the SoC has. @@ -187,6 +191,8 @@ static void aspeed_board_init(MachineState *machine, &error_abort); object_property_set_int(OBJECT(&bmc->soc), cfg->hw_strap1, "hw-strap1", &error_abort); + object_property_set_int(OBJECT(&bmc->soc), cfg->hw_strap2, "hw-strap2", + &error_abort); object_property_set_int(OBJECT(&bmc->soc), cfg->num_cs, "num-cs", &error_abort); object_property_set_int(OBJECT(&bmc->soc), machine->smp.cpus, "num-cpus", @@ -308,6 +314,12 @@ static void ast2500_evb_i2c_init(AspeedBoardState *bmc) i2c_create_slave(aspeed_i2c_get_bus(DEVICE(&soc->i2c), 11), "ds1338", 0x32); } +static void ast2600_evb_i2c_init(AspeedBoardState *bmc) +{ + /* Start with some devices on our I2C busses */ + ast2500_evb_i2c_init(bmc); +} + static void romulus_bmc_i2c_init(AspeedBoardState *bmc) { AspeedSoCState *soc = &bmc->soc; @@ -455,6 +467,17 @@ static const AspeedBoardConfig aspeed_boards[] = { .num_cs = 2, .i2c_init = witherspoon_bmc_i2c_init, .ram = 512 * MiB, + }, { + .name = MACHINE_TYPE_NAME("ast2600-evb"), + .desc = "Aspeed AST2600 EVB (Cortex A7)", + .soc_name = "ast2600-a0", + .hw_strap1 = AST2600_EVB_HW_STRAP1, + .hw_strap2 = AST2600_EVB_HW_STRAP2, + .fmc_model = "w25q512jv", + .spi_model = "mx66u51235f", + .num_cs = 1, + .i2c_init = ast2600_evb_i2c_init, + .ram = 2 * GiB, }, };