diff mbox series

[2/6] ARM: ep93xx: enable SPARSE_IRQ

Message ID 20191018163047.1284736-2-arnd@arndb.de
State New
Headers show
Series ARM: platform cleanup | expand

Commit Message

Arnd Bergmann Oct. 18, 2019, 4:29 p.m. UTC 
Without CONFIG_SPARSE_IRQ, we rely on mach/irqs.h to define NR_IRQS
globally. Do the minimal conversion by setting .nr_irqs in each
machine descriptor.

Only the vision_ep9307 machine has extra IRQs for GPIOs, so make
.nr_irqs the original value there, while using the plain NR_EP93XX_IRQS
everywhere else.

---
It's been a while since I did this, no idea what else is needed
here or if this is correct at all.

Cc: Hartley Sweeten <hsweeten@visionengravers.com>
Cc: Alexander Sverdlin <alexander.sverdlin@gmail.com>
Cc: Hubert Feurstein <hubert.feurstein@contec.at>
Cc: Lukasz Majewski <lukma@denx.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>

---
 arch/arm/Kconfig                               | 2 ++
 arch/arm/mach-ep93xx/adssphere.c               | 1 +
 arch/arm/mach-ep93xx/edb93xx.c                 | 8 ++++++++
 arch/arm/mach-ep93xx/gesbc9312.c               | 1 +
 arch/arm/mach-ep93xx/{include/mach => }/irqs.h | 7 -------
 arch/arm/mach-ep93xx/micro9.c                  | 4 ++++
 arch/arm/mach-ep93xx/simone.c                  | 1 +
 arch/arm/mach-ep93xx/snappercl15.c             | 1 +
 arch/arm/mach-ep93xx/soc.h                     | 1 +
 arch/arm/mach-ep93xx/ts72xx.c                  | 3 ++-
 arch/arm/mach-ep93xx/vision_ep9307.c           | 1 +
 11 files changed, 22 insertions(+), 8 deletions(-)
 rename arch/arm/mach-ep93xx/{include/mach => }/irqs.h (94%)

-- 
2.20.0

Comments

Alexander Sverdlin Oct. 19, 2019, 4:42 p.m. UTC | #1 
Hello Arnd,

On Fri, 18 Oct 2019 18:29:15 +0200
Arnd Bergmann <arnd@arndb.de> wrote:

> Without CONFIG_SPARSE_IRQ, we rely on mach/irqs.h to define NR_IRQS

> globally. Do the minimal conversion by setting .nr_irqs in each

> machine descriptor.

> 

> Only the vision_ep9307 machine has extra IRQs for GPIOs, so make

> .nr_irqs the original value there, while using the plain NR_EP93XX_IRQS

> everywhere else.


This patch causes multiple problems on EDB9302:

1. WARNINGs during gpiochip registration, for instance:

------------[ cut here ]------------
WARNING: CPU: 0 PID: 1 at kernel/irq/chip.c:1013 __irq_do_set_handler+0x94/0x188
CPU: 0 PID: 1 Comm: swapper Tainted: G        W         5.4.0-rc3 #1
Hardware name: Cirrus Logic EDB9302 Evaluation Board
[<c000e878>] (unwind_backtrace) from [<c000d574>] (show_stack+0x10/0x18)
[<c000d574>] (show_stack) from [<c0335e28>] (dump_stack+0x18/0x24)
[<c0335e28>] (dump_stack) from [<c001cf1c>] (__warn+0xa4/0xc8)
[<c001cf1c>] (__warn) from [<c001cfe8>] (warn_slowpath_fmt+0xa8/0xb8)
[<c001cfe8>] (warn_slowpath_fmt) from [<c0055668>] (__irq_do_set_handler+0x94/0x188)
[<c0055668>] (__irq_do_set_handler) from [<c005647c>] (irq_set_chained_handler_and_data+0x48/0x7c)
[<c005647c>] (irq_set_chained_handler_and_data) from [<c01ab440>] (gpiochip_add_data_with_key+0x6d4/0xabc)
[<c01ab440>] (gpiochip_add_data_with_key) from [<c01ab868>] (devm_gpiochip_add_data+0x40/0x88)
[<c01ab868>] (devm_gpiochip_add_data) from [<c01ae554>] (ep93xx_gpio_probe+0x1ac/0x280)
[<c01ae554>] (ep93xx_gpio_probe) from [<c01e0f34>] (platform_drv_probe+0x28/0x6c)
[<c01e0f34>] (platform_drv_probe) from [<c01df588>] (really_probe+0x1c8/0x340)
[<c01df588>] (really_probe) from [<c01ddfe4>] (bus_for_each_drv+0x58/0xc0)
[<c01ddfe4>] (bus_for_each_drv) from [<c01df904>] (__device_attach+0xb4/0x104)
[<c01df904>] (__device_attach) from [<c01de1d4>] (bus_probe_device+0x8c/0x94)
[<c01de1d4>] (bus_probe_device) from [<c01db5e4>] (device_add+0x3d0/0x59c)
[<c01db5e4>] (device_add) from [<c01e16d8>] (platform_device_add+0x100/0x20c)
[<c01e16d8>] (platform_device_add) from [<c03f50b0>] (ep93xx_init_devices+0x16c/0x20c)
[<c03f50b0>] (ep93xx_init_devices) from [<c03f53a0>] (edb93xx_init_machine+0xc/0x84)
[<c03f53a0>] (edb93xx_init_machine) from [<c03f1984>] (customize_machine+0x20/0x38)
[<c03f1984>] (customize_machine) from [<c03f0e54>] (do_one_initcall+0x78/0x1a0)
[<c03f0e54>] (do_one_initcall) from [<c03f1080>] (kernel_init_freeable+0x104/0x1b8)
[<c03f1080>] (kernel_init_freeable) from [<c034c358>] (kernel_init+0x8/0xf8)
[<c034c358>] (kernel_init) from [<c00090d0>] (ret_from_fork+0x14/0x24)
Exception stack(0xc4433fb0 to 0xc4433ff8)
3fa0:                                     00000000 00000000 00000000 00000000
3fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000
3fe0: 00000000 00000000 00000000 00000000 00000013 00000000
---[ end trace 8f9e35e2d6224882 ]---

2. Broken sound (I2S), this looks like below in the log:

ep93xx-i2s ep93xx-i2s: Missing dma channel for stream: 0
 CS4271: ASoC: pcm constructor failed: -22
edb93xx-audio edb93xx-audio: ASoC: can't create pcm CS4271 HiFi :-22

And /proc/interrupts has two entries less. Without patch:

# cat /proc/interrupts
           CPU0       
  7:          0       VIC   7 Edge      i2s-pcm-out
  8:          0       VIC   8 Edge      i2s-pcm-in
 39:          2       VIC   7 Edge      eth0
 51:       7532       VIC  19 Edge      ep93xx timer
 52:        144       VIC  20 Edge      uart-pl010
 53:          4       VIC  21 Edge      ep93xx-spi
 60:          0       VIC  28 Edge      ep93xx-i2s
Err:          0

With patch:

# cat /proc/interrupts 
           CPU0       
 39:        146       VIC   7 Edge      eth0
 51:     162161       VIC  19 Edge      ep93xx timer
 52:        139       VIC  20 Edge      uart-pl010
 53:          4       VIC  21 Edge      ep93xx-spi
 60:          0       VIC  28 Edge      ep93xx-i2s
Err:          0

I will try to look into I2S problem...
 
> ---

> It's been a while since I did this, no idea what else is needed

> here or if this is correct at all.

> 

> Cc: Hartley Sweeten <hsweeten@visionengravers.com>

> Cc: Alexander Sverdlin <alexander.sverdlin@gmail.com>

> Cc: Hubert Feurstein <hubert.feurstein@contec.at>

> Cc: Lukasz Majewski <lukma@denx.de>

> Signed-off-by: Arnd Bergmann <arnd@arndb.de>

> ---

>  arch/arm/Kconfig                               | 2 ++

>  arch/arm/mach-ep93xx/adssphere.c               | 1 +

>  arch/arm/mach-ep93xx/edb93xx.c                 | 8 ++++++++

>  arch/arm/mach-ep93xx/gesbc9312.c               | 1 +

>  arch/arm/mach-ep93xx/{include/mach => }/irqs.h | 7 -------

>  arch/arm/mach-ep93xx/micro9.c                  | 4 ++++

>  arch/arm/mach-ep93xx/simone.c                  | 1 +

>  arch/arm/mach-ep93xx/snappercl15.c             | 1 +

>  arch/arm/mach-ep93xx/soc.h                     | 1 +

>  arch/arm/mach-ep93xx/ts72xx.c                  | 3 ++-

>  arch/arm/mach-ep93xx/vision_ep9307.c           | 1 +

>  11 files changed, 22 insertions(+), 8 deletions(-)

>  rename arch/arm/mach-ep93xx/{include/mach => }/irqs.h (94%)


-- 
Alexander Sverdlin.
Arnd Bergmann Oct. 19, 2019, 8:08 p.m. UTC | #2 
On Sat, Oct 19, 2019 at 6:43 PM Alexander Sverdlin
<alexander.sverdlin@gmail.com> wrote:
> On Fri, 18 Oct 2019 18:29:15 +0200

> Arnd Bergmann <arnd@arndb.de> wrote:

>

> > Without CONFIG_SPARSE_IRQ, we rely on mach/irqs.h to define NR_IRQS

> > globally. Do the minimal conversion by setting .nr_irqs in each

> > machine descriptor.

> >

> > Only the vision_ep9307 machine has extra IRQs for GPIOs, so make

> > .nr_irqs the original value there, while using the plain NR_EP93XX_IRQS

> > everywhere else.

>

> This patch causes multiple problems on EDB9302:

>

> 1. WARNINGs during gpiochip registration, for instance:

>

> ------------[ cut here ]------------

> WARNING: CPU: 0 PID: 1 at kernel/irq/chip.c:1013 __irq_do_set_handler+0x94/0x188

> CPU: 0 PID: 1 Comm: swapper Tainted: G        W         5.4.0-rc3 #1

> Hardware name: Cirrus Logic EDB9302 Evaluation Board

> [<c000e878>] (unwind_backtrace) from [<c000d574>] (show_stack+0x10/0x18)

> [<c000d574>] (show_stack) from [<c0335e28>] (dump_stack+0x18/0x24)

> [<c0335e28>] (dump_stack) from [<c001cf1c>] (__warn+0xa4/0xc8)

> [<c001cf1c>] (__warn) from [<c001cfe8>] (warn_slowpath_fmt+0xa8/0xb8)

> [<c001cfe8>] (warn_slowpath_fmt) from [<c0055668>] (__irq_do_set_handler+0x94/0x188)

> [<c0055668>] (__irq_do_set_handler) from [<c005647c>] (irq_set_chained_handler_and_data+0x48/0x7c)

> [<c005647c>] (irq_set_chained_handler_and_data) from [<c01ab440>] (gpiochip_add_data_with_key+0x6d4/0xabc)

> [<c01ab440>] (gpiochip_add_data_with_key) from [<c01ab868>] (devm_gpiochip_add_data+0x40/0x88)

> [<c01ab868>] (devm_gpiochip_add_data) from [<c01ae554>] (ep93xx_gpio_probe+0x1ac/0x280)

> [<c01ae554>] (ep93xx_gpio_probe) from [<c01e0f34>] (platform_drv_probe+0x28/0x6c)

> [<c01e0f34>] (platform_drv_probe) from [<c01df588>] (really_probe+0x1c8/0x340)

> [<c01df588>] (really_probe) from [<c01ddfe4>] (bus_for_each_drv+0x58/0xc0)

> [<c01ddfe4>] (bus_for_each_drv) from [<c01df904>] (__device_attach+0xb4/0x104)

> [<c01df904>] (__device_attach) from [<c01de1d4>] (bus_probe_device+0x8c/0x94)

> [<c01de1d4>] (bus_probe_device) from [<c01db5e4>] (device_add+0x3d0/0x59c)

> [<c01db5e4>] (device_add) from [<c01e16d8>] (platform_device_add+0x100/0x20c)

> [<c01e16d8>] (platform_device_add) from [<c03f50b0>] (ep93xx_init_devices+0x16c/0x20c)

> [<c03f50b0>] (ep93xx_init_devices) from [<c03f53a0>] (edb93xx_init_machine+0xc/0x84)

> [<c03f53a0>] (edb93xx_init_machine) from [<c03f1984>] (customize_machine+0x20/0x38)

> [<c03f1984>] (customize_machine) from [<c03f0e54>] (do_one_initcall+0x78/0x1a0)

> [<c03f0e54>] (do_one_initcall) from [<c03f1080>] (kernel_init_freeable+0x104/0x1b8)

> [<c03f1080>] (kernel_init_freeable) from [<c034c358>] (kernel_init+0x8/0xf8)

> [<c034c358>] (kernel_init) from [<c00090d0>] (ret_from_fork+0x14/0x24)

> Exception stack(0xc4433fb0 to 0xc4433ff8)

> 3fa0:                                     00000000 00000000 00000000 00000000

> 3fc0: 00000000 00000000 00000000 00000000 00000000 00000000 00000000 00000000

> 3fe0: 00000000 00000000 00000000 00000000 00000013 00000000

> ---[ end trace 8f9e35e2d6224882 ]---


My first guess would be that this is just the missing irq domain code:

diff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig
index 38e096e6925f..7c195af6f75d 100644
--- a/drivers/gpio/Kconfig
+++ b/drivers/gpio/Kconfig
@@ -205,6 +205,7 @@ config GPIO_EP93XX
        depends on ARCH_EP93XX
        select GPIO_GENERIC
        select GPIOLIB_IRQCHIP
+       select IRQ_DOMAIN_HIERARCHY

 config GPIO_EXAR
        tristate "Support for GPIO pins on XR17V352/354/358"

But most likely there are more changes required to the gpio code.

> 2. Broken sound (I2S), this looks like below in the log:

>

> ep93xx-i2s ep93xx-i2s: Missing dma channel for stream: 0

>  CS4271: ASoC: pcm constructor failed: -22

> edb93xx-audio edb93xx-audio: ASoC: can't create pcm CS4271 HiFi :-22

>

> And /proc/interrupts has two entries less. Without patch:

>

> # cat /proc/interrupts

>            CPU0

>   7:          0       VIC   7 Edge      i2s-pcm-out

>   8:          0       VIC   8 Edge      i2s-pcm-in

>  39:          2       VIC   7 Edge      eth0

>  51:       7532       VIC  19 Edge      ep93xx timer

>  52:        144       VIC  20 Edge      uart-pl010

>  53:          4       VIC  21 Edge      ep93xx-spi

>  60:          0       VIC  28 Edge      ep93xx-i2s

> Err:          0

>

> With patch:

>

> # cat /proc/interrupts

>            CPU0

>  39:        146       VIC   7 Edge      eth0

>  51:     162161       VIC  19 Edge      ep93xx timer

>  52:        139       VIC  20 Edge      uart-pl010

>  53:          4       VIC  21 Edge      ep93xx-spi

>  60:          0       VIC  28 Edge      ep93xx-i2s

> Err:          0


I guess that is partial success: some irqs do work ;-)

The two interrupts that did not get registered are for the
dmaengine driver, and that makes sense given the error
message about the DMA not working. No idea how
that would be a result of the irq changes though.

> I will try to look into I2S problem...


Thanks!

       Arnd
Alexander Sverdlin Oct. 19, 2019, 8:24 p.m. UTC | #3 
Hi!

On Sat, 19 Oct 2019 22:08:40 +0200
Arnd Bergmann <arnd@arndb.de> wrote:

> > # cat /proc/interrupts

> >            CPU0

> >  39:        146       VIC   7 Edge      eth0

> >  51:     162161       VIC  19 Edge      ep93xx timer

> >  52:        139       VIC  20 Edge      uart-pl010

> >  53:          4       VIC  21 Edge      ep93xx-spi

> >  60:          0       VIC  28 Edge      ep93xx-i2s

> > Err:          0

> 

> I guess that is partial success: some irqs do work ;-)


Yep, VIC1 is working, while VIC0 is not.

> The two interrupts that did not get registered are for the

> dmaengine driver, and that makes sense given the error

> message about the DMA not working. No idea how

> that would be a result of the irq changes though.


Seems, that it has exposed some incompatibilities of
starting IRQ 0 in EP93xx platform fir VIC0 and VIC code
itself, which assumes 0 means "auto assignment" (refer
to vic_init()).

But there are more problems I didn't resolve yet.

-- 
Alexander Sverdlin.
Arnd Bergmann Oct. 19, 2019, 8:44 p.m. UTC | #4 
On Sat, Oct 19, 2019 at 10:24 PM Alexander Sverdlin
<alexander.sverdlin@gmail.com> wrote:
> On Sat, 19 Oct 2019 22:08:40 +0200

> Arnd Bergmann <arnd@arndb.de> wrote:

>

> > > # cat /proc/interrupts

> > >            CPU0

> > >  39:        146       VIC   7 Edge      eth0

> > >  51:     162161       VIC  19 Edge      ep93xx timer

> > >  52:        139       VIC  20 Edge      uart-pl010

> > >  53:          4       VIC  21 Edge      ep93xx-spi

> > >  60:          0       VIC  28 Edge      ep93xx-i2s

> > > Err:          0

> >

> > I guess that is partial success: some irqs do work ;-)

>

> Yep, VIC1 is working, while VIC0 is not.

>

> > The two interrupts that did not get registered are for the

> > dmaengine driver, and that makes sense given the error

> > message about the DMA not working. No idea how

> > that would be a result of the irq changes though.

>

> Seems, that it has exposed some incompatibilities of

> starting IRQ 0 in EP93xx platform fir VIC0 and VIC code

> itself, which assumes 0 means "auto assignment" (refer

> to vic_init()).


Ah, that makes sense. so all interrupt numbers need to
be shifted by a fixed number (e.g. 1) like we did for
other platforms (see attachment).

      Arnd
diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c
index 6fb19a393fd2..f0a71d4e076f 100644
--- a/arch/arm/mach-ep93xx/core.c
+++ b/arch/arm/mach-ep93xx/core.c
@@ -47,6 +47,7 @@
 #include <asm/mach/map.h>
 
 #include "soc.h"
+#include "irqs.h"
 
 /*************************************************************************
  * Static I/O mappings that are needed for all EP93xx platforms
@@ -75,8 +76,8 @@ void __init ep93xx_map_io(void)
  *************************************************************************/
 void __init ep93xx_init_irq(void)
 {
-	vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
-	vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);
+	vic_init(EP93XX_VIC1_BASE, IRQ_EP93XX_VIC0, EP93XX_VIC1_VALID_IRQ_MASK, 0);
+	vic_init(EP93XX_VIC2_BASE, IRQ_EP93XX_VIC1, EP93XX_VIC2_VALID_IRQ_MASK, 0);
 }
 
 
diff --git a/arch/arm/mach-ep93xx/irqs.h b/arch/arm/mach-ep93xx/irqs.h
index 3ffdb3a2f3e4..353201b90c66 100644
--- a/arch/arm/mach-ep93xx/irqs.h
+++ b/arch/arm/mach-ep93xx/irqs.h
@@ -2,69 +2,73 @@
 #ifndef __ASM_ARCH_IRQS_H
 #define __ASM_ARCH_IRQS_H
 
-#define IRQ_EP93XX_COMMRX		2
-#define IRQ_EP93XX_COMMTX		3
-#define IRQ_EP93XX_TIMER1		4
-#define IRQ_EP93XX_TIMER2		5
-#define IRQ_EP93XX_AACINTR		6
-#define IRQ_EP93XX_DMAM2P0		7
-#define IRQ_EP93XX_DMAM2P1		8
-#define IRQ_EP93XX_DMAM2P2		9
-#define IRQ_EP93XX_DMAM2P3		10
-#define IRQ_EP93XX_DMAM2P4		11
-#define IRQ_EP93XX_DMAM2P5		12
-#define IRQ_EP93XX_DMAM2P6		13
-#define IRQ_EP93XX_DMAM2P7		14
-#define IRQ_EP93XX_DMAM2P8		15
-#define IRQ_EP93XX_DMAM2P9		16
-#define IRQ_EP93XX_DMAM2M0		17
-#define IRQ_EP93XX_DMAM2M1		18
-#define IRQ_EP93XX_GPIO0MUX		19
-#define IRQ_EP93XX_GPIO1MUX		20
-#define IRQ_EP93XX_GPIO2MUX		21
-#define IRQ_EP93XX_GPIO3MUX		22
-#define IRQ_EP93XX_UART1RX		23
-#define IRQ_EP93XX_UART1TX		24
-#define IRQ_EP93XX_UART2RX		25
-#define IRQ_EP93XX_UART2TX		26
-#define IRQ_EP93XX_UART3RX		27
-#define IRQ_EP93XX_UART3TX		28
-#define IRQ_EP93XX_KEY			29
-#define IRQ_EP93XX_TOUCH		30
+#define IRQ_EP93XX_VIC0			1
+
+#define IRQ_EP93XX_COMMRX		(IRQ_EP93XX_VIC0 + 2)
+#define IRQ_EP93XX_COMMTX		(IRQ_EP93XX_VIC0 + 3)
+#define IRQ_EP93XX_TIMER1		(IRQ_EP93XX_VIC0 + 4)
+#define IRQ_EP93XX_TIMER2		(IRQ_EP93XX_VIC0 + 5)
+#define IRQ_EP93XX_AACINTR		(IRQ_EP93XX_VIC0 + 6)
+#define IRQ_EP93XX_DMAM2P0		(IRQ_EP93XX_VIC0 + 7)
+#define IRQ_EP93XX_DMAM2P1		(IRQ_EP93XX_VIC0 + 8)
+#define IRQ_EP93XX_DMAM2P2		(IRQ_EP93XX_VIC0 + 9)
+#define IRQ_EP93XX_DMAM2P3		(IRQ_EP93XX_VIC0 + 10)
+#define IRQ_EP93XX_DMAM2P4		(IRQ_EP93XX_VIC0 + 11)
+#define IRQ_EP93XX_DMAM2P5		(IRQ_EP93XX_VIC0 + 12)
+#define IRQ_EP93XX_DMAM2P6		(IRQ_EP93XX_VIC0 + 13)
+#define IRQ_EP93XX_DMAM2P7		(IRQ_EP93XX_VIC0 + 14)
+#define IRQ_EP93XX_DMAM2P8		(IRQ_EP93XX_VIC0 + 15)
+#define IRQ_EP93XX_DMAM2P9		(IRQ_EP93XX_VIC0 + 16)
+#define IRQ_EP93XX_DMAM2M0		(IRQ_EP93XX_VIC0 + 17)
+#define IRQ_EP93XX_DMAM2M1		(IRQ_EP93XX_VIC0 + 18)
+#define IRQ_EP93XX_GPIO0MUX		(IRQ_EP93XX_VIC0 + 19)
+#define IRQ_EP93XX_GPIO1MUX		(IRQ_EP93XX_VIC0 + 20)
+#define IRQ_EP93XX_GPIO2MUX		(IRQ_EP93XX_VIC0 + 21)
+#define IRQ_EP93XX_GPIO3MUX		(IRQ_EP93XX_VIC0 + 22)
+#define IRQ_EP93XX_UART1RX		(IRQ_EP93XX_VIC0 + 23)
+#define IRQ_EP93XX_UART1TX		(IRQ_EP93XX_VIC0 + 24)
+#define IRQ_EP93XX_UART2RX		(IRQ_EP93XX_VIC0 + 25)
+#define IRQ_EP93XX_UART2TX		(IRQ_EP93XX_VIC0 + 26)
+#define IRQ_EP93XX_UART3RX		(IRQ_EP93XX_VIC0 + 27)
+#define IRQ_EP93XX_UART3TX		(IRQ_EP93XX_VIC0 + 28)
+#define IRQ_EP93XX_KEY			(IRQ_EP93XX_VIC0 + 29)
+#define IRQ_EP93XX_TOUCH		(IRQ_EP93XX_VIC0 + 30)
 #define EP93XX_VIC1_VALID_IRQ_MASK	0x7ffffffc
 
-#define IRQ_EP93XX_EXT0			32
-#define IRQ_EP93XX_EXT1			33
-#define IRQ_EP93XX_EXT2			34
-#define IRQ_EP93XX_64HZ			35
-#define IRQ_EP93XX_WATCHDOG		36
-#define IRQ_EP93XX_RTC			37
-#define IRQ_EP93XX_IRDA			38
-#define IRQ_EP93XX_ETHERNET		39
-#define IRQ_EP93XX_EXT3			40
-#define IRQ_EP93XX_PROG			41
-#define IRQ_EP93XX_1HZ			42
-#define IRQ_EP93XX_VSYNC		43
-#define IRQ_EP93XX_VIDEO_FIFO		44
-#define IRQ_EP93XX_SSP1RX		45
-#define IRQ_EP93XX_SSP1TX		46
-#define IRQ_EP93XX_GPIO4MUX		47
-#define IRQ_EP93XX_GPIO5MUX		48
-#define IRQ_EP93XX_GPIO6MUX		49
-#define IRQ_EP93XX_GPIO7MUX		50
-#define IRQ_EP93XX_TIMER3		51
-#define IRQ_EP93XX_UART1		52
-#define IRQ_EP93XX_SSP			53
-#define IRQ_EP93XX_UART2		54
-#define IRQ_EP93XX_UART3		55
-#define IRQ_EP93XX_USB			56
-#define IRQ_EP93XX_ETHERNET_PME		57
-#define IRQ_EP93XX_DSP			58
-#define IRQ_EP93XX_GPIO_AB		59
-#define IRQ_EP93XX_SAI			60
+#define IRQ_EP93XX_VIC1			(IRQ_EP93XX_VIC0 + 32)
+
+#define IRQ_EP93XX_EXT0			(IRQ_EP93XX_VIC1 + 0)
+#define IRQ_EP93XX_EXT1			(IRQ_EP93XX_VIC1 + 1)
+#define IRQ_EP93XX_EXT2			(IRQ_EP93XX_VIC1 + 2)
+#define IRQ_EP93XX_64HZ			(IRQ_EP93XX_VIC1 + 3)
+#define IRQ_EP93XX_WATCHDOG		(IRQ_EP93XX_VIC1 + 4)
+#define IRQ_EP93XX_RTC			(IRQ_EP93XX_VIC1 + 5)
+#define IRQ_EP93XX_IRDA			(IRQ_EP93XX_VIC1 + 6)
+#define IRQ_EP93XX_ETHERNET		(IRQ_EP93XX_VIC1 + 7)
+#define IRQ_EP93XX_EXT3			(IRQ_EP93XX_VIC1 + 8)
+#define IRQ_EP93XX_PROG			(IRQ_EP93XX_VIC1 + 9)
+#define IRQ_EP93XX_1HZ			(IRQ_EP93XX_VIC1 + 10)
+#define IRQ_EP93XX_VSYNC		(IRQ_EP93XX_VIC1 + 11)
+#define IRQ_EP93XX_VIDEO_FIFO		(IRQ_EP93XX_VIC1 + 12)
+#define IRQ_EP93XX_SSP1RX		(IRQ_EP93XX_VIC1 + 13)
+#define IRQ_EP93XX_SSP1TX		(IRQ_EP93XX_VIC1 + 14)
+#define IRQ_EP93XX_GPIO4MUX		(IRQ_EP93XX_VIC1 + 15)
+#define IRQ_EP93XX_GPIO5MUX		(IRQ_EP93XX_VIC1 + 16)
+#define IRQ_EP93XX_GPIO6MUX		(IRQ_EP93XX_VIC1 + 17)
+#define IRQ_EP93XX_GPIO7MUX		(IRQ_EP93XX_VIC1 + 18)
+#define IRQ_EP93XX_TIMER3		(IRQ_EP93XX_VIC1 + 19)
+#define IRQ_EP93XX_UART1		(IRQ_EP93XX_VIC1 + 20)
+#define IRQ_EP93XX_SSP			(IRQ_EP93XX_VIC1 + 21)
+#define IRQ_EP93XX_UART2		(IRQ_EP93XX_VIC1 + 22)
+#define IRQ_EP93XX_UART3		(IRQ_EP93XX_VIC1 + 23)
+#define IRQ_EP93XX_USB			(IRQ_EP93XX_VIC1 + 24)
+#define IRQ_EP93XX_ETHERNET_PME		(IRQ_EP93XX_VIC1 + 25)
+#define IRQ_EP93XX_DSP			(IRQ_EP93XX_VIC1 + 26)
+#define IRQ_EP93XX_GPIO_AB		(IRQ_EP93XX_VIC1 + 27)
+#define IRQ_EP93XX_SAI			(IRQ_EP93XX_VIC1 + 28)
 #define EP93XX_VIC2_VALID_IRQ_MASK	0x1fffffff
 
-#define NR_EP93XX_IRQS			(64 + 24)
+#define NR_EP93XX_IRQS			(IRQ_EP93XX_VIC1 + 32 + 24)
 
 #define EP93XX_BOARD_IRQ(x)		(NR_EP93XX_IRQS + (x))
 #define EP93XX_BOARD_IRQS		32
Alexander Sverdlin Oct. 19, 2019, 9:14 p.m. UTC | #5 
Hi!

On Sat, 19 Oct 2019 22:44:18 +0200
Arnd Bergmann <arnd@arndb.de> wrote:

> > > > # cat /proc/interrupts

> > > >            CPU0

> > > >  39:        146       VIC   7 Edge      eth0

> > > >  51:     162161       VIC  19 Edge      ep93xx timer

> > > >  52:        139       VIC  20 Edge      uart-pl010

> > > >  53:          4       VIC  21 Edge      ep93xx-spi

> > > >  60:          0       VIC  28 Edge      ep93xx-i2s

> > > > Err:          0

> > >

> > > I guess that is partial success: some irqs do work ;-)

> >

> > Yep, VIC1 is working, while VIC0 is not.

> >

> > > The two interrupts that did not get registered are for the

> > > dmaengine driver, and that makes sense given the error

> > > message about the DMA not working. No idea how

> > > that would be a result of the irq changes though.

> >

> > Seems, that it has exposed some incompatibilities of

> > starting IRQ 0 in EP93xx platform fir VIC0 and VIC code

> > itself, which assumes 0 means "auto assignment" (refer

> > to vic_init()).

> 

> Ah, that makes sense. so all interrupt numbers need to

> be shifted by a fixed number (e.g. 1) like we did for

> other platforms (see attachment).


Yes, the below patch resolved both GPIO and DMA issues.
Previous patch (selecting IRQ_DOMAIN_HIERARCHY) is not
required.

If you re-spin all 3 ep93xx-relevant patches together, you can put my
Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>

on them.

> diff --git a/arch/arm/mach-ep93xx/core.c b/arch/arm/mach-ep93xx/core.c

> index 6fb19a393fd2..f0a71d4e076f 100644

> --- a/arch/arm/mach-ep93xx/core.c

> +++ b/arch/arm/mach-ep93xx/core.c

> @@ -47,6 +47,7 @@

>  #include <asm/mach/map.h>

>  

>  #include "soc.h"

> +#include "irqs.h"

>  

>  /*************************************************************************

>   * Static I/O mappings that are needed for all EP93xx platforms

> @@ -75,8 +76,8 @@ void __init ep93xx_map_io(void)

>   *************************************************************************/

>  void __init ep93xx_init_irq(void)

>  {

> -	vic_init(EP93XX_VIC1_BASE, 0, EP93XX_VIC1_VALID_IRQ_MASK, 0);

> -	vic_init(EP93XX_VIC2_BASE, 32, EP93XX_VIC2_VALID_IRQ_MASK, 0);

> +	vic_init(EP93XX_VIC1_BASE, IRQ_EP93XX_VIC0, EP93XX_VIC1_VALID_IRQ_MASK, 0);

> +	vic_init(EP93XX_VIC2_BASE, IRQ_EP93XX_VIC1, EP93XX_VIC2_VALID_IRQ_MASK, 0);

>  }

>  

>  

> diff --git a/arch/arm/mach-ep93xx/irqs.h b/arch/arm/mach-ep93xx/irqs.h

> index 3ffdb3a2f3e4..353201b90c66 100644

> --- a/arch/arm/mach-ep93xx/irqs.h

> +++ b/arch/arm/mach-ep93xx/irqs.h

> @@ -2,69 +2,73 @@

>  #ifndef __ASM_ARCH_IRQS_H

>  #define __ASM_ARCH_IRQS_H

>  

> -#define IRQ_EP93XX_COMMRX		2

> -#define IRQ_EP93XX_COMMTX		3

> -#define IRQ_EP93XX_TIMER1		4

> -#define IRQ_EP93XX_TIMER2		5

> -#define IRQ_EP93XX_AACINTR		6

> -#define IRQ_EP93XX_DMAM2P0		7

> -#define IRQ_EP93XX_DMAM2P1		8

> -#define IRQ_EP93XX_DMAM2P2		9

> -#define IRQ_EP93XX_DMAM2P3		10

> -#define IRQ_EP93XX_DMAM2P4		11

> -#define IRQ_EP93XX_DMAM2P5		12

> -#define IRQ_EP93XX_DMAM2P6		13

> -#define IRQ_EP93XX_DMAM2P7		14

> -#define IRQ_EP93XX_DMAM2P8		15

> -#define IRQ_EP93XX_DMAM2P9		16

> -#define IRQ_EP93XX_DMAM2M0		17

> -#define IRQ_EP93XX_DMAM2M1		18

> -#define IRQ_EP93XX_GPIO0MUX		19

> -#define IRQ_EP93XX_GPIO1MUX		20

> -#define IRQ_EP93XX_GPIO2MUX		21

> -#define IRQ_EP93XX_GPIO3MUX		22

> -#define IRQ_EP93XX_UART1RX		23

> -#define IRQ_EP93XX_UART1TX		24

> -#define IRQ_EP93XX_UART2RX		25

> -#define IRQ_EP93XX_UART2TX		26

> -#define IRQ_EP93XX_UART3RX		27

> -#define IRQ_EP93XX_UART3TX		28

> -#define IRQ_EP93XX_KEY			29

> -#define IRQ_EP93XX_TOUCH		30

> +#define IRQ_EP93XX_VIC0			1

> +

> +#define IRQ_EP93XX_COMMRX		(IRQ_EP93XX_VIC0 + 2)

> +#define IRQ_EP93XX_COMMTX		(IRQ_EP93XX_VIC0 + 3)

> +#define IRQ_EP93XX_TIMER1		(IRQ_EP93XX_VIC0 + 4)

> +#define IRQ_EP93XX_TIMER2		(IRQ_EP93XX_VIC0 + 5)

> +#define IRQ_EP93XX_AACINTR		(IRQ_EP93XX_VIC0 + 6)

> +#define IRQ_EP93XX_DMAM2P0		(IRQ_EP93XX_VIC0 + 7)

> +#define IRQ_EP93XX_DMAM2P1		(IRQ_EP93XX_VIC0 + 8)

> +#define IRQ_EP93XX_DMAM2P2		(IRQ_EP93XX_VIC0 + 9)

> +#define IRQ_EP93XX_DMAM2P3		(IRQ_EP93XX_VIC0 + 10)

> +#define IRQ_EP93XX_DMAM2P4		(IRQ_EP93XX_VIC0 + 11)

> +#define IRQ_EP93XX_DMAM2P5		(IRQ_EP93XX_VIC0 + 12)

> +#define IRQ_EP93XX_DMAM2P6		(IRQ_EP93XX_VIC0 + 13)

> +#define IRQ_EP93XX_DMAM2P7		(IRQ_EP93XX_VIC0 + 14)

> +#define IRQ_EP93XX_DMAM2P8		(IRQ_EP93XX_VIC0 + 15)

> +#define IRQ_EP93XX_DMAM2P9		(IRQ_EP93XX_VIC0 + 16)

> +#define IRQ_EP93XX_DMAM2M0		(IRQ_EP93XX_VIC0 + 17)

> +#define IRQ_EP93XX_DMAM2M1		(IRQ_EP93XX_VIC0 + 18)

> +#define IRQ_EP93XX_GPIO0MUX		(IRQ_EP93XX_VIC0 + 19)

> +#define IRQ_EP93XX_GPIO1MUX		(IRQ_EP93XX_VIC0 + 20)

> +#define IRQ_EP93XX_GPIO2MUX		(IRQ_EP93XX_VIC0 + 21)

> +#define IRQ_EP93XX_GPIO3MUX		(IRQ_EP93XX_VIC0 + 22)

> +#define IRQ_EP93XX_UART1RX		(IRQ_EP93XX_VIC0 + 23)

> +#define IRQ_EP93XX_UART1TX		(IRQ_EP93XX_VIC0 + 24)

> +#define IRQ_EP93XX_UART2RX		(IRQ_EP93XX_VIC0 + 25)

> +#define IRQ_EP93XX_UART2TX		(IRQ_EP93XX_VIC0 + 26)

> +#define IRQ_EP93XX_UART3RX		(IRQ_EP93XX_VIC0 + 27)

> +#define IRQ_EP93XX_UART3TX		(IRQ_EP93XX_VIC0 + 28)

> +#define IRQ_EP93XX_KEY			(IRQ_EP93XX_VIC0 + 29)

> +#define IRQ_EP93XX_TOUCH		(IRQ_EP93XX_VIC0 + 30)

>  #define EP93XX_VIC1_VALID_IRQ_MASK	0x7ffffffc

>  

> -#define IRQ_EP93XX_EXT0			32

> -#define IRQ_EP93XX_EXT1			33

> -#define IRQ_EP93XX_EXT2			34

> -#define IRQ_EP93XX_64HZ			35

> -#define IRQ_EP93XX_WATCHDOG		36

> -#define IRQ_EP93XX_RTC			37

> -#define IRQ_EP93XX_IRDA			38

> -#define IRQ_EP93XX_ETHERNET		39

> -#define IRQ_EP93XX_EXT3			40

> -#define IRQ_EP93XX_PROG			41

> -#define IRQ_EP93XX_1HZ			42

> -#define IRQ_EP93XX_VSYNC		43

> -#define IRQ_EP93XX_VIDEO_FIFO		44

> -#define IRQ_EP93XX_SSP1RX		45

> -#define IRQ_EP93XX_SSP1TX		46

> -#define IRQ_EP93XX_GPIO4MUX		47

> -#define IRQ_EP93XX_GPIO5MUX		48

> -#define IRQ_EP93XX_GPIO6MUX		49

> -#define IRQ_EP93XX_GPIO7MUX		50

> -#define IRQ_EP93XX_TIMER3		51

> -#define IRQ_EP93XX_UART1		52

> -#define IRQ_EP93XX_SSP			53

> -#define IRQ_EP93XX_UART2		54

> -#define IRQ_EP93XX_UART3		55

> -#define IRQ_EP93XX_USB			56

> -#define IRQ_EP93XX_ETHERNET_PME		57

> -#define IRQ_EP93XX_DSP			58

> -#define IRQ_EP93XX_GPIO_AB		59

> -#define IRQ_EP93XX_SAI			60

> +#define IRQ_EP93XX_VIC1			(IRQ_EP93XX_VIC0 + 32)

> +

> +#define IRQ_EP93XX_EXT0			(IRQ_EP93XX_VIC1 + 0)

> +#define IRQ_EP93XX_EXT1			(IRQ_EP93XX_VIC1 + 1)

> +#define IRQ_EP93XX_EXT2			(IRQ_EP93XX_VIC1 + 2)

> +#define IRQ_EP93XX_64HZ			(IRQ_EP93XX_VIC1 + 3)

> +#define IRQ_EP93XX_WATCHDOG		(IRQ_EP93XX_VIC1 + 4)

> +#define IRQ_EP93XX_RTC			(IRQ_EP93XX_VIC1 + 5)

> +#define IRQ_EP93XX_IRDA			(IRQ_EP93XX_VIC1 + 6)

> +#define IRQ_EP93XX_ETHERNET		(IRQ_EP93XX_VIC1 + 7)

> +#define IRQ_EP93XX_EXT3			(IRQ_EP93XX_VIC1 + 8)

> +#define IRQ_EP93XX_PROG			(IRQ_EP93XX_VIC1 + 9)

> +#define IRQ_EP93XX_1HZ			(IRQ_EP93XX_VIC1 + 10)

> +#define IRQ_EP93XX_VSYNC		(IRQ_EP93XX_VIC1 + 11)

> +#define IRQ_EP93XX_VIDEO_FIFO		(IRQ_EP93XX_VIC1 + 12)

> +#define IRQ_EP93XX_SSP1RX		(IRQ_EP93XX_VIC1 + 13)

> +#define IRQ_EP93XX_SSP1TX		(IRQ_EP93XX_VIC1 + 14)

> +#define IRQ_EP93XX_GPIO4MUX		(IRQ_EP93XX_VIC1 + 15)

> +#define IRQ_EP93XX_GPIO5MUX		(IRQ_EP93XX_VIC1 + 16)

> +#define IRQ_EP93XX_GPIO6MUX		(IRQ_EP93XX_VIC1 + 17)

> +#define IRQ_EP93XX_GPIO7MUX		(IRQ_EP93XX_VIC1 + 18)

> +#define IRQ_EP93XX_TIMER3		(IRQ_EP93XX_VIC1 + 19)

> +#define IRQ_EP93XX_UART1		(IRQ_EP93XX_VIC1 + 20)

> +#define IRQ_EP93XX_SSP			(IRQ_EP93XX_VIC1 + 21)

> +#define IRQ_EP93XX_UART2		(IRQ_EP93XX_VIC1 + 22)

> +#define IRQ_EP93XX_UART3		(IRQ_EP93XX_VIC1 + 23)

> +#define IRQ_EP93XX_USB			(IRQ_EP93XX_VIC1 + 24)

> +#define IRQ_EP93XX_ETHERNET_PME		(IRQ_EP93XX_VIC1 + 25)

> +#define IRQ_EP93XX_DSP			(IRQ_EP93XX_VIC1 + 26)

> +#define IRQ_EP93XX_GPIO_AB		(IRQ_EP93XX_VIC1 + 27)

> +#define IRQ_EP93XX_SAI			(IRQ_EP93XX_VIC1 + 28)

>  #define EP93XX_VIC2_VALID_IRQ_MASK	0x1fffffff

>  

> -#define NR_EP93XX_IRQS			(64 + 24)

> +#define NR_EP93XX_IRQS			(IRQ_EP93XX_VIC1 + 32 + 24)

>  

>  #define EP93XX_BOARD_IRQ(x)		(NR_EP93XX_IRQS + (x))

>  #define EP93XX_BOARD_IRQS		32


-- 
Alexander Sverdlin.
Arnd Bergmann Oct. 20, 2019, 11:49 a.m. UTC | #6 
On Sat, Oct 19, 2019 at 11:14 PM Alexander Sverdlin
<alexander.sverdlin@gmail.com> wrote:
> On Sat, 19 Oct 2019 22:44:18 +0200

> Arnd Bergmann <arnd@arndb.de> wrote:

> > Ah, that makes sense. so all interrupt numbers need to

> > be shifted by a fixed number (e.g. 1) like we did for

> > other platforms (see attachment).

>

> Yes, the below patch resolved both GPIO and DMA issues.

> Previous patch (selecting IRQ_DOMAIN_HIERARCHY) is not

> required.

>

> If you re-spin all 3 ep93xx-relevant patches together, you can put my

> Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>

> on them.


Awesome, thanks for testing.

I only remember sending two patches  for ep93xx:
 ARM: ep93xx: make mach/ep93xx-regs.h local
 ARM: ep93xx: enable SPARSE_IRQ

and have added the Tested-by tag to them now. Is there a third one
I missed?

      Arnd
Alexander Sverdlin Oct. 20, 2019, 9:45 p.m. UTC | #7 
Hi!

On 20/10/2019 13:49, Arnd Bergmann wrote:
>>> Ah, that makes sense. so all interrupt numbers need to

>>> be shifted by a fixed number (e.g. 1) like we did for

>>> other platforms (see attachment).

>> Yes, the below patch resolved both GPIO and DMA issues.

        ^^^^^^^^^^^^^^^
>> Previous patch (selecting IRQ_DOMAIN_HIERARCHY) is not

>> required.

>>

>> If you re-spin all 3 ep93xx-relevant patches together, you can put my

>> Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>

>> on them.

> Awesome, thanks for testing.

> 

> I only remember sending two patches  for ep93xx:

>  ARM: ep93xx: make mach/ep93xx-regs.h local

>  ARM: ep93xx: enable SPARSE_IRQ

> 

> and have added the Tested-by tag to them now. Is there a third one

> I missed?


The patch shifting the IRQ-numbering by one is a prerequisite for the two
above patches, right?

--
Alex.
Arnd Bergmann Oct. 21, 2019, 6:53 a.m. UTC | #8 
On Sun, Oct 20, 2019 at 11:47 PM Alexander Sverdlin
<alexander.sverdlin@gmail.com> wrote:
> On 20/10/2019 13:49, Arnd Bergmann wrote:

> >>> Ah, that makes sense. so all interrupt numbers need to

> >>> be shifted by a fixed number (e.g. 1) like we did for

> >>> other platforms (see attachment).

> >> Yes, the below patch resolved both GPIO and DMA issues.

>         ^^^^^^^^^^^^^^^

> >> Previous patch (selecting IRQ_DOMAIN_HIERARCHY) is not

> >> required.

> >>

> >> If you re-spin all 3 ep93xx-relevant patches together, you can put my

> >> Tested-by: Alexander Sverdlin <alexander.sverdlin@gmail.com>

> >> on them.

> > Awesome, thanks for testing.

> >

> > I only remember sending two patches  for ep93xx:

> >  ARM: ep93xx: make mach/ep93xx-regs.h local

> >  ARM: ep93xx: enable SPARSE_IRQ

> >

> > and have added the Tested-by tag to them now. Is there a third one

> > I missed?

>

> The patch shifting the IRQ-numbering by one is a prerequisite for the two

> above patches, right?


Ah, now I see what you mean. I had folded that change into the sparse-irq
change, but you are right that it makes more sense as a separate
changeset before the other ones. Changing that now.

Thanks,

       Arnd
diff mbox series

Patch

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index b6681b61e46c..cca3d240a01e 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -365,6 +365,8 @@  config ARCH_EP93XX
 	select CPU_ARM920T
 	select GENERIC_CLOCKEVENTS
 	select GPIOLIB
+	select IRQ_DOMAIN
+	select SPARSE_IRQ
 	help
 	  This enables support for the Cirrus EP93xx series of CPUs.
 
diff --git a/arch/arm/mach-ep93xx/adssphere.c b/arch/arm/mach-ep93xx/adssphere.c
index 57cfd8ebe04f..bb5e7b3c2fba 100644
--- a/arch/arm/mach-ep93xx/adssphere.c
+++ b/arch/arm/mach-ep93xx/adssphere.c
@@ -32,6 +32,7 @@  static void __init adssphere_init_machine(void)
 MACHINE_START(ADSSPHERE, "ADS Sphere board")
 	/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
 	.atag_offset	= 0x100,
+	.nr_irqs	= NR_EP93XX_IRQS,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
 	.init_time	= ep93xx_timer_init,
diff --git a/arch/arm/mach-ep93xx/edb93xx.c b/arch/arm/mach-ep93xx/edb93xx.c
index 7b7280c21ee0..19f38f58ff46 100644
--- a/arch/arm/mach-ep93xx/edb93xx.c
+++ b/arch/arm/mach-ep93xx/edb93xx.c
@@ -243,6 +243,7 @@  static void __init edb93xx_init_machine(void)
 MACHINE_START(EDB9301, "Cirrus Logic EDB9301 Evaluation Board")
 	/* Maintainer: H Hartley Sweeten <hsweeten@visionengravers.com> */
 	.atag_offset	= 0x100,
+	.nr_irqs	= NR_EP93XX_IRQS,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
 	.init_time	= ep93xx_timer_init,
@@ -256,6 +257,7 @@  MACHINE_END
 MACHINE_START(EDB9302, "Cirrus Logic EDB9302 Evaluation Board")
 	/* Maintainer: George Kashperko <george@chas.com.ua> */
 	.atag_offset	= 0x100,
+	.nr_irqs	= NR_EP93XX_IRQS,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
 	.init_time	= ep93xx_timer_init,
@@ -269,6 +271,7 @@  MACHINE_END
 MACHINE_START(EDB9302A, "Cirrus Logic EDB9302A Evaluation Board")
 	/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
 	.atag_offset	= 0x100,
+	.nr_irqs	= NR_EP93XX_IRQS,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
 	.init_time	= ep93xx_timer_init,
@@ -282,6 +285,7 @@  MACHINE_END
 MACHINE_START(EDB9307, "Cirrus Logic EDB9307 Evaluation Board")
 	/* Maintainer: Herbert Valerio Riedel <hvr@gnu.org> */
 	.atag_offset	= 0x100,
+	.nr_irqs	= NR_EP93XX_IRQS,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
 	.init_time	= ep93xx_timer_init,
@@ -295,6 +299,7 @@  MACHINE_END
 MACHINE_START(EDB9307A, "Cirrus Logic EDB9307A Evaluation Board")
 	/* Maintainer: H Hartley Sweeten <hsweeten@visionengravers.com> */
 	.atag_offset	= 0x100,
+	.nr_irqs	= NR_EP93XX_IRQS,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
 	.init_time	= ep93xx_timer_init,
@@ -308,6 +313,7 @@  MACHINE_END
 MACHINE_START(EDB9312, "Cirrus Logic EDB9312 Evaluation Board")
 	/* Maintainer: Toufeeq Hussain <toufeeq_hussain@infosys.com> */
 	.atag_offset	= 0x100,
+	.nr_irqs	= NR_EP93XX_IRQS,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
 	.init_time	= ep93xx_timer_init,
@@ -321,6 +327,7 @@  MACHINE_END
 MACHINE_START(EDB9315, "Cirrus Logic EDB9315 Evaluation Board")
 	/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
 	.atag_offset	= 0x100,
+	.nr_irqs	= NR_EP93XX_IRQS,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
 	.init_time	= ep93xx_timer_init,
@@ -334,6 +341,7 @@  MACHINE_END
 MACHINE_START(EDB9315A, "Cirrus Logic EDB9315A Evaluation Board")
 	/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
 	.atag_offset	= 0x100,
+	.nr_irqs	= NR_EP93XX_IRQS,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
 	.init_time	= ep93xx_timer_init,
diff --git a/arch/arm/mach-ep93xx/gesbc9312.c b/arch/arm/mach-ep93xx/gesbc9312.c
index 8905db1edd5a..6bc86b554864 100644
--- a/arch/arm/mach-ep93xx/gesbc9312.c
+++ b/arch/arm/mach-ep93xx/gesbc9312.c
@@ -32,6 +32,7 @@  static void __init gesbc9312_init_machine(void)
 MACHINE_START(GESBC9312, "Glomation GESBC-9312-sx")
 	/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
 	.atag_offset	= 0x100,
+	.nr_irqs	= NR_EP93XX_IRQS,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
 	.init_time	= ep93xx_timer_init,
diff --git a/arch/arm/mach-ep93xx/include/mach/irqs.h b/arch/arm/mach-ep93xx/irqs.h
similarity index 94%
rename from arch/arm/mach-ep93xx/include/mach/irqs.h
rename to arch/arm/mach-ep93xx/irqs.h
index 244daf83ce6d..3ffdb3a2f3e4 100644
--- a/arch/arm/mach-ep93xx/include/mach/irqs.h
+++ b/arch/arm/mach-ep93xx/irqs.h
@@ -1,8 +1,4 @@ 
 /* SPDX-License-Identifier: GPL-2.0 */
-/*
- * arch/arm/mach-ep93xx/include/mach/irqs.h
- */
-
 #ifndef __ASM_ARCH_IRQS_H
 #define __ASM_ARCH_IRQS_H
 
@@ -73,7 +69,4 @@ 
 #define EP93XX_BOARD_IRQ(x)		(NR_EP93XX_IRQS + (x))
 #define EP93XX_BOARD_IRQS		32
 
-#define NR_IRQS				(NR_EP93XX_IRQS + EP93XX_BOARD_IRQS)
-
-
 #endif
diff --git a/arch/arm/mach-ep93xx/micro9.c b/arch/arm/mach-ep93xx/micro9.c
index b18ebf26da45..271898b17296 100644
--- a/arch/arm/mach-ep93xx/micro9.c
+++ b/arch/arm/mach-ep93xx/micro9.c
@@ -76,6 +76,7 @@  static void __init micro9_init_machine(void)
 MACHINE_START(MICRO9, "Contec Micro9-High")
 	/* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */
 	.atag_offset	= 0x100,
+	.nr_irqs	= NR_EP93XX_IRQS,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
 	.init_time	= ep93xx_timer_init,
@@ -89,6 +90,7 @@  MACHINE_END
 MACHINE_START(MICRO9M, "Contec Micro9-Mid")
 	/* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */
 	.atag_offset	= 0x100,
+	.nr_irqs	= NR_EP93XX_IRQS,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
 	.init_time	= ep93xx_timer_init,
@@ -102,6 +104,7 @@  MACHINE_END
 MACHINE_START(MICRO9L, "Contec Micro9-Lite")
 	/* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */
 	.atag_offset	= 0x100,
+	.nr_irqs	= NR_EP93XX_IRQS,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
 	.init_time	= ep93xx_timer_init,
@@ -115,6 +118,7 @@  MACHINE_END
 MACHINE_START(MICRO9S, "Contec Micro9-Slim")
 	/* Maintainer: Hubert Feurstein <hubert.feurstein@contec.at> */
 	.atag_offset	= 0x100,
+	.nr_irqs	= NR_EP93XX_IRQS,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
 	.init_time	= ep93xx_timer_init,
diff --git a/arch/arm/mach-ep93xx/simone.c b/arch/arm/mach-ep93xx/simone.c
index 8a53b74dc4b2..e2f7243629fe 100644
--- a/arch/arm/mach-ep93xx/simone.c
+++ b/arch/arm/mach-ep93xx/simone.c
@@ -119,6 +119,7 @@  static void __init simone_init_machine(void)
 MACHINE_START(SIM_ONE, "Simplemachines Sim.One Board")
 	/* Maintainer: Ryan Mallon */
 	.atag_offset	= 0x100,
+	.nr_irqs	= NR_EP93XX_IRQS,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
 	.init_time	= ep93xx_timer_init,
diff --git a/arch/arm/mach-ep93xx/snappercl15.c b/arch/arm/mach-ep93xx/snappercl15.c
index 703f25f19d51..29c8ea34c8e1 100644
--- a/arch/arm/mach-ep93xx/snappercl15.c
+++ b/arch/arm/mach-ep93xx/snappercl15.c
@@ -153,6 +153,7 @@  static void __init snappercl15_init_machine(void)
 MACHINE_START(SNAPPER_CL15, "Bluewater Systems Snapper CL15")
 	/* Maintainer: Ryan Mallon */
 	.atag_offset	= 0x100,
+	.nr_irqs	= NR_EP93XX_IRQS,
 	.map_io		= ep93xx_map_io,
 	.init_irq	= ep93xx_init_irq,
 	.init_time	= ep93xx_timer_init,
diff --git a/arch/arm/mach-ep93xx/soc.h b/arch/arm/mach-ep93xx/soc.h
index f2dace1c9154..770743bbaf80 100644
--- a/arch/arm/mach-ep93xx/soc.h
+++ b/arch/arm/mach-ep93xx/soc.h
@@ -10,6 +10,7 @@ 
 #define _EP93XX_SOC_H
 
 #include <mach/ep93xx-regs.h>
+#include "irqs.h"
 
 /*
  * EP93xx Physical Memory Map:
diff --git a/arch/arm/mach-ep93xx/ts72xx.c b/arch/arm/mach-ep93xx/ts72xx.c
index e0e1b11032f1..9ac0308f3d71 100644
--- a/arch/arm/mach-ep93xx/ts72xx.c
+++ b/arch/arm/mach-ep93xx/ts72xx.c
@@ -22,7 +22,6 @@ 
 
 #include "gpio-ep93xx.h"
 #include "hardware.h"
-#include <mach/irqs.h>
 
 #include <asm/mach-types.h>
 #include <asm/mach/map.h>
@@ -350,6 +349,7 @@  static void __init ts72xx_init_machine(void)
 MACHINE_START(TS72XX, "Technologic Systems TS-72xx SBC")
 	/* Maintainer: Lennert Buytenhek <buytenh@wantstofly.org> */
 	.atag_offset	= 0x100,
+	.nr_irqs	= NR_EP93XX_IRQS,
 	.map_io		= ts72xx_map_io,
 	.init_irq	= ep93xx_init_irq,
 	.init_time	= ep93xx_timer_init,
@@ -414,6 +414,7 @@  static void __init bk3_init_machine(void)
 MACHINE_START(BK3, "Liebherr controller BK3.1")
 	/* Maintainer: Lukasz Majewski <lukma@denx.de> */
 	.atag_offset	= 0x100,
+	.nr_irqs	= NR_EP93XX_IRQS,
 	.map_io		= ts72xx_map_io,
 	.init_irq	= ep93xx_init_irq,
 	.init_time	= ep93xx_timer_init,
diff --git a/arch/arm/mach-ep93xx/vision_ep9307.c b/arch/arm/mach-ep93xx/vision_ep9307.c
index cbcba3136d74..04f9f15be248 100644
--- a/arch/arm/mach-ep93xx/vision_ep9307.c
+++ b/arch/arm/mach-ep93xx/vision_ep9307.c
@@ -302,6 +302,7 @@  static void __init vision_init_machine(void)
 MACHINE_START(VISION_EP9307, "Vision Engraving Systems EP9307")
 	/* Maintainer: H Hartley Sweeten <hsweeten@visionengravers.com> */
 	.atag_offset	= 0x100,
+	.nr_irqs	= NR_EP93XX_IRQS + EP93XX_BOARD_IRQS,
 	.map_io		= vision_map_io,
 	.init_irq	= ep93xx_init_irq,
 	.init_time	= ep93xx_timer_init,