diff mbox series

[10/13] imx: load calibration parameters from fuse for i.MX8MP

Message ID 20200503141957.14635-11-peng.fan@nxp.com
State New
Headers show
Series imx: tmu support and scu thermal update | expand

Commit Message

Peng Fan May 3, 2020, 2:19 p.m. UTC
From: Ye Li <ye.li at nxp.com>

i.MX8MP thermal which has two probes and supports temperature range
from -40 to 125.  The driver still uses default 1p HW
calibration at 25C and loads calibration parameters from fuse.

Reviewed-by: Peng Fan <peng.fan at nxp.com>
Signed-off-by: Ye Li <ye.li at nxp.com>
Signed-off-by: Peng Fan <peng.fan at nxp.com>
---
 arch/arm/mach-imx/imx8m/soc.c | 45 +++++++++++++++++++++++++++++++++++++++++++
 1 file changed, 45 insertions(+)

Comments

Fabio Estevam May 3, 2020, 3:10 p.m. UTC | #1
Hi Peng and Ye Li,

On Sun, May 3, 2020 at 10:57 AM Peng Fan <peng.fan at nxp.com> wrote:
>
> From: Ye Li <ye.li at nxp.com>
>
> i.MX8MP thermal which has two probes and supports temperature range
> from -40 to 125.  The driver still uses default 1p HW
> calibration at 25C and loads calibration parameters from fuse.
>
> Reviewed-by: Peng Fan <peng.fan at nxp.com>
> Signed-off-by: Ye Li <ye.li at nxp.com>
> Signed-off-by: Peng Fan <peng.fan at nxp.com>

Are you able to boot an NXP 5.4.3 kernel on a i.MX8MP EVK board?

I am getting a kernel hang right after the serial console is probed:
https://pastebin.com/3AtvJqWS

Any suggestions?

I am using ATF from 5.4.3, firmware version is 8.6 and I pass 'export
ATF_LOAD_ADDR=0x960000'.

Any ideas?

Thanks
Peng Fan May 3, 2020, 11:39 p.m. UTC | #2
Hi Fabio,

> Subject: Re: [PATCH 10/13] imx: load calibration parameters from fuse for
> i.MX8MP
> 
> Hi Peng and Ye Li,
> 
> On Sun, May 3, 2020 at 10:57 AM Peng Fan <peng.fan at nxp.com> wrote:
> >
> > From: Ye Li <ye.li at nxp.com>
> >
> > i.MX8MP thermal which has two probes and supports temperature range
> > from -40 to 125.  The driver still uses default 1p HW calibration at
> > 25C and loads calibration parameters from fuse.
> >
> > Reviewed-by: Peng Fan <peng.fan at nxp.com>
> > Signed-off-by: Ye Li <ye.li at nxp.com>
> > Signed-off-by: Peng Fan <peng.fan at nxp.com>
> 
> Are you able to boot an NXP 5.4.3 kernel on a i.MX8MP EVK board?
> 

5.4.3 upstream kernel + latest upstream uboot?

> I am getting a kernel hang right after the serial console is probed:
> https://eur01.safelinks.protection.outlook.com/?url=https%3A%2F%2Fpasteb
> in.com%2F3AtvJqWS&amp;data=02%7C01%7Cpeng.fan%40nxp.com%7Cf3d1
> e46ad41e4ca90b0608d7ef73f349%7C686ea1d3bc2b4c6fa92cd99c5c301635
> %7C0%7C0%7C637241153594873754&amp;sdata=gjGygSnftYVH58eLW%2By
> 6ZZ4uczLZUM0U0lUk9LQyx5Y%3D&amp;reserved=0
> 
> Any suggestions?
> 
> I am using ATF from 5.4.3, firmware version is 8.6 and I pass 'export
> ATF_LOAD_ADDR=0x960000'.
> 
> Any ideas?

I am not holiday, not have a board at handle. I will give a try in a few days.


Disable busfreq, try clk_ignore_unused?

Regards,
Peng.

> 
> Thanks
Fabio Estevam May 4, 2020, 12:38 p.m. UTC | #3
Hi Peng,

On Sun, May 3, 2020 at 8:39 PM Peng Fan <peng.fan at nxp.com> wrote:

> 5.4.3 upstream kernel + latest upstream boot?

No, I meant imx_5.4.3_2.0.0 NXP kernel + latest upstream U-Boot.

> Disable busfreq, try clk_ignore_unused?

There is no way to disable busfreq from the NXP kernel. Passing
clk_ignore_unused does not help either.

I have also tried to boot NXP 5.4.3 on a i.MX8MM EVK with the latest
U-Boot and I also observe a hang.
Peng Fan May 5, 2020, 2:50 a.m. UTC | #4
> Subject: Re: [PATCH 10/13] imx: load calibration parameters from fuse for
> i.MX8MP
> 
> Hi Peng,
> 
> On Sun, May 3, 2020 at 8:39 PM Peng Fan <peng.fan at nxp.com> wrote:
> 
> > 5.4.3 upstream kernel + latest upstream boot?
> 
> No, I meant imx_5.4.3_2.0.0 NXP kernel + latest upstream U-Boot.
> 
> > Disable busfreq, try clk_ignore_unused?
> 
> There is no way to disable busfreq from the NXP kernel. Passing
> clk_ignore_unused does not help either.

Busfreq could be disabled by set the device tree node to disabled.

> 
> I have also tried to boot NXP 5.4.3 on a i.MX8MM EVK with the latest U-Boot
> and I also observe a hang.

I'll give a try tomorrow when I back to office. There is a ARM clock issue that
could cause all i.MX8M kernel hang, but that should be a bit late, should not
be that early just after console enabled.

Regards,
Peng.
Fabio Estevam May 6, 2020, 4:14 p.m. UTC | #5
Hi Peng,

On Mon, May 4, 2020 at 11:50 PM Peng Fan <peng.fan at nxp.com> wrote:

> Busfreq could be disabled by set the device tree node to disabled.

This does not help. If I use the NXP U-Boot I can boot the NXP 5.4.3
without problems.

> > I have also tried to boot NXP 5.4.3 on a i.MX8MM EVK with the latest U-Boot
> > and I also observe a hang.
>
> I'll give a try tomorrow when I back to office. There is a ARM clock issue that
> could cause all i.MX8M kernel hang, but that should be a bit late, should not
> be that early just after console enabled.

Currently, we can not even boot to the U-Boot prompt with mainline U-Boot.

Reverting f24dea4e1b ("ARM: imx8m: Fix reset in SPL on NXP iMX8MP
EVK") allows it to boot again.

As discussed in the other thread, this means that the i.MX8MP clock
driver is broken.

Please let me know if you can look at these issues.

Thanks
Peng Fan May 7, 2020, 12:08 a.m. UTC | #6
> Subject: Re: [PATCH 10/13] imx: load calibration parameters from fuse for
> i.MX8MP
> 
> Hi Peng,
> 
> On Mon, May 4, 2020 at 11:50 PM Peng Fan <peng.fan at nxp.com> wrote:
> 
> > Busfreq could be disabled by set the device tree node to disabled.
> 
> This does not help. If I use the NXP U-Boot I can boot the NXP 5.4.3 without
> problems.
> 
> > > I have also tried to boot NXP 5.4.3 on a i.MX8MM EVK with the latest
> > > U-Boot and I also observe a hang.
> >
> > I'll give a try tomorrow when I back to office. There is a ARM clock
> > issue that could cause all i.MX8M kernel hang, but that should be a
> > bit late, should not be that early just after console enabled.
> 
> Currently, we can not even boot to the U-Boot prompt with mainline U-Boot.
> 
> Reverting f24dea4e1b ("ARM: imx8m: Fix reset in SPL on NXP iMX8MP
> EVK") allows it to boot again.
> 
> As discussed in the other thread, this means that the i.MX8MP clock driver is
> broken.
> 
> Please let me know if you can look at these issues.

I'll give a look. Thanks for raising the issue.

Thanks,
Peng.

> 
> Thanks
Fabio Estevam May 7, 2020, 2:11 a.m. UTC | #7
Hi Peng,

On Wed, May 6, 2020 at 9:08 PM Peng Fan <peng.fan at nxp.com> wrote:

> I'll give a look. Thanks for raising the issue.

I understand the issue now. I will send a patch soon.

Thanks
Stefano Babic May 11, 2020, 10:19 a.m. UTC | #8
> From: Ye Li <ye.li at nxp.com>
> i.MX8MP thermal which has two probes and supports temperature range
> from -40 to 125.  The driver still uses default 1p HW
> calibration at 25C and loads calibration parameters from fuse.
> Reviewed-by: Peng Fan <peng.fan at nxp.com>
> Signed-off-by: Ye Li <ye.li at nxp.com>
> Signed-off-by: Peng Fan <peng.fan at nxp.com>
Applied to u-boot-imx, master, thanks !

Best regards,
Stefano Babic
diff mbox series

Patch

diff --git a/arch/arm/mach-imx/imx8m/soc.c b/arch/arm/mach-imx/imx8m/soc.c
index 1f42455aa0..adb444b240 100644
--- a/arch/arm/mach-imx/imx8m/soc.c
+++ b/arch/arm/mach-imx/imx8m/soc.c
@@ -425,4 +425,49 @@  void imx_tmu_arch_init(void *reg_base)
 		writel((tca_en << 31) | (tca_hr << 16) | tca_rt,
 		       (ulong)reg_base + 0x30);
 	}
+#ifdef CONFIG_IMX8MP
+	/* Load TCALIV0/1/m40 and TRIM from fuses */
+	struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
+	struct fuse_bank *bank = &ocotp->bank[38];
+	struct fuse_bank38_regs *fuse =
+		(struct fuse_bank38_regs *)bank->fuse_regs;
+	struct fuse_bank *bank2 = &ocotp->bank[39];
+	struct fuse_bank39_regs *fuse2 =
+		(struct fuse_bank39_regs *)bank2->fuse_regs;
+	u32 buf_vref, buf_slope, bjt_cur, vlsb, bgr;
+	u32 reg;
+	u32 tca40[2], tca25[2], tca105[2];
+
+	/* For blank sample */
+	if (!fuse->ana_trim2 && !fuse->ana_trim3 &&
+	    !fuse->ana_trim4 && !fuse2->ana_trim5) {
+		/* Use a default 25C binary codes */
+		tca25[0] = 1596;
+		writel(tca25[0], (ulong)reg_base + 0x30);
+		return;
+	}
+
+	buf_vref = (fuse->ana_trim2 & 0xc0) >> 6;
+	buf_slope = (fuse->ana_trim2 & 0xF00) >> 8;
+	bjt_cur = (fuse->ana_trim2 & 0xF000) >> 12;
+	bgr = (fuse->ana_trim2 & 0xF0000) >> 16;
+	vlsb = (fuse->ana_trim2 & 0xF00000) >> 20;
+	writel(buf_vref | (buf_slope << 16), (ulong)reg_base + 0x28);
+
+	reg = (bgr << 28) | (bjt_cur << 20) | (vlsb << 12) | (1 << 7);
+	writel(reg, (ulong)reg_base + 0x3c);
+
+	tca40[0] = (fuse->ana_trim3 & 0xFFF0000) >> 16;
+	tca25[0] = (fuse->ana_trim3 & 0xF0000000) >> 28;
+	tca25[0] |= ((fuse->ana_trim4 & 0xFF) << 4);
+	tca105[0] = (fuse->ana_trim4 & 0xFFF00) >> 8;
+	tca40[1] = (fuse->ana_trim4 & 0xFFF00000) >> 20;
+	tca25[1] = fuse2->ana_trim5 & 0xFFF;
+	tca105[1] = (fuse2->ana_trim5 & 0xFFF000) >> 12;
+
+	/* use 25c for 1p calibration */
+	writel(tca25[0] | (tca105[0] << 16), (ulong)reg_base + 0x30);
+	writel(tca25[1] | (tca105[1] << 16), (ulong)reg_base + 0x34);
+	writel(tca40[0] | (tca40[1] << 16), (ulong)reg_base + 0x38);
+#endif
 }