diff mbox series

[v2,20/23] phytec: Drop pcm051

Message ID 20200527125637.149189-21-jagan@amarulasolutions.com
State New
Headers show
Series spi: dm-conversion (part1) | expand

Commit Message

Jagan Teki May 27, 2020, 12:56 p.m. UTC 
OF_CONTROL, DM_SPI and other driver model migration deadlines
are expired for this board.

Drop it.

Cc: Lars Poeschel <poeschel at lemonage.de>
Signed-off-by: Jagan Teki <jagan at amarulasolutions.com>
---
Changes for v2:
- new patch

 arch/arm/Kconfig                   |   1 -
 arch/arm/mach-omap2/am33xx/Kconfig |   7 -
 board/phytec/pcm051/Kconfig        |  15 --
 board/phytec/pcm051/MAINTAINERS    |   7 -
 board/phytec/pcm051/Makefile       |  11 --
 board/phytec/pcm051/board.c        | 258 -----------------------------
 board/phytec/pcm051/board.h        |  24 ---
 board/phytec/pcm051/mux.c          | 127 --------------
 configs/pcm051_rev1_defconfig      |  60 -------
 configs/pcm051_rev3_defconfig      |  60 -------
 include/configs/pcm051.h           | 128 --------------
 11 files changed, 698 deletions(-)
 delete mode 100644 board/phytec/pcm051/Kconfig
 delete mode 100644 board/phytec/pcm051/MAINTAINERS
 delete mode 100644 board/phytec/pcm051/Makefile
 delete mode 100644 board/phytec/pcm051/board.c
 delete mode 100644 board/phytec/pcm051/board.h
 delete mode 100644 board/phytec/pcm051/mux.c
 delete mode 100644 configs/pcm051_rev1_defconfig
 delete mode 100644 configs/pcm051_rev3_defconfig
 delete mode 100644 include/configs/pcm051.h

Comments

Lars Poeschel May 27, 2020, 2:10 p.m. UTC | #1 
On Wed, May 27, 2020 at 06:26:34PM +0530, Jagan Teki wrote:
> OF_CONTROL, DM_SPI and other driver model migration deadlines
> are expired for this board.
> 
> Drop it.

Acked-by: Lars Poeschel <poeschel at lemonage.de>

> 
> Cc: Lars Poeschel <poeschel at lemonage.de>
> Signed-off-by: Jagan Teki <jagan at amarulasolutions.com>
> ---
> Changes for v2:
> - new patch
> 
>  arch/arm/Kconfig                   |   1 -
>  arch/arm/mach-omap2/am33xx/Kconfig |   7 -
>  board/phytec/pcm051/Kconfig        |  15 --
>  board/phytec/pcm051/MAINTAINERS    |   7 -
>  board/phytec/pcm051/Makefile       |  11 --
>  board/phytec/pcm051/board.c        | 258 -----------------------------
>  board/phytec/pcm051/board.h        |  24 ---
>  board/phytec/pcm051/mux.c          | 127 --------------
>  configs/pcm051_rev1_defconfig      |  60 -------
>  configs/pcm051_rev3_defconfig      |  60 -------
>  include/configs/pcm051.h           | 128 --------------
>  11 files changed, 698 deletions(-)
>  delete mode 100644 board/phytec/pcm051/Kconfig
>  delete mode 100644 board/phytec/pcm051/MAINTAINERS
>  delete mode 100644 board/phytec/pcm051/Makefile
>  delete mode 100644 board/phytec/pcm051/board.c
>  delete mode 100644 board/phytec/pcm051/board.h
>  delete mode 100644 board/phytec/pcm051/mux.c
>  delete mode 100644 configs/pcm051_rev1_defconfig
>  delete mode 100644 configs/pcm051_rev3_defconfig
>  delete mode 100644 include/configs/pcm051.h
> 
> diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
> index 9d3f00120f..7f328e6afe 100644
> --- a/arch/arm/Kconfig
> +++ b/arch/arm/Kconfig
> @@ -1904,7 +1904,6 @@ source "board/hisilicon/hikey/Kconfig"
>  source "board/hisilicon/hikey960/Kconfig"
>  source "board/hisilicon/poplar/Kconfig"
>  source "board/isee/igep003x/Kconfig"
> -source "board/phytec/pcm051/Kconfig"
>  source "board/silica/pengwyn/Kconfig"
>  source "board/spear/spear300/Kconfig"
>  source "board/spear/spear310/Kconfig"
> diff --git a/arch/arm/mach-omap2/am33xx/Kconfig b/arch/arm/mach-omap2/am33xx/Kconfig
> index bb8959e7a7..60e5ec5684 100644
> --- a/arch/arm/mach-omap2/am33xx/Kconfig
> +++ b/arch/arm/mach-omap2/am33xx/Kconfig
> @@ -146,13 +146,6 @@ config TARGET_ETAMIN
>  	select DM_SERIAL
>  	imply CMD_DM
>  
> -config TARGET_PCM051
> -	bool "Support pcm051"
> -	select DM
> -	select DM_GPIO
> -	select DM_SERIAL
> -	imply CMD_DM
> -
>  config TARGET_PENGWYN
>  	bool "Support pengwyn"
>  	select DM
> diff --git a/board/phytec/pcm051/Kconfig b/board/phytec/pcm051/Kconfig
> deleted file mode 100644
> index 2cc0d8872d..0000000000
> --- a/board/phytec/pcm051/Kconfig
> +++ /dev/null
> @@ -1,15 +0,0 @@
> -if TARGET_PCM051
> -
> -config SYS_BOARD
> -	default "pcm051"
> -
> -config SYS_VENDOR
> -	default "phytec"
> -
> -config SYS_SOC
> -	default "am33xx"
> -
> -config SYS_CONFIG_NAME
> -	default "pcm051"
> -
> -endif
> diff --git a/board/phytec/pcm051/MAINTAINERS b/board/phytec/pcm051/MAINTAINERS
> deleted file mode 100644
> index 18ea636a83..0000000000
> --- a/board/phytec/pcm051/MAINTAINERS
> +++ /dev/null
> @@ -1,7 +0,0 @@
> -PCM051 BOARD
> -M:	Lars Poeschel <poeschel at lemonage.de>
> -S:	Maintained
> -F:	board/phytec/pcm051/
> -F:	include/configs/pcm051.h
> -F:	configs/pcm051_rev1_defconfig
> -F:	configs/pcm051_rev3_defconfig
> diff --git a/board/phytec/pcm051/Makefile b/board/phytec/pcm051/Makefile
> deleted file mode 100644
> index ff6f8b4221..0000000000
> --- a/board/phytec/pcm051/Makefile
> +++ /dev/null
> @@ -1,11 +0,0 @@
> -# SPDX-License-Identifier: GPL-2.0+
> -#
> -# Makefile
> -#
> -# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
> -
> -ifdef CONFIG_SPL_BUILD
> -obj-y	+= mux.o
> -endif
> -
> -obj-y	+= board.o
> diff --git a/board/phytec/pcm051/board.c b/board/phytec/pcm051/board.c
> deleted file mode 100644
> index 6f1ada82c4..0000000000
> --- a/board/phytec/pcm051/board.c
> +++ /dev/null
> @@ -1,258 +0,0 @@
> -// SPDX-License-Identifier: GPL-2.0+
> -/*
> - * board.c
> - *
> - * Board functions for Phytec phyCORE-AM335x (pcm051) based boards
> - *
> - * Copyright (C) 2013 Lemonage Software GmbH
> - * Author Lars Poeschel <poeschel at lemonage.de>
> - */
> -
> -#include <common.h>
> -#include <env.h>
> -#include <errno.h>
> -#include <init.h>
> -#include <net.h>
> -#include <spl.h>
> -#include <asm/arch/cpu.h>
> -#include <asm/arch/hardware.h>
> -#include <asm/arch/omap.h>
> -#include <asm/arch/ddr_defs.h>
> -#include <asm/arch/clock.h>
> -#include <asm/arch/gpio.h>
> -#include <asm/arch/mmc_host_def.h>
> -#include <asm/arch/sys_proto.h>
> -#include <asm/io.h>
> -#include <asm/emif.h>
> -#include <asm/gpio.h>
> -#include <i2c.h>
> -#include <miiphy.h>
> -#include <cpsw.h>
> -#include "board.h"
> -
> -DECLARE_GLOBAL_DATA_PTR;
> -
> -/* MII mode defines */
> -#define RMII_RGMII2_MODE_ENABLE	0x49
> -
> -static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
> -
> -#ifdef CONFIG_SPL_BUILD
> -
> -/* DDR RAM defines */
> -#define DDR_CLK_MHZ		303 /* DDR_DPLL_MULT value */
> -
> -#define OSC	(V_OSCK/1000000)
> -const struct dpll_params dpll_ddr = {
> -		DDR_CLK_MHZ, OSC-1, 1, -1, -1, -1, -1};
> -
> -const struct dpll_params *get_dpll_ddr_params(void)
> -{
> -	return &dpll_ddr;
> -}
> -
> -#ifdef CONFIG_REV1
> -const struct ctrl_ioregs ioregs = {
> -	.cm0ioctl		= MT41J256M8HX15E_IOCTRL_VALUE,
> -	.cm1ioctl		= MT41J256M8HX15E_IOCTRL_VALUE,
> -	.cm2ioctl		= MT41J256M8HX15E_IOCTRL_VALUE,
> -	.dt0ioctl		= MT41J256M8HX15E_IOCTRL_VALUE,
> -	.dt1ioctl		= MT41J256M8HX15E_IOCTRL_VALUE,
> -};
> -
> -static const struct ddr_data ddr3_data = {
> -	.datardsratio0 = MT41J256M8HX15E_RD_DQS,
> -	.datawdsratio0 = MT41J256M8HX15E_WR_DQS,
> -	.datafwsratio0 = MT41J256M8HX15E_PHY_FIFO_WE,
> -	.datawrsratio0 = MT41J256M8HX15E_PHY_WR_DATA,
> -};
> -
> -static const struct cmd_control ddr3_cmd_ctrl_data = {
> -	.cmd0csratio = MT41J256M8HX15E_RATIO,
> -	.cmd0iclkout = MT41J256M8HX15E_INVERT_CLKOUT,
> -
> -	.cmd1csratio = MT41J256M8HX15E_RATIO,
> -	.cmd1iclkout = MT41J256M8HX15E_INVERT_CLKOUT,
> -
> -	.cmd2csratio = MT41J256M8HX15E_RATIO,
> -	.cmd2iclkout = MT41J256M8HX15E_INVERT_CLKOUT,
> -};
> -
> -static struct emif_regs ddr3_emif_reg_data = {
> -	.sdram_config = MT41J256M8HX15E_EMIF_SDCFG,
> -	.ref_ctrl = MT41J256M8HX15E_EMIF_SDREF,
> -	.sdram_tim1 = MT41J256M8HX15E_EMIF_TIM1,
> -	.sdram_tim2 = MT41J256M8HX15E_EMIF_TIM2,
> -	.sdram_tim3 = MT41J256M8HX15E_EMIF_TIM3,
> -	.zq_config = MT41J256M8HX15E_ZQ_CFG,
> -	.emif_ddr_phy_ctlr_1 = MT41J256M8HX15E_EMIF_READ_LATENCY |
> -				PHY_EN_DYN_PWRDN,
> -};
> -
> -void sdram_init(void)
> -{
> -	config_ddr(DDR_CLK_MHZ, &ioregs, &ddr3_data,
> -		   &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0);
> -}
> -#else
> -const struct ctrl_ioregs ioregs = {
> -	.cm0ioctl		= MT41K256M16HA125E_IOCTRL_VALUE,
> -	.cm1ioctl		= MT41K256M16HA125E_IOCTRL_VALUE,
> -	.cm2ioctl		= MT41K256M16HA125E_IOCTRL_VALUE,
> -	.dt0ioctl		= MT41K256M16HA125E_IOCTRL_VALUE,
> -	.dt1ioctl		= MT41K256M16HA125E_IOCTRL_VALUE,
> -};
> -
> -static const struct ddr_data ddr3_data = {
> -	.datardsratio0 = MT41K256M16HA125E_RD_DQS,
> -	.datawdsratio0 = MT41K256M16HA125E_WR_DQS,
> -	.datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE,
> -	.datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA,
> -};
> -
> -static const struct cmd_control ddr3_cmd_ctrl_data = {
> -	.cmd0csratio = MT41K256M16HA125E_RATIO,
> -	.cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
> -
> -	.cmd1csratio = MT41K256M16HA125E_RATIO,
> -	.cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
> -
> -	.cmd2csratio = MT41K256M16HA125E_RATIO,
> -	.cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
> -};
> -
> -static struct emif_regs ddr3_emif_reg_data = {
> -	.sdram_config = MT41K256M16HA125E_EMIF_SDCFG,
> -	.ref_ctrl = MT41K256M16HA125E_EMIF_SDREF,
> -	.sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1,
> -	.sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2,
> -	.sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3,
> -	.zq_config = MT41K256M16HA125E_ZQ_CFG,
> -	.emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY |
> -				PHY_EN_DYN_PWRDN,
> -};
> -
> -void sdram_init(void)
> -{
> -	config_ddr(DDR_CLK_MHZ, &ioregs, &ddr3_data,
> -		   &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0);
> -}
> -#endif
> -
> -void set_uart_mux_conf(void)
> -{
> -	enable_uart0_pin_mux();
> -}
> -
> -void set_mux_conf_regs(void)
> -{
> -	/* Initalize the board header */
> -	enable_i2c0_pin_mux();
> -	i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
> -
> -	enable_board_pin_mux();
> -}
> -#endif
> -
> -/*
> - * Basic board specific setup.  Pinmux has been handled already.
> - */
> -int board_init(void)
> -{
> -	i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
> -
> -	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
> -
> -	return 0;
> -}
> -
> -#ifdef CONFIG_DRIVER_TI_CPSW
> -static void cpsw_control(int enabled)
> -{
> -	/* VTP can be added here */
> -
> -	return;
> -}
> -
> -static struct cpsw_slave_data cpsw_slaves[] = {
> -	{
> -		.slave_reg_ofs	= 0x208,
> -		.sliver_reg_ofs	= 0xd80,
> -		.phy_addr	= 0,
> -		.phy_if		= PHY_INTERFACE_MODE_RGMII,
> -	},
> -	{
> -		.slave_reg_ofs	= 0x308,
> -		.sliver_reg_ofs	= 0xdc0,
> -		.phy_addr	= 1,
> -		.phy_if		= PHY_INTERFACE_MODE_RGMII,
> -	},
> -};
> -
> -static struct cpsw_platform_data cpsw_data = {
> -	.mdio_base		= CPSW_MDIO_BASE,
> -	.cpsw_base		= CPSW_BASE,
> -	.mdio_div		= 0xff,
> -	.channels		= 8,
> -	.cpdma_reg_ofs		= 0x800,
> -	.slaves			= 1,
> -	.slave_data		= cpsw_slaves,
> -	.ale_reg_ofs		= 0xd00,
> -	.ale_entries		= 1024,
> -	.host_port_reg_ofs	= 0x108,
> -	.hw_stats_reg_ofs	= 0x900,
> -	.bd_ram_ofs		= 0x2000,
> -	.mac_control		= (1 << 5),
> -	.control		= cpsw_control,
> -	.host_port_num		= 0,
> -	.version		= CPSW_CTRL_VERSION_2,
> -};
> -#endif
> -
> -#if defined(CONFIG_DRIVER_TI_CPSW) || \
> -	(defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET))
> -int board_eth_init(bd_t *bis)
> -{
> -	int rv, n = 0;
> -#ifdef CONFIG_DRIVER_TI_CPSW
> -	uint8_t mac_addr[6];
> -	uint32_t mac_hi, mac_lo;
> -
> -	if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
> -		printf("<ethaddr> not set. Reading from E-fuse\n");
> -		/* try reading mac address from efuse */
> -		mac_lo = readl(&cdev->macid0l);
> -		mac_hi = readl(&cdev->macid0h);
> -		mac_addr[0] = mac_hi & 0xFF;
> -		mac_addr[1] = (mac_hi & 0xFF00) >> 8;
> -		mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
> -		mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
> -		mac_addr[4] = mac_lo & 0xFF;
> -		mac_addr[5] = (mac_lo & 0xFF00) >> 8;
> -
> -		if (is_valid_ethaddr(mac_addr))
> -			eth_env_set_enetaddr("ethaddr", mac_addr);
> -		else
> -			goto try_usbether;
> -	}
> -
> -	writel(RMII_RGMII2_MODE_ENABLE, &cdev->miisel);
> -
> -	rv = cpsw_register(&cpsw_data);
> -	if (rv < 0)
> -		printf("Error %d registering CPSW switch\n", rv);
> -	else
> -		n += rv;
> -try_usbether:
> -#endif
> -
> -#if defined(CONFIG_USB_ETHER) && !defined(CONFIG_SPL_BUILD)
> -	rv = usb_eth_initialize(bis);
> -	if (rv < 0)
> -		printf("Error %d registering USB_ETHER\n", rv);
> -	else
> -		n += rv;
> -#endif
> -	return n;
> -}
> -#endif
> diff --git a/board/phytec/pcm051/board.h b/board/phytec/pcm051/board.h
> deleted file mode 100644
> index 3366e51c85..0000000000
> --- a/board/phytec/pcm051/board.h
> +++ /dev/null
> @@ -1,24 +0,0 @@
> -/* SPDX-License-Identifier: GPL-2.0+ */
> -/*
> - * board.h
> - *
> - * Phytec phyCORE-AM335x (pcm051) boards information header
> - *
> - * Copyright (C) 2013, Lemonage Software GmbH
> - * Author Lars Poeschel <poeschel at lemonage.de>
> - */
> -
> -#ifndef _BOARD_H_
> -#define _BOARD_H_
> -
> -/*
> - * We have three pin mux functions that must exist.  We must be able to enable
> - * uart0, for initial output and i2c0 to read the main EEPROM.  We then have a
> - * main pinmux function that can be overridden to enable all other pinmux that
> - * is required on the board.
> - */
> -void enable_uart0_pin_mux(void);
> -void enable_i2c0_pin_mux(void);
> -void enable_board_pin_mux(void);
> -void enable_cbmux_pin_mux(void);
> -#endif
> diff --git a/board/phytec/pcm051/mux.c b/board/phytec/pcm051/mux.c
> deleted file mode 100644
> index 9bca8eae9f..0000000000
> --- a/board/phytec/pcm051/mux.c
> +++ /dev/null
> @@ -1,127 +0,0 @@
> -/*
> - * mux.c
> - *
> - * Copyright (C) 2013 Lemonage Software GmbH
> - * Author Lars Poeschel <poeschel at lemonage.de>
> - *
> - * This program is free software; you can redistribute it and/or
> - * modify it under the terms of the GNU General Public License as
> - * published by the Free Software Foundation version 2.
> - *
> - * This program is distributed "as is" WITHOUT ANY WARRANTY of any
> - * kind, whether express or implied; without even the implied warranty
> - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
> - * GNU General Public License for more details.
> - */
> -
> -#include <common.h>
> -#include <asm/arch/sys_proto.h>
> -#include <asm/arch/hardware.h>
> -#include <asm/arch/mux.h>
> -#include <asm/io.h>
> -#include "board.h"
> -
> -static struct module_pin_mux uart0_pin_mux[] = {
> -	{OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* UART0_RXD */
> -	{OFFSET(uart0_txd), (MODE(0) | PULLUDEN)},		/* UART0_TXD */
> -	{-1},
> -};
> -
> -#ifdef CONFIG_MMC
> -static struct module_pin_mux mmc0_pin_mux[] = {
> -	{OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_DAT3 */
> -	{OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_DAT2 */
> -	{OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_DAT1 */
> -	{OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_DAT0 */
> -	{OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_CLK */
> -	{OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_CMD */
> -	{OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)},	/* MMC0_CD */
> -	{-1},
> -};
> -#endif
> -
> -#ifdef CONFIG_I2C
> -static struct module_pin_mux i2c0_pin_mux[] = {
> -	{OFFSET(i2c0_sda), (MODE(0) | RXACTIVE |
> -			PULLUDEN | SLEWCTRL)}, /* I2C_DATA */
> -	{OFFSET(i2c0_scl), (MODE(0) | RXACTIVE |
> -			PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */
> -	{-1},
> -};
> -#endif
> -
> -#ifdef CONFIG_SPI
> -static struct module_pin_mux spi0_pin_mux[] = {
> -	{OFFSET(spi0_sclk), (MODE(0) | RXACTIVE | PULLUDEN)},	/* SPI0_SCLK */
> -	{OFFSET(spi0_d0), (MODE(0) | RXACTIVE |
> -			PULLUDEN | PULLUP_EN)},			/* SPI0_D0 */
> -	{OFFSET(spi0_d1), (MODE(0) | RXACTIVE | PULLUDEN)},	/* SPI0_D1 */
> -	{OFFSET(spi0_cs0), (MODE(0) | RXACTIVE |
> -			PULLUDEN | PULLUP_EN)},			/* SPI0_CS0 */
> -	{-1},
> -};
> -#endif
> -
> -static struct module_pin_mux rmii1_pin_mux[] = {
> -	{OFFSET(mii1_crs), MODE(1) | RXACTIVE},     /* RMII1_CRS */
> -	{OFFSET(mii1_rxerr), MODE(1) | RXACTIVE},   /* RMII1_RXERR */
> -	{OFFSET(mii1_txen), MODE(1)},               /* RMII1_TXEN */
> -	{OFFSET(mii1_txd1), MODE(1)},               /* RMII1_TXD1 */
> -	{OFFSET(mii1_txd0), MODE(1)},               /* RMII1_TXD0 */
> -	{OFFSET(mii1_rxd1), MODE(1) | RXACTIVE},    /* RMII1_RXD1 */
> -	{OFFSET(mii1_rxd0), MODE(1) | RXACTIVE},    /* RMII1_RXD0 */
> -	{OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN}, /* MDIO_DATA */
> -	{OFFSET(mdio_clk), MODE(0) | PULLUP_EN},    /* MDIO_CLK */
> -	{OFFSET(rmii1_refclk), MODE(0) | RXACTIVE}, /* RMII1_REFCLK */
> -	{-1},
> -};
> -
> -static struct module_pin_mux cbmux_pin_mux[] = {
> -	{OFFSET(uart0_ctsn), MODE(7) | RXACTIVE | PULLDOWN_EN}, /* JP3 */
> -	{OFFSET(uart0_rtsn), MODE(7) | RXACTIVE | PULLUP_EN},	/* JP4 */
> -	{-1},
> -};
> -
> -#ifdef CONFIG_MTD_RAW_NAND
> -static struct module_pin_mux nand_pin_mux[] = {
> -	{OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD0 */
> -	{OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD1 */
> -	{OFFSET(gpmc_ad2), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD2 */
> -	{OFFSET(gpmc_ad3), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD3 */
> -	{OFFSET(gpmc_ad4), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD4 */
> -	{OFFSET(gpmc_ad5), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD5 */
> -	{OFFSET(gpmc_ad6), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD6 */
> -	{OFFSET(gpmc_ad7), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD7 */
> -	{OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */
> -	{OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN | RXACTIVE)},	/* NAND_WPN */
> -	{OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)},	/* NAND_CS0 */
> -	{OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */
> -	{OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)},	/* NAND_OE */
> -	{OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)},	/* NAND_WEN */
> -	{OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)},	/* NAND_BE_CLE */
> -	{-1},
> -};
> -#endif
> -
> -void enable_uart0_pin_mux(void)
> -{
> -	configure_module_pin_mux(uart0_pin_mux);
> -}
> -
> -void enable_i2c0_pin_mux(void)
> -{
> -	configure_module_pin_mux(i2c0_pin_mux);
> -}
> -
> -void enable_board_pin_mux()
> -{
> -	configure_module_pin_mux(rmii1_pin_mux);
> -	configure_module_pin_mux(mmc0_pin_mux);
> -	configure_module_pin_mux(cbmux_pin_mux);
> -#ifdef CONFIG_MTD_RAW_NAND
> -	configure_module_pin_mux(nand_pin_mux);
> -#endif
> -#ifdef CONFIG_SPI
> -	configure_module_pin_mux(spi0_pin_mux);
> -#endif
> -}
> diff --git a/configs/pcm051_rev1_defconfig b/configs/pcm051_rev1_defconfig
> deleted file mode 100644
> index ea7a0769f2..0000000000
> --- a/configs/pcm051_rev1_defconfig
> +++ /dev/null
> @@ -1,60 +0,0 @@
> -CONFIG_ARM=y
> -CONFIG_ARCH_CPU_INIT=y
> -CONFIG_ARCH_OMAP2PLUS=y
> -CONFIG_SPL_GPIO_SUPPORT=y
> -CONFIG_SPL_LIBCOMMON_SUPPORT=y
> -CONFIG_SPL_LIBGENERIC_SUPPORT=y
> -CONFIG_AM33XX=y
> -CONFIG_TARGET_PCM051=y
> -CONFIG_SPL_MMC_SUPPORT=y
> -CONFIG_SPL_SERIAL_SUPPORT=y
> -CONFIG_SPL=y
> -CONFIG_SPL_FS_FAT=y
> -CONFIG_SPL_LIBDISK_SUPPORT=y
> -CONFIG_DISTRO_DEFAULTS=y
> -CONFIG_SYS_EXTRA_OPTIONS="REV1"
> -# CONFIG_USE_BOOTCOMMAND is not set
> -CONFIG_SYS_CONSOLE_INFO_QUIET=y
> -CONFIG_VERSION_VARIABLE=y
> -CONFIG_ARCH_MISC_INIT=y
> -CONFIG_SPL_ENV_SUPPORT=y
> -CONFIG_SPL_ETH_SUPPORT=y
> -CONFIG_SPL_FS_EXT4=y
> -CONFIG_SPL_I2C_SUPPORT=y
> -# CONFIG_SPL_NAND_SUPPORT is not set
> -CONFIG_SPL_NET_SUPPORT=y
> -CONFIG_SPL_NET_VCI_STRING="pcm051 U-Boot SPL"
> -CONFIG_SPL_OS_BOOT=y
> -CONFIG_SPL_POWER_SUPPORT=y
> -CONFIG_SPL_WATCHDOG_SUPPORT=y
> -CONFIG_SPL_YMODEM_SUPPORT=y
> -CONFIG_CMD_SPL=y
> -CONFIG_CMD_ASKENV=y
> -CONFIG_CMD_EEPROM=y
> -CONFIG_CMD_GPIO=y
> -CONFIG_CMD_I2C=y
> -CONFIG_CMD_MMC=y
> -CONFIG_CMD_SF=y
> -CONFIG_CMD_SPI=y
> -CONFIG_CMD_USB=y
> -# CONFIG_CMD_SETEXPR is not set
> -CONFIG_CMD_EXT4_WRITE=y
> -CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> -CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
> -CONFIG_MMC_OMAP_HS=y
> -CONFIG_SPI_FLASH=y
> -CONFIG_SF_DEFAULT_SPEED=24000000
> -CONFIG_SPI_FLASH_WINBOND=y
> -CONFIG_PHY_SMSC=y
> -CONFIG_MII=y
> -CONFIG_DRIVER_TI_CPSW=y
> -CONFIG_SPI=y
> -CONFIG_OMAP3_SPI=y
> -CONFIG_USB=y
> -CONFIG_USB_MUSB_HOST=y
> -CONFIG_USB_MUSB_GADGET=y
> -CONFIG_USB_MUSB_DSPS=y
> -CONFIG_USB_GADGET=y
> -CONFIG_USB_ETHER=y
> -CONFIG_FAT_WRITE=y
> -CONFIG_OF_LIBFDT=y
> diff --git a/configs/pcm051_rev3_defconfig b/configs/pcm051_rev3_defconfig
> deleted file mode 100644
> index 43e64630ab..0000000000
> --- a/configs/pcm051_rev3_defconfig
> +++ /dev/null
> @@ -1,60 +0,0 @@
> -CONFIG_ARM=y
> -CONFIG_ARCH_CPU_INIT=y
> -CONFIG_ARCH_OMAP2PLUS=y
> -CONFIG_SPL_GPIO_SUPPORT=y
> -CONFIG_SPL_LIBCOMMON_SUPPORT=y
> -CONFIG_SPL_LIBGENERIC_SUPPORT=y
> -CONFIG_AM33XX=y
> -CONFIG_TARGET_PCM051=y
> -CONFIG_SPL_MMC_SUPPORT=y
> -CONFIG_SPL_SERIAL_SUPPORT=y
> -CONFIG_SPL=y
> -CONFIG_SPL_FS_FAT=y
> -CONFIG_SPL_LIBDISK_SUPPORT=y
> -CONFIG_DISTRO_DEFAULTS=y
> -CONFIG_SYS_EXTRA_OPTIONS="REV3"
> -# CONFIG_USE_BOOTCOMMAND is not set
> -CONFIG_SYS_CONSOLE_INFO_QUIET=y
> -CONFIG_VERSION_VARIABLE=y
> -CONFIG_ARCH_MISC_INIT=y
> -CONFIG_SPL_ENV_SUPPORT=y
> -CONFIG_SPL_ETH_SUPPORT=y
> -CONFIG_SPL_FS_EXT4=y
> -CONFIG_SPL_I2C_SUPPORT=y
> -# CONFIG_SPL_NAND_SUPPORT is not set
> -CONFIG_SPL_NET_SUPPORT=y
> -CONFIG_SPL_NET_VCI_STRING="pcm051 U-Boot SPL"
> -CONFIG_SPL_OS_BOOT=y
> -CONFIG_SPL_POWER_SUPPORT=y
> -CONFIG_SPL_WATCHDOG_SUPPORT=y
> -CONFIG_SPL_YMODEM_SUPPORT=y
> -CONFIG_CMD_SPL=y
> -CONFIG_CMD_ASKENV=y
> -CONFIG_CMD_EEPROM=y
> -CONFIG_CMD_GPIO=y
> -CONFIG_CMD_I2C=y
> -CONFIG_CMD_MMC=y
> -CONFIG_CMD_SF=y
> -CONFIG_CMD_SPI=y
> -CONFIG_CMD_USB=y
> -# CONFIG_CMD_SETEXPR is not set
> -CONFIG_CMD_EXT4_WRITE=y
> -CONFIG_SYS_RELOC_GD_ENV_ADDR=y
> -CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
> -CONFIG_MMC_OMAP_HS=y
> -CONFIG_SPI_FLASH=y
> -CONFIG_SF_DEFAULT_SPEED=24000000
> -CONFIG_SPI_FLASH_WINBOND=y
> -CONFIG_PHY_SMSC=y
> -CONFIG_MII=y
> -CONFIG_DRIVER_TI_CPSW=y
> -CONFIG_SPI=y
> -CONFIG_OMAP3_SPI=y
> -CONFIG_USB=y
> -CONFIG_USB_MUSB_HOST=y
> -CONFIG_USB_MUSB_GADGET=y
> -CONFIG_USB_MUSB_DSPS=y
> -CONFIG_USB_GADGET=y
> -CONFIG_USB_ETHER=y
> -CONFIG_FAT_WRITE=y
> -CONFIG_OF_LIBFDT=y
> diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h
> deleted file mode 100644
> index 706a8a2a87..0000000000
> --- a/include/configs/pcm051.h
> +++ /dev/null
> @@ -1,128 +0,0 @@
> -/*
> - * pcm051.h
> - *
> - * Phytec phyCORE-AM335x (pcm051) boards information header
> - *
> - * Copyright (C) 2013 Lemonage Software GmbH
> - * Author Lars Poeschel <poeschel at lemonage.de>
> - *
> - * This program is free software; you can redistribute it and/or
> - * modify it under the terms of the GNU General Public License as
> - * published by the Free Software Foundation version 2.
> - *
> - * This program is distributed "as is" WITHOUT ANY WARRANTY of any
> - * kind, whether express or implied; without even the implied warranty
> - * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
> - * GNU General Public License for more details.
> - */
> -
> -#ifndef __CONFIG_PCM051_H
> -#define __CONFIG_PCM051_H
> -
> -#include <configs/ti_am335x_common.h>
> -
> -#define CONFIG_MACH_TYPE		MACH_TYPE_PCM051
> -
> -/* set to negative value for no autoboot */
> -#define BOOTENV_DEV_LEGACY_MMC(devtypeu, devtypel, instance) \
> -	"bootcmd_" #devtypel #instance "=" \
> -	"setenv mmcdev " #instance"; "\
> -	"setenv bootpart " #instance":2 ; "\
> -	"run mmcboot\0"
> -
> -#define BOOTENV_DEV_NAME_LEGACY_MMC(devtypeu, devtypel, instance) \
> -	#devtypel #instance " "
> -
> -#define BOOTENV_DEV_NAND(devtypeu, devtypel, instance) \
> -	"bootcmd_" #devtypel "=" \
> -	"run nandboot\0"
> -
> -#define BOOTENV_DEV_NAME_NAND(devtypeu, devtypel, instance) \
> -	#devtypel #instance " "
> -
> -#define BOOT_TARGET_DEVICES(func) \
> -	func(MMC, mmc, 0) \
> -	func(LEGACY_MMC, legacy_mmc, 0) \
> -	func(MMC, mmc, 1) \
> -	func(LEGACY_MMC, legacy_mmc, 1) \
> -	func(NAND, nand, 0)
> -
> -#define CONFIG_BOOTCOMMAND \
> -	"run distro_bootcmd"
> -
> -#include <config_distro_bootcmd.h>
> -
> -#include <environment/ti/dfu.h>
> -#include <environment/ti/mmc.h>
> -
> -#define CONFIG_EXTRA_ENV_SETTINGS \
> -	DEFAULT_LINUX_BOOT_ENV \
> -	DEFAULT_MMC_TI_ARGS \
> -	"bootfile=uImage\0" \
> -	"fdtfile=am335x-wega-rdk.dtb\0" \
> -	"console=ttyO0,115200n8\0" \
> -	"optargs=\0" \
> -	"ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \
> -	"ramrootfstype=ext2\0" \
> -	"bootenv=uEnv.txt\0" \
> -	"loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
> -	"bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
> -		"source ${loadaddr}\0" \
> -	"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
> -	"importbootenv=echo Importing environment from mmc ...; " \
> -		"env import -t $loadaddr $filesize\0" \
> -	"ramargs=setenv bootargs console=${console} " \
> -		"${optargs} " \
> -		"root=${ramroot} " \
> -		"rootfstype=${ramrootfstype}\0" \
> -	"loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
> -	"loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
> -	"loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} ${bootfile}\0" \
> -	"mmcboot=echo Booting from mmc ...; " \
> -		"run args_mmc; " \
> -		"bootm ${loadaddr}\0" \
> -	"ramboot=echo Booting from ramdisk ...; " \
> -		"run ramargs; " \
> -		"bootm ${loadaddr}\0" \
> -	BOOTENV
> -
> -/* Clock Defines */
> -#define V_OSCK				25000000  /* Clock output from T2 */
> -#define V_SCLK				(V_OSCK)
> -
> -/*
> - * memtest works on 8 MB in DRAM after skipping 32MB from
> - * start addr of ram disk
> - */
> -
> -/* NS16550 Configuration */
> -#define CONFIG_SYS_NS16550_COM1		0x44e09000	/* Base EVM has UART0 */
> -#define CONFIG_SYS_NS16550_COM2		0x48022000	/* UART1 */
> -#define CONFIG_SYS_NS16550_COM3		0x48024000	/* UART2 */
> -#define CONFIG_SYS_NS16550_COM4		0x481a6000	/* UART3 */
> -#define CONFIG_SYS_NS16550_COM5		0x481a8000	/* UART4 */
> -#define CONFIG_SYS_NS16550_COM6		0x481aa000	/* UART5 */
> -
> -/* I2C Configuration */
> -#define CONFIG_ENV_EEPROM_IS_ON_I2C
> -#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50	/* Main EEPROM */
> -#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2
> -
> -#define CONFIG_SYS_BAUDRATE_TABLE	{ 110, 300, 600, 1200, 2400, \
> -4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 }
> -
> -/* CPU */
> -
> -#ifdef CONFIG_SPI_BOOT
> -#define CONFIG_SYS_SPI_U_BOOT_SIZE	0x40000
> -#endif
> -
> -/*
> - * USB configuration
> - */
> -#define CONFIG_AM335X_USB0
> -#define CONFIG_AM335X_USB0_MODE	MUSB_PERIPHERAL
> -#define CONFIG_AM335X_USB1
> -#define CONFIG_AM335X_USB1_MODE MUSB_HOST
> -
> -#endif	/* ! __CONFIG_PCM051_H */
> -- 
> 2.25.1
>
Jagan Teki May 29, 2020, 12:40 p.m. UTC | #2 
On Wed, May 27, 2020 at 7:40 PM Lars Poeschel <poeschel at lemonage.de> wrote:
>
> On Wed, May 27, 2020 at 06:26:34PM +0530, Jagan Teki wrote:
> > OF_CONTROL, DM_SPI and other driver model migration deadlines
> > are expired for this board.
> >
> > Drop it.
>
> Acked-by: Lars Poeschel <poeschel at lemonage.de>

Slite changes on the commit message and

Applied to u-boot-spi/master
diff mbox series

Patch

diff --git a/arch/arm/Kconfig b/arch/arm/Kconfig
index 9d3f00120f..7f328e6afe 100644
--- a/arch/arm/Kconfig
+++ b/arch/arm/Kconfig
@@ -1904,7 +1904,6 @@  source "board/hisilicon/hikey/Kconfig"
 source "board/hisilicon/hikey960/Kconfig"
 source "board/hisilicon/poplar/Kconfig"
 source "board/isee/igep003x/Kconfig"
-source "board/phytec/pcm051/Kconfig"
 source "board/silica/pengwyn/Kconfig"
 source "board/spear/spear300/Kconfig"
 source "board/spear/spear310/Kconfig"
diff --git a/arch/arm/mach-omap2/am33xx/Kconfig b/arch/arm/mach-omap2/am33xx/Kconfig
index bb8959e7a7..60e5ec5684 100644
--- a/arch/arm/mach-omap2/am33xx/Kconfig
+++ b/arch/arm/mach-omap2/am33xx/Kconfig
@@ -146,13 +146,6 @@  config TARGET_ETAMIN
 	select DM_SERIAL
 	imply CMD_DM
 
-config TARGET_PCM051
-	bool "Support pcm051"
-	select DM
-	select DM_GPIO
-	select DM_SERIAL
-	imply CMD_DM
-
 config TARGET_PENGWYN
 	bool "Support pengwyn"
 	select DM
diff --git a/board/phytec/pcm051/Kconfig b/board/phytec/pcm051/Kconfig
deleted file mode 100644
index 2cc0d8872d..0000000000
--- a/board/phytec/pcm051/Kconfig
+++ /dev/null
@@ -1,15 +0,0 @@ 
-if TARGET_PCM051
-
-config SYS_BOARD
-	default "pcm051"
-
-config SYS_VENDOR
-	default "phytec"
-
-config SYS_SOC
-	default "am33xx"
-
-config SYS_CONFIG_NAME
-	default "pcm051"
-
-endif
diff --git a/board/phytec/pcm051/MAINTAINERS b/board/phytec/pcm051/MAINTAINERS
deleted file mode 100644
index 18ea636a83..0000000000
--- a/board/phytec/pcm051/MAINTAINERS
+++ /dev/null
@@ -1,7 +0,0 @@ 
-PCM051 BOARD
-M:	Lars Poeschel <poeschel at lemonage.de>
-S:	Maintained
-F:	board/phytec/pcm051/
-F:	include/configs/pcm051.h
-F:	configs/pcm051_rev1_defconfig
-F:	configs/pcm051_rev3_defconfig
diff --git a/board/phytec/pcm051/Makefile b/board/phytec/pcm051/Makefile
deleted file mode 100644
index ff6f8b4221..0000000000
--- a/board/phytec/pcm051/Makefile
+++ /dev/null
@@ -1,11 +0,0 @@ 
-# SPDX-License-Identifier: GPL-2.0+
-#
-# Makefile
-#
-# Copyright (C) 2011 Texas Instruments Incorporated - http://www.ti.com/
-
-ifdef CONFIG_SPL_BUILD
-obj-y	+= mux.o
-endif
-
-obj-y	+= board.o
diff --git a/board/phytec/pcm051/board.c b/board/phytec/pcm051/board.c
deleted file mode 100644
index 6f1ada82c4..0000000000
--- a/board/phytec/pcm051/board.c
+++ /dev/null
@@ -1,258 +0,0 @@ 
-// SPDX-License-Identifier: GPL-2.0+
-/*
- * board.c
- *
- * Board functions for Phytec phyCORE-AM335x (pcm051) based boards
- *
- * Copyright (C) 2013 Lemonage Software GmbH
- * Author Lars Poeschel <poeschel at lemonage.de>
- */
-
-#include <common.h>
-#include <env.h>
-#include <errno.h>
-#include <init.h>
-#include <net.h>
-#include <spl.h>
-#include <asm/arch/cpu.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/omap.h>
-#include <asm/arch/ddr_defs.h>
-#include <asm/arch/clock.h>
-#include <asm/arch/gpio.h>
-#include <asm/arch/mmc_host_def.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/io.h>
-#include <asm/emif.h>
-#include <asm/gpio.h>
-#include <i2c.h>
-#include <miiphy.h>
-#include <cpsw.h>
-#include "board.h"
-
-DECLARE_GLOBAL_DATA_PTR;
-
-/* MII mode defines */
-#define RMII_RGMII2_MODE_ENABLE	0x49
-
-static struct ctrl_dev *cdev = (struct ctrl_dev *)CTRL_DEVICE_BASE;
-
-#ifdef CONFIG_SPL_BUILD
-
-/* DDR RAM defines */
-#define DDR_CLK_MHZ		303 /* DDR_DPLL_MULT value */
-
-#define OSC	(V_OSCK/1000000)
-const struct dpll_params dpll_ddr = {
-		DDR_CLK_MHZ, OSC-1, 1, -1, -1, -1, -1};
-
-const struct dpll_params *get_dpll_ddr_params(void)
-{
-	return &dpll_ddr;
-}
-
-#ifdef CONFIG_REV1
-const struct ctrl_ioregs ioregs = {
-	.cm0ioctl		= MT41J256M8HX15E_IOCTRL_VALUE,
-	.cm1ioctl		= MT41J256M8HX15E_IOCTRL_VALUE,
-	.cm2ioctl		= MT41J256M8HX15E_IOCTRL_VALUE,
-	.dt0ioctl		= MT41J256M8HX15E_IOCTRL_VALUE,
-	.dt1ioctl		= MT41J256M8HX15E_IOCTRL_VALUE,
-};
-
-static const struct ddr_data ddr3_data = {
-	.datardsratio0 = MT41J256M8HX15E_RD_DQS,
-	.datawdsratio0 = MT41J256M8HX15E_WR_DQS,
-	.datafwsratio0 = MT41J256M8HX15E_PHY_FIFO_WE,
-	.datawrsratio0 = MT41J256M8HX15E_PHY_WR_DATA,
-};
-
-static const struct cmd_control ddr3_cmd_ctrl_data = {
-	.cmd0csratio = MT41J256M8HX15E_RATIO,
-	.cmd0iclkout = MT41J256M8HX15E_INVERT_CLKOUT,
-
-	.cmd1csratio = MT41J256M8HX15E_RATIO,
-	.cmd1iclkout = MT41J256M8HX15E_INVERT_CLKOUT,
-
-	.cmd2csratio = MT41J256M8HX15E_RATIO,
-	.cmd2iclkout = MT41J256M8HX15E_INVERT_CLKOUT,
-};
-
-static struct emif_regs ddr3_emif_reg_data = {
-	.sdram_config = MT41J256M8HX15E_EMIF_SDCFG,
-	.ref_ctrl = MT41J256M8HX15E_EMIF_SDREF,
-	.sdram_tim1 = MT41J256M8HX15E_EMIF_TIM1,
-	.sdram_tim2 = MT41J256M8HX15E_EMIF_TIM2,
-	.sdram_tim3 = MT41J256M8HX15E_EMIF_TIM3,
-	.zq_config = MT41J256M8HX15E_ZQ_CFG,
-	.emif_ddr_phy_ctlr_1 = MT41J256M8HX15E_EMIF_READ_LATENCY |
-				PHY_EN_DYN_PWRDN,
-};
-
-void sdram_init(void)
-{
-	config_ddr(DDR_CLK_MHZ, &ioregs, &ddr3_data,
-		   &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0);
-}
-#else
-const struct ctrl_ioregs ioregs = {
-	.cm0ioctl		= MT41K256M16HA125E_IOCTRL_VALUE,
-	.cm1ioctl		= MT41K256M16HA125E_IOCTRL_VALUE,
-	.cm2ioctl		= MT41K256M16HA125E_IOCTRL_VALUE,
-	.dt0ioctl		= MT41K256M16HA125E_IOCTRL_VALUE,
-	.dt1ioctl		= MT41K256M16HA125E_IOCTRL_VALUE,
-};
-
-static const struct ddr_data ddr3_data = {
-	.datardsratio0 = MT41K256M16HA125E_RD_DQS,
-	.datawdsratio0 = MT41K256M16HA125E_WR_DQS,
-	.datafwsratio0 = MT41K256M16HA125E_PHY_FIFO_WE,
-	.datawrsratio0 = MT41K256M16HA125E_PHY_WR_DATA,
-};
-
-static const struct cmd_control ddr3_cmd_ctrl_data = {
-	.cmd0csratio = MT41K256M16HA125E_RATIO,
-	.cmd0iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
-
-	.cmd1csratio = MT41K256M16HA125E_RATIO,
-	.cmd1iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
-
-	.cmd2csratio = MT41K256M16HA125E_RATIO,
-	.cmd2iclkout = MT41K256M16HA125E_INVERT_CLKOUT,
-};
-
-static struct emif_regs ddr3_emif_reg_data = {
-	.sdram_config = MT41K256M16HA125E_EMIF_SDCFG,
-	.ref_ctrl = MT41K256M16HA125E_EMIF_SDREF,
-	.sdram_tim1 = MT41K256M16HA125E_EMIF_TIM1,
-	.sdram_tim2 = MT41K256M16HA125E_EMIF_TIM2,
-	.sdram_tim3 = MT41K256M16HA125E_EMIF_TIM3,
-	.zq_config = MT41K256M16HA125E_ZQ_CFG,
-	.emif_ddr_phy_ctlr_1 = MT41K256M16HA125E_EMIF_READ_LATENCY |
-				PHY_EN_DYN_PWRDN,
-};
-
-void sdram_init(void)
-{
-	config_ddr(DDR_CLK_MHZ, &ioregs, &ddr3_data,
-		   &ddr3_cmd_ctrl_data, &ddr3_emif_reg_data, 0);
-}
-#endif
-
-void set_uart_mux_conf(void)
-{
-	enable_uart0_pin_mux();
-}
-
-void set_mux_conf_regs(void)
-{
-	/* Initalize the board header */
-	enable_i2c0_pin_mux();
-	i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
-
-	enable_board_pin_mux();
-}
-#endif
-
-/*
- * Basic board specific setup.  Pinmux has been handled already.
- */
-int board_init(void)
-{
-	i2c_init(CONFIG_SYS_OMAP24_I2C_SPEED, CONFIG_SYS_OMAP24_I2C_SLAVE);
-
-	gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x100;
-
-	return 0;
-}
-
-#ifdef CONFIG_DRIVER_TI_CPSW
-static void cpsw_control(int enabled)
-{
-	/* VTP can be added here */
-
-	return;
-}
-
-static struct cpsw_slave_data cpsw_slaves[] = {
-	{
-		.slave_reg_ofs	= 0x208,
-		.sliver_reg_ofs	= 0xd80,
-		.phy_addr	= 0,
-		.phy_if		= PHY_INTERFACE_MODE_RGMII,
-	},
-	{
-		.slave_reg_ofs	= 0x308,
-		.sliver_reg_ofs	= 0xdc0,
-		.phy_addr	= 1,
-		.phy_if		= PHY_INTERFACE_MODE_RGMII,
-	},
-};
-
-static struct cpsw_platform_data cpsw_data = {
-	.mdio_base		= CPSW_MDIO_BASE,
-	.cpsw_base		= CPSW_BASE,
-	.mdio_div		= 0xff,
-	.channels		= 8,
-	.cpdma_reg_ofs		= 0x800,
-	.slaves			= 1,
-	.slave_data		= cpsw_slaves,
-	.ale_reg_ofs		= 0xd00,
-	.ale_entries		= 1024,
-	.host_port_reg_ofs	= 0x108,
-	.hw_stats_reg_ofs	= 0x900,
-	.bd_ram_ofs		= 0x2000,
-	.mac_control		= (1 << 5),
-	.control		= cpsw_control,
-	.host_port_num		= 0,
-	.version		= CPSW_CTRL_VERSION_2,
-};
-#endif
-
-#if defined(CONFIG_DRIVER_TI_CPSW) || \
-	(defined(CONFIG_USB_ETHER) && defined(CONFIG_USB_MUSB_GADGET))
-int board_eth_init(bd_t *bis)
-{
-	int rv, n = 0;
-#ifdef CONFIG_DRIVER_TI_CPSW
-	uint8_t mac_addr[6];
-	uint32_t mac_hi, mac_lo;
-
-	if (!eth_env_get_enetaddr("ethaddr", mac_addr)) {
-		printf("<ethaddr> not set. Reading from E-fuse\n");
-		/* try reading mac address from efuse */
-		mac_lo = readl(&cdev->macid0l);
-		mac_hi = readl(&cdev->macid0h);
-		mac_addr[0] = mac_hi & 0xFF;
-		mac_addr[1] = (mac_hi & 0xFF00) >> 8;
-		mac_addr[2] = (mac_hi & 0xFF0000) >> 16;
-		mac_addr[3] = (mac_hi & 0xFF000000) >> 24;
-		mac_addr[4] = mac_lo & 0xFF;
-		mac_addr[5] = (mac_lo & 0xFF00) >> 8;
-
-		if (is_valid_ethaddr(mac_addr))
-			eth_env_set_enetaddr("ethaddr", mac_addr);
-		else
-			goto try_usbether;
-	}
-
-	writel(RMII_RGMII2_MODE_ENABLE, &cdev->miisel);
-
-	rv = cpsw_register(&cpsw_data);
-	if (rv < 0)
-		printf("Error %d registering CPSW switch\n", rv);
-	else
-		n += rv;
-try_usbether:
-#endif
-
-#if defined(CONFIG_USB_ETHER) && !defined(CONFIG_SPL_BUILD)
-	rv = usb_eth_initialize(bis);
-	if (rv < 0)
-		printf("Error %d registering USB_ETHER\n", rv);
-	else
-		n += rv;
-#endif
-	return n;
-}
-#endif
diff --git a/board/phytec/pcm051/board.h b/board/phytec/pcm051/board.h
deleted file mode 100644
index 3366e51c85..0000000000
--- a/board/phytec/pcm051/board.h
+++ /dev/null
@@ -1,24 +0,0 @@ 
-/* SPDX-License-Identifier: GPL-2.0+ */
-/*
- * board.h
- *
- * Phytec phyCORE-AM335x (pcm051) boards information header
- *
- * Copyright (C) 2013, Lemonage Software GmbH
- * Author Lars Poeschel <poeschel at lemonage.de>
- */
-
-#ifndef _BOARD_H_
-#define _BOARD_H_
-
-/*
- * We have three pin mux functions that must exist.  We must be able to enable
- * uart0, for initial output and i2c0 to read the main EEPROM.  We then have a
- * main pinmux function that can be overridden to enable all other pinmux that
- * is required on the board.
- */
-void enable_uart0_pin_mux(void);
-void enable_i2c0_pin_mux(void);
-void enable_board_pin_mux(void);
-void enable_cbmux_pin_mux(void);
-#endif
diff --git a/board/phytec/pcm051/mux.c b/board/phytec/pcm051/mux.c
deleted file mode 100644
index 9bca8eae9f..0000000000
--- a/board/phytec/pcm051/mux.c
+++ /dev/null
@@ -1,127 +0,0 @@ 
-/*
- * mux.c
- *
- * Copyright (C) 2013 Lemonage Software GmbH
- * Author Lars Poeschel <poeschel at lemonage.de>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
- * GNU General Public License for more details.
- */
-
-#include <common.h>
-#include <asm/arch/sys_proto.h>
-#include <asm/arch/hardware.h>
-#include <asm/arch/mux.h>
-#include <asm/io.h>
-#include "board.h"
-
-static struct module_pin_mux uart0_pin_mux[] = {
-	{OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* UART0_RXD */
-	{OFFSET(uart0_txd), (MODE(0) | PULLUDEN)},		/* UART0_TXD */
-	{-1},
-};
-
-#ifdef CONFIG_MMC
-static struct module_pin_mux mmc0_pin_mux[] = {
-	{OFFSET(mmc0_dat3), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_DAT3 */
-	{OFFSET(mmc0_dat2), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_DAT2 */
-	{OFFSET(mmc0_dat1), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_DAT1 */
-	{OFFSET(mmc0_dat0), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_DAT0 */
-	{OFFSET(mmc0_clk), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_CLK */
-	{OFFSET(mmc0_cmd), (MODE(0) | RXACTIVE | PULLUP_EN)},	/* MMC0_CMD */
-	{OFFSET(spi0_cs1), (MODE(5) | RXACTIVE | PULLUP_EN)},	/* MMC0_CD */
-	{-1},
-};
-#endif
-
-#ifdef CONFIG_I2C
-static struct module_pin_mux i2c0_pin_mux[] = {
-	{OFFSET(i2c0_sda), (MODE(0) | RXACTIVE |
-			PULLUDEN | SLEWCTRL)}, /* I2C_DATA */
-	{OFFSET(i2c0_scl), (MODE(0) | RXACTIVE |
-			PULLUDEN | SLEWCTRL)}, /* I2C_SCLK */
-	{-1},
-};
-#endif
-
-#ifdef CONFIG_SPI
-static struct module_pin_mux spi0_pin_mux[] = {
-	{OFFSET(spi0_sclk), (MODE(0) | RXACTIVE | PULLUDEN)},	/* SPI0_SCLK */
-	{OFFSET(spi0_d0), (MODE(0) | RXACTIVE |
-			PULLUDEN | PULLUP_EN)},			/* SPI0_D0 */
-	{OFFSET(spi0_d1), (MODE(0) | RXACTIVE | PULLUDEN)},	/* SPI0_D1 */
-	{OFFSET(spi0_cs0), (MODE(0) | RXACTIVE |
-			PULLUDEN | PULLUP_EN)},			/* SPI0_CS0 */
-	{-1},
-};
-#endif
-
-static struct module_pin_mux rmii1_pin_mux[] = {
-	{OFFSET(mii1_crs), MODE(1) | RXACTIVE},     /* RMII1_CRS */
-	{OFFSET(mii1_rxerr), MODE(1) | RXACTIVE},   /* RMII1_RXERR */
-	{OFFSET(mii1_txen), MODE(1)},               /* RMII1_TXEN */
-	{OFFSET(mii1_txd1), MODE(1)},               /* RMII1_TXD1 */
-	{OFFSET(mii1_txd0), MODE(1)},               /* RMII1_TXD0 */
-	{OFFSET(mii1_rxd1), MODE(1) | RXACTIVE},    /* RMII1_RXD1 */
-	{OFFSET(mii1_rxd0), MODE(1) | RXACTIVE},    /* RMII1_RXD0 */
-	{OFFSET(mdio_data), MODE(0) | RXACTIVE | PULLUP_EN}, /* MDIO_DATA */
-	{OFFSET(mdio_clk), MODE(0) | PULLUP_EN},    /* MDIO_CLK */
-	{OFFSET(rmii1_refclk), MODE(0) | RXACTIVE}, /* RMII1_REFCLK */
-	{-1},
-};
-
-static struct module_pin_mux cbmux_pin_mux[] = {
-	{OFFSET(uart0_ctsn), MODE(7) | RXACTIVE | PULLDOWN_EN}, /* JP3 */
-	{OFFSET(uart0_rtsn), MODE(7) | RXACTIVE | PULLUP_EN},	/* JP4 */
-	{-1},
-};
-
-#ifdef CONFIG_MTD_RAW_NAND
-static struct module_pin_mux nand_pin_mux[] = {
-	{OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD0 */
-	{OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD1 */
-	{OFFSET(gpmc_ad2), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD2 */
-	{OFFSET(gpmc_ad3), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD3 */
-	{OFFSET(gpmc_ad4), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD4 */
-	{OFFSET(gpmc_ad5), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD5 */
-	{OFFSET(gpmc_ad6), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD6 */
-	{OFFSET(gpmc_ad7), (MODE(0) | PULLUP_EN | RXACTIVE)},	/* NAND AD7 */
-	{OFFSET(gpmc_wait0), (MODE(0) | RXACTIVE | PULLUP_EN)}, /* NAND WAIT */
-	{OFFSET(gpmc_wpn), (MODE(7) | PULLUP_EN | RXACTIVE)},	/* NAND_WPN */
-	{OFFSET(gpmc_csn0), (MODE(0) | PULLUDEN)},	/* NAND_CS0 */
-	{OFFSET(gpmc_advn_ale), (MODE(0) | PULLUDEN)}, /* NAND_ADV_ALE */
-	{OFFSET(gpmc_oen_ren), (MODE(0) | PULLUDEN)},	/* NAND_OE */
-	{OFFSET(gpmc_wen), (MODE(0) | PULLUDEN)},	/* NAND_WEN */
-	{OFFSET(gpmc_be0n_cle), (MODE(0) | PULLUDEN)},	/* NAND_BE_CLE */
-	{-1},
-};
-#endif
-
-void enable_uart0_pin_mux(void)
-{
-	configure_module_pin_mux(uart0_pin_mux);
-}
-
-void enable_i2c0_pin_mux(void)
-{
-	configure_module_pin_mux(i2c0_pin_mux);
-}
-
-void enable_board_pin_mux()
-{
-	configure_module_pin_mux(rmii1_pin_mux);
-	configure_module_pin_mux(mmc0_pin_mux);
-	configure_module_pin_mux(cbmux_pin_mux);
-#ifdef CONFIG_MTD_RAW_NAND
-	configure_module_pin_mux(nand_pin_mux);
-#endif
-#ifdef CONFIG_SPI
-	configure_module_pin_mux(spi0_pin_mux);
-#endif
-}
diff --git a/configs/pcm051_rev1_defconfig b/configs/pcm051_rev1_defconfig
deleted file mode 100644
index ea7a0769f2..0000000000
--- a/configs/pcm051_rev1_defconfig
+++ /dev/null
@@ -1,60 +0,0 @@ 
-CONFIG_ARM=y
-CONFIG_ARCH_CPU_INIT=y
-CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SPL_GPIO_SUPPORT=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_AM33XX=y
-CONFIG_TARGET_PCM051=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL=y
-CONFIG_SPL_FS_FAT=y
-CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="REV1"
-# CONFIG_USE_BOOTCOMMAND is not set
-CONFIG_SYS_CONSOLE_INFO_QUIET=y
-CONFIG_VERSION_VARIABLE=y
-CONFIG_ARCH_MISC_INIT=y
-CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_ETH_SUPPORT=y
-CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
-# CONFIG_SPL_NAND_SUPPORT is not set
-CONFIG_SPL_NET_SUPPORT=y
-CONFIG_SPL_NET_VCI_STRING="pcm051 U-Boot SPL"
-CONFIG_SPL_OS_BOOT=y
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
-CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_CMD_SPL=y
-CONFIG_CMD_ASKENV=y
-CONFIG_CMD_EEPROM=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_USB=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-CONFIG_MMC_OMAP_HS=y
-CONFIG_SPI_FLASH=y
-CONFIG_SF_DEFAULT_SPEED=24000000
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_PHY_SMSC=y
-CONFIG_MII=y
-CONFIG_DRIVER_TI_CPSW=y
-CONFIG_SPI=y
-CONFIG_OMAP3_SPI=y
-CONFIG_USB=y
-CONFIG_USB_MUSB_HOST=y
-CONFIG_USB_MUSB_GADGET=y
-CONFIG_USB_MUSB_DSPS=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ETHER=y
-CONFIG_FAT_WRITE=y
-CONFIG_OF_LIBFDT=y
diff --git a/configs/pcm051_rev3_defconfig b/configs/pcm051_rev3_defconfig
deleted file mode 100644
index 43e64630ab..0000000000
--- a/configs/pcm051_rev3_defconfig
+++ /dev/null
@@ -1,60 +0,0 @@ 
-CONFIG_ARM=y
-CONFIG_ARCH_CPU_INIT=y
-CONFIG_ARCH_OMAP2PLUS=y
-CONFIG_SPL_GPIO_SUPPORT=y
-CONFIG_SPL_LIBCOMMON_SUPPORT=y
-CONFIG_SPL_LIBGENERIC_SUPPORT=y
-CONFIG_AM33XX=y
-CONFIG_TARGET_PCM051=y
-CONFIG_SPL_MMC_SUPPORT=y
-CONFIG_SPL_SERIAL_SUPPORT=y
-CONFIG_SPL=y
-CONFIG_SPL_FS_FAT=y
-CONFIG_SPL_LIBDISK_SUPPORT=y
-CONFIG_DISTRO_DEFAULTS=y
-CONFIG_SYS_EXTRA_OPTIONS="REV3"
-# CONFIG_USE_BOOTCOMMAND is not set
-CONFIG_SYS_CONSOLE_INFO_QUIET=y
-CONFIG_VERSION_VARIABLE=y
-CONFIG_ARCH_MISC_INIT=y
-CONFIG_SPL_ENV_SUPPORT=y
-CONFIG_SPL_ETH_SUPPORT=y
-CONFIG_SPL_FS_EXT4=y
-CONFIG_SPL_I2C_SUPPORT=y
-# CONFIG_SPL_NAND_SUPPORT is not set
-CONFIG_SPL_NET_SUPPORT=y
-CONFIG_SPL_NET_VCI_STRING="pcm051 U-Boot SPL"
-CONFIG_SPL_OS_BOOT=y
-CONFIG_SPL_POWER_SUPPORT=y
-CONFIG_SPL_WATCHDOG_SUPPORT=y
-CONFIG_SPL_YMODEM_SUPPORT=y
-CONFIG_CMD_SPL=y
-CONFIG_CMD_ASKENV=y
-CONFIG_CMD_EEPROM=y
-CONFIG_CMD_GPIO=y
-CONFIG_CMD_I2C=y
-CONFIG_CMD_MMC=y
-CONFIG_CMD_SF=y
-CONFIG_CMD_SPI=y
-CONFIG_CMD_USB=y
-# CONFIG_CMD_SETEXPR is not set
-CONFIG_CMD_EXT4_WRITE=y
-CONFIG_SYS_RELOC_GD_ENV_ADDR=y
-CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y
-CONFIG_MMC_OMAP_HS=y
-CONFIG_SPI_FLASH=y
-CONFIG_SF_DEFAULT_SPEED=24000000
-CONFIG_SPI_FLASH_WINBOND=y
-CONFIG_PHY_SMSC=y
-CONFIG_MII=y
-CONFIG_DRIVER_TI_CPSW=y
-CONFIG_SPI=y
-CONFIG_OMAP3_SPI=y
-CONFIG_USB=y
-CONFIG_USB_MUSB_HOST=y
-CONFIG_USB_MUSB_GADGET=y
-CONFIG_USB_MUSB_DSPS=y
-CONFIG_USB_GADGET=y
-CONFIG_USB_ETHER=y
-CONFIG_FAT_WRITE=y
-CONFIG_OF_LIBFDT=y
diff --git a/include/configs/pcm051.h b/include/configs/pcm051.h
deleted file mode 100644
index 706a8a2a87..0000000000
--- a/include/configs/pcm051.h
+++ /dev/null
@@ -1,128 +0,0 @@ 
-/*
- * pcm051.h
- *
- * Phytec phyCORE-AM335x (pcm051) boards information header
- *
- * Copyright (C) 2013 Lemonage Software GmbH
- * Author Lars Poeschel <poeschel at lemonage.de>
- *
- * This program is free software; you can redistribute it and/or
- * modify it under the terms of the GNU General Public License as
- * published by the Free Software Foundation version 2.
- *
- * This program is distributed "as is" WITHOUT ANY WARRANTY of any
- * kind, whether express or implied; without even the implied warranty
- * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- */
-
-#ifndef __CONFIG_PCM051_H
-#define __CONFIG_PCM051_H
-
-#include <configs/ti_am335x_common.h>
-
-#define CONFIG_MACH_TYPE		MACH_TYPE_PCM051
-
-/* set to negative value for no autoboot */
-#define BOOTENV_DEV_LEGACY_MMC(devtypeu, devtypel, instance) \
-	"bootcmd_" #devtypel #instance "=" \
-	"setenv mmcdev " #instance"; "\
-	"setenv bootpart " #instance":2 ; "\
-	"run mmcboot\0"
-
-#define BOOTENV_DEV_NAME_LEGACY_MMC(devtypeu, devtypel, instance) \
-	#devtypel #instance " "
-
-#define BOOTENV_DEV_NAND(devtypeu, devtypel, instance) \
-	"bootcmd_" #devtypel "=" \
-	"run nandboot\0"
-
-#define BOOTENV_DEV_NAME_NAND(devtypeu, devtypel, instance) \
-	#devtypel #instance " "
-
-#define BOOT_TARGET_DEVICES(func) \
-	func(MMC, mmc, 0) \
-	func(LEGACY_MMC, legacy_mmc, 0) \
-	func(MMC, mmc, 1) \
-	func(LEGACY_MMC, legacy_mmc, 1) \
-	func(NAND, nand, 0)
-
-#define CONFIG_BOOTCOMMAND \
-	"run distro_bootcmd"
-
-#include <config_distro_bootcmd.h>
-
-#include <environment/ti/dfu.h>
-#include <environment/ti/mmc.h>
-
-#define CONFIG_EXTRA_ENV_SETTINGS \
-	DEFAULT_LINUX_BOOT_ENV \
-	DEFAULT_MMC_TI_ARGS \
-	"bootfile=uImage\0" \
-	"fdtfile=am335x-wega-rdk.dtb\0" \
-	"console=ttyO0,115200n8\0" \
-	"optargs=\0" \
-	"ramroot=/dev/ram0 rw ramdisk_size=65536 initrd=${rdaddr},64M\0" \
-	"ramrootfstype=ext2\0" \
-	"bootenv=uEnv.txt\0" \
-	"loadbootscript=load mmc ${mmcdev} ${loadaddr} boot.scr\0" \
-	"bootscript=echo Running bootscript from mmc${mmcdev} ...; " \
-		"source ${loadaddr}\0" \
-	"loadbootenv=fatload mmc ${mmcdev} ${loadaddr} ${bootenv}\0" \
-	"importbootenv=echo Importing environment from mmc ...; " \
-		"env import -t $loadaddr $filesize\0" \
-	"ramargs=setenv bootargs console=${console} " \
-		"${optargs} " \
-		"root=${ramroot} " \
-		"rootfstype=${ramrootfstype}\0" \
-	"loadramdisk=fatload mmc ${mmcdev} ${rdaddr} ramdisk.gz\0" \
-	"loaduimagefat=fatload mmc ${mmcdev} ${loadaddr} ${bootfile}\0" \
-	"loaduimage=ext2load mmc ${mmcdev}:2 ${loadaddr} ${bootfile}\0" \
-	"mmcboot=echo Booting from mmc ...; " \
-		"run args_mmc; " \
-		"bootm ${loadaddr}\0" \
-	"ramboot=echo Booting from ramdisk ...; " \
-		"run ramargs; " \
-		"bootm ${loadaddr}\0" \
-	BOOTENV
-
-/* Clock Defines */
-#define V_OSCK				25000000  /* Clock output from T2 */
-#define V_SCLK				(V_OSCK)
-
-/*
- * memtest works on 8 MB in DRAM after skipping 32MB from
- * start addr of ram disk
- */
-
-/* NS16550 Configuration */
-#define CONFIG_SYS_NS16550_COM1		0x44e09000	/* Base EVM has UART0 */
-#define CONFIG_SYS_NS16550_COM2		0x48022000	/* UART1 */
-#define CONFIG_SYS_NS16550_COM3		0x48024000	/* UART2 */
-#define CONFIG_SYS_NS16550_COM4		0x481a6000	/* UART3 */
-#define CONFIG_SYS_NS16550_COM5		0x481a8000	/* UART4 */
-#define CONFIG_SYS_NS16550_COM6		0x481aa000	/* UART5 */
-
-/* I2C Configuration */
-#define CONFIG_ENV_EEPROM_IS_ON_I2C
-#define CONFIG_SYS_I2C_EEPROM_ADDR	0x50	/* Main EEPROM */
-#define CONFIG_SYS_I2C_EEPROM_ADDR_LEN	2
-
-#define CONFIG_SYS_BAUDRATE_TABLE	{ 110, 300, 600, 1200, 2400, \
-4800, 9600, 14400, 19200, 28800, 38400, 56000, 57600, 115200 }
-
-/* CPU */
-
-#ifdef CONFIG_SPI_BOOT
-#define CONFIG_SYS_SPI_U_BOOT_SIZE	0x40000
-#endif
-
-/*
- * USB configuration
- */
-#define CONFIG_AM335X_USB0
-#define CONFIG_AM335X_USB0_MODE	MUSB_PERIPHERAL
-#define CONFIG_AM335X_USB1
-#define CONFIG_AM335X_USB1_MODE MUSB_HOST
-
-#endif	/* ! __CONFIG_PCM051_H */