Message ID | 20200918121911.5194-1-kraxel@redhat.com |
---|---|
Headers | show |
Series | microvm: add pcie support | expand |
On Fri, Sep 18, 2020 at 08:36:14AM -0400, Michael S. Tsirkin wrote: > On Fri, Sep 18, 2020 at 02:19:11PM +0200, Gerd Hoffmann wrote: > > Uses the existing gpex device which is also used as pcie host bridge on > > arm/aarch64. For now only a 32bit mmio window and no ioport support. > > > > It is disabled by default, use "-machine microvm,pcie=on" to enable. > > ACPI support must be enabled too because the bus is declared in the > > DSDT table. > > > > Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> > > Can we do the reverse and only support a 64 bit window? > 32 bit resources are a pain, we support them on x86 for purposes > of legacy guests ... 32bit pci bars too, right? I suspect we can't that easily take away the 32bit window ... take care, Gerd
On Mon, Sep 21, 2020 at 01:33:47PM +0200, Gerd Hoffmann wrote: > On Fri, Sep 18, 2020 at 08:36:14AM -0400, Michael S. Tsirkin wrote: > > On Fri, Sep 18, 2020 at 02:19:11PM +0200, Gerd Hoffmann wrote: > > > Uses the existing gpex device which is also used as pcie host bridge on > > > arm/aarch64. For now only a 32bit mmio window and no ioport support. > > > > > > It is disabled by default, use "-machine microvm,pcie=on" to enable. > > > ACPI support must be enabled too because the bus is declared in the > > > DSDT table. > > > > > > Signed-off-by: Gerd Hoffmann <kraxel@redhat.com> > > > > Can we do the reverse and only support a 64 bit window? > > 32 bit resources are a pain, we support them on x86 for purposes > > of legacy guests ... > > 32bit pci bars too, right? > I suspect we can't that easily take away the 32bit window ... > > take care, > Gerd Yes I forgot, in their wisdom pci sig declared that non prefetcheable memory windows in bridges are always 32 bit :(