mbox series

[v2,00/12] pinctrl: renesas: Add R-Car S4-8 support

Message ID cover.1645457792.git.geert+renesas@glider.be
Headers show
Series pinctrl: renesas: Add R-Car S4-8 support | expand

Message

Geert Uytterhoeven Feb. 21, 2022, 3:43 p.m. UTC
Hi all,

This patch series adds pin control support for the Renesas R-Car S4-8
Soc.  It is based on patches in the BSP by LUU HOAI, with many changes
on top (see the individual patches).

Changes compared to v1[1]:
  - Add Reviewed-by,
  - Fix whitespace in Makefile,
  - Remove GPIO and No-GPIO pins, pin function definitions, and
    registers that can only be accessed from the Control Domain,
  - Spin off clock and DTS patches into separate series,
  - Drop RFC state and widen audience.

Serial console and I2C have been tested on the Renesas Spider
development board.

Thanks for your comments!

[1] "[PATCH/RFC 00/15] arm64: renesas: Add-R-Car S4-8 Pin control support"
    https://lore.kernel.org/r/cover.1642599415.git.geert+renesas@glider.be

Geert Uytterhoeven (11):
  pinctrl: renesas: Add PORT_GP_CFG_19 macros
  pinctrl: renesas: Initial R8A779F0 PFC support
  pinctrl: renesas: r8a779f0: Add SCIF pins, groups, and functions
  pinctrl: renesas: r8a779f0: Add I2C pins, groups, and functions
  pinctrl: renesas: r8a779f0: Add HSCIF pins, groups, and functions
  pinctrl: renesas: r8a779f0: Add INTC-EX pins, groups, and function
  pinctrl: renesas: r8a779f0: Add MMC pins, groups, and function
  pinctrl: renesas: r8a779f0: Add MSIOF pins, groups, and functions
  pinctrl: renesas: r8a779f0: Add PCIe pins, groups, and function
  pinctrl: renesas: r8a779f0: Add QSPI pins, groups, and functions
  pinctrl: renesas: r8a779f0: Add Ethernet pins, groups, and functions

LUU HOAI (1):
  dt-bindings: pinctrl: renesas,pfc: Document r8a779f0 support

 .../bindings/pinctrl/renesas,pfc.yaml         |    1 +
 drivers/pinctrl/renesas/Kconfig               |    5 +
 drivers/pinctrl/renesas/Makefile              |    1 +
 drivers/pinctrl/renesas/core.c                |    6 +
 drivers/pinctrl/renesas/pfc-r8a779f0.c        | 2126 +++++++++++++++++
 drivers/pinctrl/renesas/sh_pfc.h              |    9 +-
 6 files changed, 2146 insertions(+), 2 deletions(-)
 create mode 100644 drivers/pinctrl/renesas/pfc-r8a779f0.c

Comments

Yoshihiro Shimoda Feb. 25, 2022, 12:19 p.m. UTC | #1
Hi Geert-san,

> From: Geert Uytterhoeven, Sent: Tuesday, February 22, 2022 12:44 AM
> 
> 	Hi all,
> 
> This patch series adds pin control support for the Renesas R-Car S4-8
> Soc.  It is based on patches in the BSP by LUU HOAI, with many changes
> on top (see the individual patches).
> 
> Changes compared to v1[1]:
>   - Add Reviewed-by,
>   - Fix whitespace in Makefile,
>   - Remove GPIO and No-GPIO pins, pin function definitions, and
>     registers that can only be accessed from the Control Domain,
>   - Spin off clock and DTS patches into separate series,
>   - Drop RFC state and widen audience.
> 
> Serial console and I2C have been tested on the Renesas Spider
> development board.
> 
> Thanks for your comments!

Thank you for the patch!

> Geert Uytterhoeven (11):
>   pinctrl: renesas: Add PORT_GP_CFG_19 macros
>   pinctrl: renesas: Initial R8A779F0 PFC support
>   pinctrl: renesas: r8a779f0: Add SCIF pins, groups, and functions

I have already reviewed these patches above independently on v1 or v2.

>   pinctrl: renesas: r8a779f0: Add I2C pins, groups, and functions
>   pinctrl: renesas: r8a779f0: Add HSCIF pins, groups, and functions
>   pinctrl: renesas: r8a779f0: Add INTC-EX pins, groups, and function
>   pinctrl: renesas: r8a779f0: Add MMC pins, groups, and function
>   pinctrl: renesas: r8a779f0: Add MSIOF pins, groups, and functions
>   pinctrl: renesas: r8a779f0: Add PCIe pins, groups, and function
>   pinctrl: renesas: r8a779f0: Add QSPI pins, groups, and functions
>   pinctrl: renesas: r8a779f0: Add Ethernet pins, groups, and functions

These patches (4/12 to 12/12) look good to me. So, for the patches:

Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

Best regards,
Yoshihiro Shimoda
Geert Uytterhoeven Feb. 25, 2022, 1:10 p.m. UTC | #2
Hi Shimoda-san,

On Fri, Feb 25, 2022 at 1:19 PM Yoshihiro Shimoda
<yoshihiro.shimoda.uh@renesas.com> wrote:
> > From: Geert Uytterhoeven, Sent: Tuesday, February 22, 2022 12:44 AM
> > This patch series adds pin control support for the Renesas R-Car S4-8
> > Soc.  It is based on patches in the BSP by LUU HOAI, with many changes
> > on top (see the individual patches).
> >
> > Changes compared to v1[1]:
> >   - Add Reviewed-by,
> >   - Fix whitespace in Makefile,
> >   - Remove GPIO and No-GPIO pins, pin function definitions, and
> >     registers that can only be accessed from the Control Domain,
> >   - Spin off clock and DTS patches into separate series,
> >   - Drop RFC state and widen audience.
> >
> > Serial console and I2C have been tested on the Renesas Spider
> > development board.
> >
> > Thanks for your comments!
>
> Thank you for the patch!
>
> > Geert Uytterhoeven (11):
> >   pinctrl: renesas: Add PORT_GP_CFG_19 macros
> >   pinctrl: renesas: Initial R8A779F0 PFC support
> >   pinctrl: renesas: r8a779f0: Add SCIF pins, groups, and functions
>
> I have already reviewed these patches above independently on v1 or v2.
>
> >   pinctrl: renesas: r8a779f0: Add I2C pins, groups, and functions
> >   pinctrl: renesas: r8a779f0: Add HSCIF pins, groups, and functions
> >   pinctrl: renesas: r8a779f0: Add INTC-EX pins, groups, and function
> >   pinctrl: renesas: r8a779f0: Add MMC pins, groups, and function
> >   pinctrl: renesas: r8a779f0: Add MSIOF pins, groups, and functions
> >   pinctrl: renesas: r8a779f0: Add PCIe pins, groups, and function
> >   pinctrl: renesas: r8a779f0: Add QSPI pins, groups, and functions
> >   pinctrl: renesas: r8a779f0: Add Ethernet pins, groups, and functions
>
> These patches (4/12 to 12/12) look good to me. So, for the patches:
>
> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>

Thank you, queuing in renesas-pinctrl-for-v5.18.

Gr{oetje,eeting}s,

                        Geert

--
Geert Uytterhoeven -- There's lots of Linux beyond ia32 -- geert@linux-m68k.org

In personal conversations with technical people, I call myself a hacker. But
when I'm talking to journalists I just say "programmer" or something like that.
                                -- Linus Torvalds
Rob Herring (Arm) Feb. 25, 2022, 7:12 p.m. UTC | #3
On Mon, 21 Feb 2022 16:43:36 +0100, Geert Uytterhoeven wrote:
> From: LUU HOAI <hoai.luu.ub@renesas.com>
> 
> Document Pin Function Controller (PFC) support for the Renesas R-Car
> S4-8 (R8A779F0) SoC.
> 
> Signed-off-by: LUU HOAI <hoai.luu.ub@renesas.com>
> Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
> Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
> ---
> v2:
>   - Add Reviewed-by.
> ---
>  Documentation/devicetree/bindings/pinctrl/renesas,pfc.yaml | 1 +
>  1 file changed, 1 insertion(+)
> 

Acked-by: Rob Herring <robh@kernel.org>