| Message ID | 20220226184028.111566-3-bhupesh.sharma@linaro.org |
|---|---|
| State | Accepted |
| Commit | 90337380c80944381160897934b463ad47332adf |
| Headers | show |
| Series | Add support for PDC interrupt controller for sm8150 | expand |
On Sat 26 Feb 12:40 CST 2022, Bhupesh Sharma wrote: > Specify the PDC mapping for SM8150, so that gpio interrupts are > properly mapped to the wakeup IRQs of the PDC. > > Cc: Maulik Shah <quic_mkshah@quicinc.com> > Cc: Bjorn Andersson <bjorn.andersson@linaro.org> > Cc: Linus Walleij <linus.walleij@linaro.org> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Acked-by: Bjorn Andersson <bjorn.andersson@linaro.org> Regards, Bjorn > --- > drivers/pinctrl/qcom/pinctrl-sm8150.c | 22 ++++++++++++++++++++++ > 1 file changed, 22 insertions(+) > > diff --git a/drivers/pinctrl/qcom/pinctrl-sm8150.c b/drivers/pinctrl/qcom/pinctrl-sm8150.c > index 7359bae68c69..1cc622694553 100644 > --- a/drivers/pinctrl/qcom/pinctrl-sm8150.c > +++ b/drivers/pinctrl/qcom/pinctrl-sm8150.c > @@ -1500,6 +1500,25 @@ static const struct msm_pingroup sm8150_groups[] = { > [178] = SDC_QDSD_PINGROUP(sdc2_data, 0xB2000, 9, 0), > }; > > +static const struct msm_gpio_wakeirq_map sm8150_pdc_map[] = { > + { 3, 31 }, { 5, 32 }, { 8, 33 }, { 9, 34 }, { 10, 100 }, > + { 12, 104 }, { 24, 37 }, { 26, 38 }, { 27, 41 }, { 28, 42 }, > + { 30, 39 }, { 36, 43 }, { 37, 44 }, { 38, 30 }, { 39, 118 }, > + { 39, 125 }, { 41, 47 }, { 42, 48 }, { 46, 50 }, { 47, 49 }, > + { 48, 51 }, { 49, 53 }, { 50, 52 }, { 51, 116 }, { 51, 123 }, > + { 53, 54 }, { 54, 55 }, { 55, 56 }, { 56, 57 }, { 58, 58 }, > + { 60, 60 }, { 61, 61 }, { 68, 62 }, { 70, 63 }, { 76, 71 }, > + { 77, 66 }, { 81, 64 }, { 83, 65 }, { 86, 67 }, { 87, 84 }, > + { 88, 117 }, { 88, 124 }, { 90, 69 }, { 91, 70 }, { 93, 75 }, > + { 95, 72 }, { 96, 73 }, { 97, 74 }, { 101, 40 }, { 103, 77 }, > + { 104, 78 }, { 108, 79 }, { 112, 80 }, { 113, 81 }, { 114, 82 }, > + { 117, 85 }, { 118, 101 }, { 119, 87 }, { 120, 88 }, { 121, 89 }, > + { 122, 90 }, { 123, 91 }, { 124, 92 }, { 125, 93 }, { 129, 94 }, > + { 132, 105 }, { 133, 83 }, { 134, 36 }, { 136, 97 }, { 142, 103 }, > + { 144, 115 }, { 144, 122 }, { 147, 102 }, { 150, 107 }, > + { 152, 108 }, { 153, 109 } > +}; > + > static const struct msm_pinctrl_soc_data sm8150_pinctrl = { > .pins = sm8150_pins, > .npins = ARRAY_SIZE(sm8150_pins), > @@ -1510,6 +1529,9 @@ static const struct msm_pinctrl_soc_data sm8150_pinctrl = { > .ngpios = 176, > .tiles = sm8150_tiles, > .ntiles = ARRAY_SIZE(sm8150_tiles), > + .wakeirq_map = sm8150_pdc_map, > + .nwakeirq_map = ARRAY_SIZE(sm8150_pdc_map), > + .wakeirq_dual_edge_errata = true, > }; > > static int sm8150_pinctrl_probe(struct platform_device *pdev) > -- > 2.35.1 >
On Sat, Feb 26, 2022 at 7:40 PM Bhupesh Sharma <bhupesh.sharma@linaro.org> wrote: > Specify the PDC mapping for SM8150, so that gpio interrupts are > properly mapped to the wakeup IRQs of the PDC. > > Cc: Maulik Shah <quic_mkshah@quicinc.com> > Cc: Bjorn Andersson <bjorn.andersson@linaro.org> > Cc: Linus Walleij <linus.walleij@linaro.org> > Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> Patch applied! Yours, Linus Walleij
diff --git a/drivers/pinctrl/qcom/pinctrl-sm8150.c b/drivers/pinctrl/qcom/pinctrl-sm8150.c index 7359bae68c69..1cc622694553 100644 --- a/drivers/pinctrl/qcom/pinctrl-sm8150.c +++ b/drivers/pinctrl/qcom/pinctrl-sm8150.c @@ -1500,6 +1500,25 @@ static const struct msm_pingroup sm8150_groups[] = { [178] = SDC_QDSD_PINGROUP(sdc2_data, 0xB2000, 9, 0), }; +static const struct msm_gpio_wakeirq_map sm8150_pdc_map[] = { + { 3, 31 }, { 5, 32 }, { 8, 33 }, { 9, 34 }, { 10, 100 }, + { 12, 104 }, { 24, 37 }, { 26, 38 }, { 27, 41 }, { 28, 42 }, + { 30, 39 }, { 36, 43 }, { 37, 44 }, { 38, 30 }, { 39, 118 }, + { 39, 125 }, { 41, 47 }, { 42, 48 }, { 46, 50 }, { 47, 49 }, + { 48, 51 }, { 49, 53 }, { 50, 52 }, { 51, 116 }, { 51, 123 }, + { 53, 54 }, { 54, 55 }, { 55, 56 }, { 56, 57 }, { 58, 58 }, + { 60, 60 }, { 61, 61 }, { 68, 62 }, { 70, 63 }, { 76, 71 }, + { 77, 66 }, { 81, 64 }, { 83, 65 }, { 86, 67 }, { 87, 84 }, + { 88, 117 }, { 88, 124 }, { 90, 69 }, { 91, 70 }, { 93, 75 }, + { 95, 72 }, { 96, 73 }, { 97, 74 }, { 101, 40 }, { 103, 77 }, + { 104, 78 }, { 108, 79 }, { 112, 80 }, { 113, 81 }, { 114, 82 }, + { 117, 85 }, { 118, 101 }, { 119, 87 }, { 120, 88 }, { 121, 89 }, + { 122, 90 }, { 123, 91 }, { 124, 92 }, { 125, 93 }, { 129, 94 }, + { 132, 105 }, { 133, 83 }, { 134, 36 }, { 136, 97 }, { 142, 103 }, + { 144, 115 }, { 144, 122 }, { 147, 102 }, { 150, 107 }, + { 152, 108 }, { 153, 109 } +}; + static const struct msm_pinctrl_soc_data sm8150_pinctrl = { .pins = sm8150_pins, .npins = ARRAY_SIZE(sm8150_pins), @@ -1510,6 +1529,9 @@ static const struct msm_pinctrl_soc_data sm8150_pinctrl = { .ngpios = 176, .tiles = sm8150_tiles, .ntiles = ARRAY_SIZE(sm8150_tiles), + .wakeirq_map = sm8150_pdc_map, + .nwakeirq_map = ARRAY_SIZE(sm8150_pdc_map), + .wakeirq_dual_edge_errata = true, }; static int sm8150_pinctrl_probe(struct platform_device *pdev)
Specify the PDC mapping for SM8150, so that gpio interrupts are properly mapped to the wakeup IRQs of the PDC. Cc: Maulik Shah <quic_mkshah@quicinc.com> Cc: Bjorn Andersson <bjorn.andersson@linaro.org> Cc: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org> --- drivers/pinctrl/qcom/pinctrl-sm8150.c | 22 ++++++++++++++++++++++ 1 file changed, 22 insertions(+)