| Message ID | 20220622173605.1168416-1-pmalani@chromium.org |
|---|---|
| Headers | show |
| Series | usb: typec: Introduce typec-switch binding | expand |
Quoting Prashant Malani (2022-06-22 10:34:30) > diff --git a/Documentation/devicetree/bindings/usb/typec-switch.yaml b/Documentation/devicetree/bindings/usb/typec-switch.yaml > new file mode 100644 > index 000000000000..78b0190c8543 > --- /dev/null > +++ b/Documentation/devicetree/bindings/usb/typec-switch.yaml > @@ -0,0 +1,74 @@ > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/usb/typec-switch.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: USB Type-C Switch > + > +maintainers: > + - Prashant Malani <pmalani@chromium.org> > + > +description: > + A USB Type-C switch represents a component which routes USB Type-C data > + lines to various protocol host controllers (e.g USB, VESA DisplayPort, > + Thunderbolt etc.) depending on which mode the Type-C port, port partner > + and cable are operating in. It can also modify lane routing based on > + the orientation of a connected Type-C peripheral. > + > +properties: > + compatible: > + const: typec-switch > + > + mode-switch: > + type: boolean > + description: Specify that this switch can handle alternate mode switching. > + > + orientation-switch: > + type: boolean > + description: Specify that this switch can handle orientation switching. > + > + ports: > + $ref: /schemas/graph.yaml#/properties/ports > + description: OF graph binding modelling data lines to the Type-C switch. > + > + properties: > + port@0: > + $ref: /schemas/graph.yaml#/properties/port > + description: Link between the switch and a Type-C connector. Is there an update to the usb-c-connector binding to accept this port connection? > + > + required: > + - port@0 > + > +required: > + - compatible > + - ports > + > +anyOf: > + - required: > + - mode-switch > + - required: > + - orientation-switch > + > +additionalProperties: true > + > +examples: > + - | > + drm-bridge { > + usb-switch { > + compatible = "typec-switch"; I still don't understand the subnode design here. usb-switch as a container node indicates to me that this is a bus, but in earlier rounds of this series it was stated this isn't a bus. Why doesn't it work to merge everything inside usb-switch directly into the drm-bridge node? > + mode-switch; > + orientation-switch; > + ports { > + #address-cells = <1>; > + #size-cells = <0>; > + > + port@0 { > + reg = <0>; > + anx_ep: endpoint { > + remote-endpoint = <&typec_controller>; > + }; > + }; > + }; > + };
On Thu, Jun 23, 2022 at 11:30 AM Stephen Boyd <swboyd@chromium.org> wrote: > > Quoting Prashant Malani (2022-06-22 10:34:30) > > diff --git a/Documentation/devicetree/bindings/usb/typec-switch.yaml b/Documentation/devicetree/bindings/usb/typec-switch.yaml > > new file mode 100644 > > index 000000000000..78b0190c8543 > > --- /dev/null > > +++ b/Documentation/devicetree/bindings/usb/typec-switch.yaml > > @@ -0,0 +1,74 @@ > > +# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause) > > +%YAML 1.2 > > +--- > > +$id: http://devicetree.org/schemas/usb/typec-switch.yaml# > > +$schema: http://devicetree.org/meta-schemas/core.yaml# > > + > > +title: USB Type-C Switch > > + > > +maintainers: > > + - Prashant Malani <pmalani@chromium.org> > > + > > +description: > > + A USB Type-C switch represents a component which routes USB Type-C data > > + lines to various protocol host controllers (e.g USB, VESA DisplayPort, > > + Thunderbolt etc.) depending on which mode the Type-C port, port partner > > + and cable are operating in. It can also modify lane routing based on > > + the orientation of a connected Type-C peripheral. > > + > > +properties: > > + compatible: > > + const: typec-switch > > + > > + mode-switch: > > + type: boolean > > + description: Specify that this switch can handle alternate mode switching. > > + > > + orientation-switch: > > + type: boolean > > + description: Specify that this switch can handle orientation switching. > > + > > + ports: > > + $ref: /schemas/graph.yaml#/properties/ports > > + description: OF graph binding modelling data lines to the Type-C switch. > > + > > + properties: > > + port@0: > > + $ref: /schemas/graph.yaml#/properties/port > > + description: Link between the switch and a Type-C connector. > > Is there an update to the usb-c-connector binding to accept this port > connection? Not at this time. I don't think we should enforce that either. (Type-C data-lines could theoretically be routed through intermediate hardware like retimers/repeaters) > > > + > > + required: > > + - port@0 > > + > > +required: > > + - compatible > > + - ports > > + > > +anyOf: > > + - required: > > + - mode-switch > > + - required: > > + - orientation-switch > > + > > +additionalProperties: true > > + > > +examples: > > + - | > > + drm-bridge { > > + usb-switch { > > + compatible = "typec-switch"; > > I still don't understand the subnode design here. usb-switch as a > container node indicates to me that this is a bus, but in earlier rounds > of this series it was stated this isn't a bus. I am not aware of this as a requirement. Can you please point me to the documentation that states this needs to be the case? > Why doesn't it work to > merge everything inside usb-switch directly into the drm-bridge node? I attempted to explain the rationale in the previous version [1], but using a dedicated sub-node means the driver doesn't haven't to inspect individual ports to determine which of them need switches registered for them. If it sees a `typec-switch`, it registers a mode-switch and/or orientation-switch. IMO it simplifies the hardware device binding too. It also maps with the internal block diagram for these hardware components (for ex. the anx7625 crosspoint switch is a separate sub-block within anx7625). [1] https://lore.kernel.org/linux-usb/CACeCKaeH6qTTdG_huC4yw0xxG8TYEOtfPW3tiVNwYs=P4QVPXg@mail.gmail.com/ > > > + mode-switch; > > + orientation-switch; > > + ports { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + port@0 { > > + reg = <0>; > > + anx_ep: endpoint { > > + remote-endpoint = <&typec_controller>; > > + }; > > + }; > > + }; > > + };
On Fri, Jun 24, 2022 at 12:50 PM Stephen Boyd <swboyd@chromium.org> wrote: > > Quoting Prashant Malani (2022-06-23 19:48:04) > > On Thu, Jun 23, 2022 at 7:13 PM Stephen Boyd <swboyd@chromium.org> wrote: > > > > > > Quoting Prashant Malani (2022-06-23 17:35:38) > > > > On Thu, Jun 23, 2022 at 4:14 PM Stephen Boyd <swboyd@chromium.org> wrote: > > > > > > > > > > I'm not aware of any documentation for the dos and don'ts here. Are > > > > > there any examples in the bindings directory that split up a device into > > > > > subnodes that isn't in bindings/mfd? > > > > > > > > usb-c-connector [3] and its users is an example. > > > > > > What are the subnodes? The graph ports? That is not what I meant. > > > > cros-ec-typec [4] uses subnodes of usb-c-connector. Chrome OS DTs > > use the ports from the included usb-c-connector to switching hardware. > > Ok, got it. usb-c-connector nodes are children of the typec controller > (in this case cros-ec-typec) because otherwise we would need to make a > phandle link from the usb-c-connector node(s) under the root node / to > the typec controller. The phandle link may need to be done in both > directions, so it makes more sense to put the usb-c-connector nodes > underneath the typec controller to express the direct relationship > between the typec controller and the usb-c-connectors. > > Furthermore, the usb-c-connector is not integrated as part of the EC in > the same package. There is a discrete part placed on the board that > corresponds to the usb-c-connector and that is separate from the EC. The > connectors are in essence only controllable through the EC because > that's the typec controller.
On 24/06/2022 23:41, Prashant Malani wrote: > On Fri, Jun 24, 2022 at 12:50 PM Stephen Boyd <swboyd@chromium.org> wrote: >> >> Quoting Prashant Malani (2022-06-23 19:48:04) >>> On Thu, Jun 23, 2022 at 7:13 PM Stephen Boyd <swboyd@chromium.org> wrote: >>>> >>>> Quoting Prashant Malani (2022-06-23 17:35:38) >>>>> On Thu, Jun 23, 2022 at 4:14 PM Stephen Boyd <swboyd@chromium.org> wrote: >>>>>> >>>>>> I'm not aware of any documentation for the dos and don'ts here. Are >>>>>> there any examples in the bindings directory that split up a device into >>>>>> subnodes that isn't in bindings/mfd? >>>>> >>>>> usb-c-connector [3] and its users is an example. >>>> >>>> What are the subnodes? The graph ports? That is not what I meant. >>> >>> cros-ec-typec [4] uses subnodes of usb-c-connector. Chrome OS DTs >>> use the ports from the included usb-c-connector to switching hardware. >> >> Ok, got it. usb-c-connector nodes are children of the typec controller >> (in this case cros-ec-typec) because otherwise we would need to make a >> phandle link from the usb-c-connector node(s) under the root node / to >> the typec controller. The phandle link may need to be done in both >> directions, so it makes more sense to put the usb-c-connector nodes >> underneath the typec controller to express the direct relationship >> between the typec controller and the usb-c-connectors. >> >> Furthermore, the usb-c-connector is not integrated as part of the EC in >> the same package. There is a discrete part placed on the board that >> corresponds to the usb-c-connector and that is separate from the EC. The >> connectors are in essence only controllable through the EC because >> that's the typec controller. > > From the perspective of the AP, the `usb-c-connector` *is* an integrated part of > the Chrome EC; there is no alternative way to control it except > through the Chrome EC. > So the above example reinforces the usage model for typec-switch (which is > also an "integrated" component). > >> It's similar to how we place i2c devices as >> child nodes of the i2c controller. >> >>> >>>> I meant splitting up a device functionality, like type-c and display >>>> bridge, into subnodes. Composition of devices through DT bindings isn't >>>> how it's done. Instead, we dump all the different functionality into the >>>> same node. For example, look at the number of bindings that have both >>>> #clock-cells and #reset-cells, when those are distinct frameworks in the >>>> kernel and also different properties. We don't make subnodes to contain >>>> the different functionality of a device. >>>> >>>> And in this case I still don't see the point to making a subnode. >>> >>> I've already provided my best effort at explaining the rationale. >>> >>>> The >>>> API can simply setup a type-c switch based on a graph binding for the >>>> toplevel node, e.g. the drm-bridge, and the driver can tell the API >>>> which port+endpoint to use to search the graph for the usb-c-connector >>>> to associate with the switch. >>> >>> OK, drm-bridge uses that approach. This is another approach. I didn't fully >>> understand why we *have* to follow what drm-bridge is doing. >>> >>>> We don't need to connect the graph within >>>> the drm-bridge node to the graph within the typec-switch node to do >>>> that. That's an internal detail of the drm-bridge that we don't expose >>>> to DT, because the driver knows the detail. >>> >>> I still don't understand why we can't do that. These devices have actual >>> hardware blocks that represent the Type-C switch functionality. >>> >> >> We don't break up device functionality for an IC into different subnodes >> with different compatibles. Similarly, we don't describe internal >> connection details of device nodes. The device driver that binds to the >> compatible should know the details of the internal block diagram of the >> part. > > I don't completely agree with the above. There > is scope for middle-ground where some details can be codified into > DT bindings, and the driver can have the flexibility to be able to handle them. > But this now devolves into an ideological debate which I don't want > to get involved in, so I will restrict my responses on this subject. > >> The DT binding should describe the external connections of the >> part and have properties that inform the driver about how the part was >> integrated into the system (e.g. mode-switch). The unwritten DT mantra >> is "less is more". >> >> We could definitely make many subnodes and add properties for everything >> inside an IC so that the DT describes the complete block diagram of the >> part, but at that point the driver is a shell of its former self. > > That is a pathological/extreme argument which is not the case here, > we're just adding 1 sub-node because it's a sub-component that interfaces > with a kernel framework (Type-C class etc). The driver should be able to deal > with varying hardware configurations for the device and I don't believe that > makes it a "shell of its former self" any more than hard-coding port > details in the driver. > >> The driver will spend time parsing properties to learn details that are > > This parsing only occurs 1 once at probe, so I don't consider it much > of an overhead. The alternative suggested leads to the driver using time > looking up OF ports (with the port number). I fail to see how either is > noticeably more efficient than the other, especially on modern systems. > >> entirely unchanging for the lifetime of the device (e.g. that the device >> has typec switch capabilities); things that should be hard-coded in the >> driver. >> >> Of course, if the device is integrated into the system and doesn't need >> to perform typec switching, then we want a property to tell the driver >> that this device is integrated in a way that the typec switch is not >> needed/used. Basically the driver should key that functionality off of >> the presence of the 'mode-switch' or 'orientation-switch' property >> instead of off the presence of a typec-switch subnode. >> >>>>> >>>>>> >>>>>> How would I even know which two differential pairs correspond to port0 >>>>>> or port1 in this binding in the ITE case? >>>>> >>>>> Why do we need to know that? It doesn't affect this or the other >>>>> driver or hardware's >>>>> functioning in a perceivable way. >>>> >>>> If the device registers allow control of the DP lane to physical pin >>>> mapping, so that DP lane0 and DP lane1 can be swapped logically, then >>>> we'll want to know which DP lanes we need to swap by writing some lane >>>> remapping register in the device. Sometimes for routing purposes devices >>>> support this lane remapping feature so the PCB can route the lines >>>> directly to the connector instead of going in circles and destroying the >>>> signal integrity. >>> >>> Then add more end-points to port@1 (for each differential pair >>> you want to describe) of the usb-c-connector and route them >>> to the typec-switch accordingly. >>> FWIW I'm not aware of h/w *that supports DP alt mode* that uses the >>> functionality >>> you're referring to. >>> >> >> The Qualcomm QMP usb+dp phy supports lane remapping. > > Ok great. So we can follow the method described above for specifying these > differential pairs if required. That is not related to this patch > series (although it is compatible > with it). > >> >>>> >>>>> >>>>>> Is that why you're proposing this binding? To >>>>>> avoid describing a graph binding in the usb-c-connector and effectively >>>>>> "pushing" the port count up to the mux? >>>>> >>>>> No, that is not the intention behind this series. The >>>>> 'usb-c-connector' still needs the >>>>> graph binding to the `typec-switch`. SBU, HS and SS lanes might have different >>>>> muxes altogether (usb-c-connect has separate ports for SBU, HS and SS lanes) >>>> >>>> If the usb-c-connector still needs a graph binding to the typec-switch >>>> then why isn't that part of this series? >>> >>> That's not what I meant (what I meant earlier is the intention is not >>> what you stated). >>> I simply meant that the usb-c-connectors ports should be connected to >>> the typec-switch >>> ports. There isn't any binding update required for this. >>> >> >> Ok. Got it. > > This really is a limited binding change that helps describe connections > between Type-C components, helps these components integrate with > the kernel Type-C framework, and consolidates the associated properties. > I believe it works for most current use cases in the upstream kernel. > > I'm happy to discuss more theoretical use cases further, but > respectfully, I prefer to do > so off-list. > > If the maintainer is OK with it (Krzysztof has reviewed it, but I > don't want to presume > what the protocol is for patches in this subsystem), and we've > provided 2 users as asked for Although I reviewed it, but Stephen has legitimate concerns and they should be addressed. I guess Rob's feedback would be valuable here as well. I think it would help if you articulated the exact problem, because there is a quite a discussion. Do I understand correctly that the bindings mimic USB connector and this is not appropriate for this type of a device? Or maybe this should not be represented in DT at all? > in v4 [5], then I request its consideration for submission. > If the maintainers have further concerns, we'd be happy to address them. > > Best regards, > > -Prashant > > [5] https://lore.kernel.org/linux-usb/20220616193424.GA3844759-robh@kernel.org/ Best regards, Krzysztof
Quoting Prashant Malani (2022-06-29 15:55:10) > On Wed, Jun 29, 2022 at 2:58 PM Stephen Boyd <swboyd@chromium.org> wrote: > > > > My understanding is there are 4 DP lanes on it6505 and two lanes are > > connected to one usb-c-connector and the other two lanes are connected > > to a different usb-c-connector. The IT6505 driver will send DP out on > > the associated two DP lanes depending on which usb-c-connector has DP > > pins assigned by the typec manager. [...] > > We can adopt this binding, but from what I gathered in this thread, that > shouldn't be done, because IT6505 isn't meant to be aware of Type-C > connections at all. How will the driver know which usb-c-connector to route DP to without making the binding aware of typec connections? > > > > I think the difficulty comes from the combinatorial explosion of > > possible configurations. As evidenced here, hardware engineers can take > > a DP bridge and use it as a DP mux as long as the bridge has lane > > control. Or they can take a device like anx7625 and ignore the USB > > aspect and use the internal crosspoint switch as a DP mux. The anx7625 > > part could be a MIPI-to-DP display bridge plus mux that is connected to > > two dp-connectors, in which case typec isn't even involved, but we could > > mux between two dp connectors. > > Each containing a single DP lane, right? Yes. > I think that will not be a valid configuration, since there is only 1 HPD > pin (so it's assuming both DP lanes go to the same DP sink). HPD can be signalled out of band, or not at all (no-hpd). I suspect it's valid to ignore/disconnect the HPD pin here and start/stop DP when, for example, the HPD pin toggles within a dp-connector. HPD could be signaled directly to the kernel via an out of band gpio going from the dp-connector to the SoC. In this case HPD for each dp-connector could be a different gpio and the driver may be required to arbitrate between the two dp-connectors with some 'first to signal wins' logic or something. > > But yes, your larger point is valid: h/w engineers can repurpose these > bridges in ways the datasheet doesn't originally anticipate. Yeah, I'm also trying to say that devices with typec logic may not be used for typec purposes. > > > > > Also, the typec framework would like to simply walk the graph from the > > usb-c-connector looking for nodes that have 'mode-switch' or > > 'orientation-switch' properties and treat those devices as the typec > > switches for the connector. This means that we have to add these typec > > properties like 'mode-switch' to something like the IT6505 bridge > > binding, which is a little awkward. I wonder if those properties aren't > > really required. Would it be sufficient if the framework could walk the > > graph and look for registered typec switches in the kernel that have a > > matching of_node? > > My interpretation of the current mode-switch search code [1] is that > a top level property of "mode-switch" is required. Yeah that's how it is right now, but does it have to stay that way? Could the code search the graph and look for a matching node that's registered with the typec framework? The goal is to avoid adding typec properties like 'mode-switch' to bindings like bridge converters that aren't expected to work with typec. Hopefully the binding can be written with the output pins in mind and what modes on those pins the hardware supports (e.g. two lanes on anx7625 can't be split apart whereas on it6505 each pair can be used directly).
(CC+ Bjorn) On Wed, Jun 29, 2022 at 4:55 PM Stephen Boyd <swboyd@chromium.org> wrote: > > Quoting Prashant Malani (2022-06-29 15:55:10) > > On Wed, Jun 29, 2022 at 2:58 PM Stephen Boyd <swboyd@chromium.org> wrote: > > > > > > My understanding is there are 4 DP lanes on it6505 and two lanes are > > > connected to one usb-c-connector and the other two lanes are connected > > > to a different usb-c-connector. The IT6505 driver will send DP out on > > > the associated two DP lanes depending on which usb-c-connector has DP > > > pins assigned by the typec manager. > [...] > > > > We can adopt this binding, but from what I gathered in this thread, that > > shouldn't be done, because IT6505 isn't meant to be aware of Type-C > > connections at all. > > How will the driver know which usb-c-connector to route DP to without > making the binding aware of typec connections? I agree with you; I'm saying my interpretation of the comments of this thread are that it's not the intended usage of the it6505 part, so the driver shouldn't be updated to support that. > > HPD can be signalled out of band, or not at all (no-hpd). I suspect it's > valid to ignore/disconnect the HPD pin here and start/stop DP when, for > example, the HPD pin toggles within a dp-connector. HPD could be > signaled directly to the kernel via an out of band gpio going from the > dp-connector to the SoC. In this case HPD for each dp-connector could be > a different gpio and the driver may be required to arbitrate between the > two dp-connectors with some 'first to signal wins' logic or something. Sure, it's possible. I just didn't see anything in the anx7625 datasheet to suggest it supported 2x1-lane DP outputs. For that matter I don't think even it6505 supports > 1 DP sink (based on my reading of the datasheet), but I don't have too much experience with these parts. > > My interpretation of the current mode-switch search code [1] is that > > a top level property of "mode-switch" is required. > > Yeah that's how it is right now, but does it have to stay that way? > Could the code search the graph and look for a matching node that's > registered with the typec framework? I'll have to get back to you on that after reading the code a bit more. Maybe Heikki or Bjorn have some comments about it. The ACPI Type-C ports do require a device handle labelled "mode-switch" which points to the switch device.
Quoting Prashant Malani (2022-06-28 13:56:22) > On Tue, Jun 28, 2022 at 1:40 PM Stephen Boyd <swboyd@chromium.org> wrote: > > > > I suppose none of those things matter though as long as there is some > > typec switch registered here so that the driver can be informed of the > > pin assignment. Is it right that the "mode-switch" property is only > > required in DT if this device is going to control the mode of the > > connector, i.e. USB+DP, or just DP? Where this device can't do that > > because it doesn't support only DP. > > If the anx7625 is used just to route all lanes from 1 usb-c-connector (i.e > the USB+DP case), a mode-switch wouldn't be of much use, since one > would also route the CC lines to the built-in PD controller; so it will > already have knowledge of what mode the switch is in. > > The mode-switch is likely only relevant for this hardware configuration( > it's "DP only" in the sense that the USB pins to the SoC never go anywhere). > One only has 2 SS lanes each (from each usb-c-connector). > > Since there is no CC-line, the anx7625 needs to know which one has DP > enabled on it. Can the CC line be "captured" and not actually sent to the anx7625? I imagine if that is possible, maybe the CC lines would go to some micro-controller or something that did more typec management things and then the anx7625 driver would need to do software control of the mode and orientation control.
On Thu, Jun 30, 2022 at 4:21 PM Stephen Boyd <swboyd@chromium.org> wrote: > > Quoting Prashant Malani (2022-06-28 13:56:22) > > On Tue, Jun 28, 2022 at 1:40 PM Stephen Boyd <swboyd@chromium.org> wrote: > > > > > > I suppose none of those things matter though as long as there is some > > > typec switch registered here so that the driver can be informed of the > > > pin assignment. Is it right that the "mode-switch" property is only > > > required in DT if this device is going to control the mode of the > > > connector, i.e. USB+DP, or just DP? Where this device can't do that > > > because it doesn't support only DP. > > > > If the anx7625 is used just to route all lanes from 1 usb-c-connector (i.e > > the USB+DP case), a mode-switch wouldn't be of much use, since one > > would also route the CC lines to the built-in PD controller; so it will > > already have knowledge of what mode the switch is in. > > > > The mode-switch is likely only relevant for this hardware configuration( > > it's "DP only" in the sense that the USB pins to the SoC never go anywhere). > > One only has 2 SS lanes each (from each usb-c-connector). > > > > Since there is no CC-line, the anx7625 needs to know which one has DP > > enabled on it. > > Can the CC line be "captured" and not actually sent to the anx7625? That's what happens on Chrome OS. The cc line goes to the EC (and is "consumed" by the TCPM (Type C Port Manager)) and signals are then sent to the AP over the Host command interface to `cros-ec-typec`. The signals here being all the PD messages communicated between the peripheral and the port. > I imagine if that is possible, maybe the CC lines would go to some > micro-controller or something that did more typec management things and > then the anx7625 driver would need to do software control of the mode > and orientation control. I _guess_ that is possible (though it would seem odd to not use all the PD control hardware in that configuration)? If an system implements it in such a way then: 1. mode-switch: Can be updated to do something when num_typec_switches == 1 ( in the mux_set function imp.l I haven't looked into what registers need to be configured, since we don't have this hardware implementation. 2. orientation-switch: This should be registered, and then flip the lanes when the port driver tells it the orientation is one way or another. So, if someone uses it that way, I think the driver needs only minor updates to support it.