| Message ID | 20230814215457.4075025-1-bhupesh.sharma@linaro.org |
|---|---|
| Headers | show |
| Series | Enable UFS on DragonBoard845c | expand |
On 8/14/23 23:54, Bhupesh Sharma wrote: > This patchset enables the UFS controller on DragonBoard845c > board which houses Qualcomm SDM845 Snapdragon SoC. > > In addition to enabling the UFS HC and UFS QMP PHY found > on this SoC this patchset also contains: > * Patches to add 'reset' controller support for SDM845 SoC. > * Minor UFS core framework fixes. > * Patches to sync u-boot UFS driver flow with Linux UFS driver. > * Patches which enable RESET, UFS and SCSI config options for > DragonBoard845c. I submitted a couple of UFS related patches yesterday, they add handling for controllers which cannot handle 64bit memory and add support for cache management. Please rebase on top of those, otherwise there will be hard to resolve conflicts. [PATCH 1/6] ufs: Add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS [PATCH 1/2] blk: Add bounce buffer support to read/write operations
On Tue, 15 Aug 2023 at 04:03, Marek Vasut <marek.vasut@mailbox.org> wrote: > > On 8/14/23 23:54, Bhupesh Sharma wrote: > > This patchset enables the UFS controller on DragonBoard845c > > board which houses Qualcomm SDM845 Snapdragon SoC. > > > > In addition to enabling the UFS HC and UFS QMP PHY found > > on this SoC this patchset also contains: > > * Patches to add 'reset' controller support for SDM845 SoC. > > * Minor UFS core framework fixes. > > * Patches to sync u-boot UFS driver flow with Linux UFS driver. > > * Patches which enable RESET, UFS and SCSI config options for > > DragonBoard845c. > > I submitted a couple of UFS related patches yesterday, they add handling > for controllers which cannot handle 64bit memory and add support for > cache management. Please rebase on top of those, otherwise there will be > hard to resolve conflicts. > > [PATCH 1/6] ufs: Add UFSHCD_QUIRK_BROKEN_64BIT_ADDRESS > [PATCH 1/2] blk: Add bounce buffer support to read/write operations Ok, let me rebase, do a quick check and resend the patchset. Thanks, Bhupesh
This patchset enables the UFS controller on DragonBoard845c board which houses Qualcomm SDM845 Snapdragon SoC. In addition to enabling the UFS HC and UFS QMP PHY found on this SoC this patchset also contains: * Patches to add 'reset' controller support for SDM845 SoC. * Minor UFS core framework fixes. * Patches to sync u-boot UFS driver flow with Linux UFS driver. * Patches which enable RESET, UFS and SCSI config options for DragonBoard845c. Also since the current UFS maintainer's email bounces, promote myself as the new UFS maintainer to help address this work-area -> review, test and fix UFS issues in u-boot framework. Bhupesh Sharma (17): reset: qcom: Add support for SDM845 SoC reset table phy: qcom: Import QMP phy related header files from Linux dt-bindings: clock: Import SM6115 and SM8250 related clock header files from Linux phy: qcom: Add QMP UFS PHY driver ufs/ufs.h: Add definition of 'ufshcd_rmwl()' ufs: Clear UECPA once due to LINERESET has happened during LINK_STARTUP ufs: Add support for probing UFS controllers newer than UFSHCI_VERSION_21 ufs: Expose 'ufshcd_ops_dbg_register_dump' vops to allow dumping debug registers ufs: Sync possible UFS Quirks with Linux UFS driver ufs: Add missing memory barriers ufs: Fix debug message in 'ufs_start' ufs: Add Support for Qualcomm UFS HC driver arm: dts: qcom: sdm845: Add 'reset' node arm: dts: qcom: sdm845: Add UFS HC and PHY nodes configs/dragonboard845c_defconfig: Enable DM_RESET by default configs/dragonboard845c_defconfig: Enable UFS + SCSI related configs MAINTAINERS: Update UFS maintainer MAINTAINERS | 2 +- arch/arm/dts/sdm845.dtsi | 68 ++ configs/dragonboard845c_defconfig | 11 + drivers/phy/qcom/Kconfig | 6 + drivers/phy/qcom/Makefile | 1 + drivers/phy/qcom/phy-qcom-qmp-pcs-ufs-v2.h | 25 + drivers/phy/qcom/phy-qcom-qmp-pcs-ufs-v3.h | 21 + drivers/phy/qcom/phy-qcom-qmp-pcs-ufs-v4.h | 31 + drivers/phy/qcom/phy-qcom-qmp-pcs-ufs-v5.h | 32 + drivers/phy/qcom/phy-qcom-qmp-pcs-ufs-v6.h | 31 + drivers/phy/qcom/phy-qcom-qmp-pcs-v2.h | 43 + drivers/phy/qcom/phy-qcom-qmp-pcs-v3.h | 145 +++ drivers/phy/qcom/phy-qcom-qmp-pcs-v4.h | 135 +++ .../phy/qcom/phy-qcom-qmp-qserdes-com-v3.h | 111 ++ .../phy/qcom/phy-qcom-qmp-qserdes-com-v4.h | 123 +++ drivers/phy/qcom/phy-qcom-qmp-qserdes-com.h | 140 +++ drivers/phy/qcom/phy-qcom-qmp-qserdes-pll.h | 66 ++ .../qcom/phy-qcom-qmp-qserdes-txrx-ufs-v6.h | 30 + .../phy/qcom/phy-qcom-qmp-qserdes-txrx-v3.h | 68 ++ .../phy/qcom/phy-qcom-qmp-qserdes-txrx-v4.h | 233 ++++ drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx.h | 205 ++++ drivers/phy/qcom/phy-qcom-qmp-ufs.c | 996 ++++++++++++++++++ drivers/phy/qcom/phy-qcom-qmp.h | 115 ++ drivers/reset/reset-qcom.c | 33 + drivers/ufs/Kconfig | 7 + drivers/ufs/Makefile | 1 + drivers/ufs/qcom-ufshcd.c | 880 ++++++++++++++++ drivers/ufs/ufs-qcom.h | 275 +++++ drivers/ufs/ufs.c | 93 +- drivers/ufs/ufs.h | 156 ++- include/dt-bindings/clock/qcom,gcc-sm6115.h | 201 ++++ include/dt-bindings/clock/qcom,gcc-sm8250.h | 271 +++++ 32 files changed, 4539 insertions(+), 16 deletions(-) create mode 100644 drivers/phy/qcom/phy-qcom-qmp-pcs-ufs-v2.h create mode 100644 drivers/phy/qcom/phy-qcom-qmp-pcs-ufs-v3.h create mode 100644 drivers/phy/qcom/phy-qcom-qmp-pcs-ufs-v4.h create mode 100644 drivers/phy/qcom/phy-qcom-qmp-pcs-ufs-v5.h create mode 100644 drivers/phy/qcom/phy-qcom-qmp-pcs-ufs-v6.h create mode 100644 drivers/phy/qcom/phy-qcom-qmp-pcs-v2.h create mode 100644 drivers/phy/qcom/phy-qcom-qmp-pcs-v3.h create mode 100644 drivers/phy/qcom/phy-qcom-qmp-pcs-v4.h create mode 100644 drivers/phy/qcom/phy-qcom-qmp-qserdes-com-v3.h create mode 100644 drivers/phy/qcom/phy-qcom-qmp-qserdes-com-v4.h create mode 100644 drivers/phy/qcom/phy-qcom-qmp-qserdes-com.h create mode 100644 drivers/phy/qcom/phy-qcom-qmp-qserdes-pll.h create mode 100644 drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx-ufs-v6.h create mode 100644 drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx-v3.h create mode 100644 drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx-v4.h create mode 100644 drivers/phy/qcom/phy-qcom-qmp-qserdes-txrx.h create mode 100644 drivers/phy/qcom/phy-qcom-qmp-ufs.c create mode 100644 drivers/phy/qcom/phy-qcom-qmp.h create mode 100644 drivers/ufs/qcom-ufshcd.c create mode 100644 drivers/ufs/ufs-qcom.h create mode 100644 include/dt-bindings/clock/qcom,gcc-sm6115.h create mode 100644 include/dt-bindings/clock/qcom,gcc-sm8250.h