Message ID | 20230629184318.551317-3-linux@fw-web.de |
---|---|
State | New |
Headers | show |
Series | Fix emmc hs400 mode on mt7986 | expand |
Hi, just a friendly reminder, patch seems not applied to next. dt-binding part is reported as applied regards Frank > Gesendet: Donnerstag, 29. Juni 2023 um 20:43 Uhr > Von: "Frank Wunderlich" <linux@fw-web.de> > An: linux-mediatek@lists.infradead.org > Cc: "Frank Wunderlich" <frank-w@public-files.de>, "Chaotian Jing" <chaotian.jing@mediatek.com>, "Ulf Hansson" <ulf.hansson@linaro.org>, "Rob Herring" <robh+dt@kernel.org>, "Krzysztof Kozlowski" <krzysztof.kozlowski+dt@linaro.org>, "Conor Dooley" <conor+dt@kernel.org>, "Matthias Brugger" <matthias.bgg@gmail.com>, "AngeloGioacchino Del Regno" <angelogioacchino.delregno@collabora.com>, "Wenbin Mei" <wenbin.mei@mediatek.com>, "Sam Shih" <sam.shih@mediatek.com>, linux-mmc@vger.kernel.org, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, "Eric Woudstra" <ericwouds@gmail.com>, stable@vger.kernel.org > Betreff: [PATCH v2 2/2] arm64: dts: mt7986: fix emmc hs400 mode without uboot initialization > > From: Eric Woudstra <ericwouds@gmail.com> > > Eric reports errors on emmc with hs400 mode when booting linux on bpi-r3 > without uboot [1]. Booting with uboot does not show this because clocks > seem to be initialized by uboot. > > Fix this by adding assigned-clocks and assigned-clock-parents like it's > done in uboot [2]. > > [1] https://forum.banana-pi.org/t/bpi-r3-kernel-fails-setting-emmc-clock-to-416m-depends-on-u-boot/15170 > [2] https://github.com/u-boot/u-boot/blob/master/arch/arm/dts/mt7986.dtsi#L287 > > Cc: stable@vger.kernel.org > Fixes: 513b49d19b34 ("arm64: dts: mt7986: add mmc related device nodes") > Signed-off-by: Eric Woudstra <ericwouds@gmail.com> > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> > --- > arch/arm64/boot/dts/mediatek/mt7986a.dtsi | 4 ++++ > 1 file changed, 4 insertions(+) > > diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi > index 68539ea788df..207510abda89 100644 > --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi > +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi > @@ -374,6 +374,10 @@ mmc0: mmc@11230000 { > reg = <0 0x11230000 0 0x1000>, > <0 0x11c20000 0 0x1000>; > interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; > + assigned-clocks = <&topckgen CLK_TOP_EMMC_416M_SEL>, > + <&topckgen CLK_TOP_EMMC_250M_SEL>; > + assigned-clock-parents = <&apmixedsys CLK_APMIXED_MPLL>, > + <&topckgen CLK_TOP_NET1PLL_D5_D2>; > clocks = <&topckgen CLK_TOP_EMMC_416M_SEL>, > <&infracfg CLK_INFRA_MSDC_HCK_CK>, > <&infracfg CLK_INFRA_MSDC_CK>, > -- > 2.34.1 > >
Il 29/06/23 20:43, Frank Wunderlich ha scritto: > From: Eric Woudstra <ericwouds@gmail.com> > > Eric reports errors on emmc with hs400 mode when booting linux on bpi-r3 > without uboot [1]. Booting with uboot does not show this because clocks > seem to be initialized by uboot. > > Fix this by adding assigned-clocks and assigned-clock-parents like it's > done in uboot [2]. > > [1] https://forum.banana-pi.org/t/bpi-r3-kernel-fails-setting-emmc-clock-to-416m-depends-on-u-boot/15170 > [2] https://github.com/u-boot/u-boot/blob/master/arch/arm/dts/mt7986.dtsi#L287 > > Cc: stable@vger.kernel.org > Fixes: 513b49d19b34 ("arm64: dts: mt7986: add mmc related device nodes") > Signed-off-by: Eric Woudstra <ericwouds@gmail.com> > Signed-off-by: Frank Wunderlich <frank-w@public-files.de> Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
diff --git a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi index 68539ea788df..207510abda89 100644 --- a/arch/arm64/boot/dts/mediatek/mt7986a.dtsi +++ b/arch/arm64/boot/dts/mediatek/mt7986a.dtsi @@ -374,6 +374,10 @@ mmc0: mmc@11230000 { reg = <0 0x11230000 0 0x1000>, <0 0x11c20000 0 0x1000>; interrupts = <GIC_SPI 143 IRQ_TYPE_LEVEL_HIGH>; + assigned-clocks = <&topckgen CLK_TOP_EMMC_416M_SEL>, + <&topckgen CLK_TOP_EMMC_250M_SEL>; + assigned-clock-parents = <&apmixedsys CLK_APMIXED_MPLL>, + <&topckgen CLK_TOP_NET1PLL_D5_D2>; clocks = <&topckgen CLK_TOP_EMMC_416M_SEL>, <&infracfg CLK_INFRA_MSDC_HCK_CK>, <&infracfg CLK_INFRA_MSDC_CK>,