| Message ID | 20231207100723.15015-2-tychang@realtek.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | Add gpio driver support for Realtek DHC SoCs | expand |
On 07/12/2023 11:07, TY Chang wrote: > From: Tzuyi Chang <tychang@realtek.com> > > Add the device tree bindings for the Realtek DHC(Digital Home Center) > RTD SoCs GPIO controllers. > > Signed-off-by: Tzuyi Chang <tychang@realtek.com> > --- > v2 to v3 change: > 1. Remove generic compatible and use SoC-specific compatible instead. > v1 to v2 change: > 1. Add description for DHC RTD SoCs. > 2. Revise the compatible names. > 3. Add descriptions for reg and interrupts properties. > --- > .../bindings/gpio/realtek,rtd-gpio.yaml | 69 +++++++++++++++++++ > 1 file changed, 69 insertions(+) > create mode 100644 Documentation/devicetree/bindings/gpio/realtek,rtd-gpio.yaml > > diff --git a/Documentation/devicetree/bindings/gpio/realtek,rtd-gpio.yaml b/Documentation/devicetree/bindings/gpio/realtek,rtd-gpio.yaml > new file mode 100644 > index 000000000000..984e7dbd322e > --- /dev/null > +++ b/Documentation/devicetree/bindings/gpio/realtek,rtd-gpio.yaml > @@ -0,0 +1,69 @@ > +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) > +# Copyright 2023 Realtek Semiconductor Corporation > +%YAML 1.2 > +--- > +$id: http://devicetree.org/schemas/gpio/realtek,rtd-gpio.yaml# > +$schema: http://devicetree.org/meta-schemas/core.yaml# > + > +title: Realtek DHC GPIO controller > + > +maintainers: > + - Tzuyi Chang <tychang@realtek.com> > + > +description: > + The GPIO controller is designed for the Realtek DHC (Digital Home Center) > + RTD series SoC family, which are high-definition media processor SoCs. > + > +properties: > + compatible: > + enum: > + - realtek,rtd1295-misc-gpio > + - realtek,rtd1295-iso-gpio > + - realtek,rtd1395-iso-gpio > + - realtek,rtd1619-iso-gpio > + - realtek,rtd1319-iso-gpio > + - realtek,rtd1619b-iso-gpio > + - realtek,rtd1319d-iso-gpio > + - realtek,rtd1315e-iso-gpio If there is going to be resend, please order this list alphanumerically. > + > + reg: > + items: > + - description: GPIO controller registers > + - description: GPIO interrupt registers > + ... > + > +additionalProperties: false > + > +examples: > + - | > + gpio@100 { > + compatible = "realtek,rtd1319d-iso-gpio"; > + reg = <0x100 0x100>, > + <0x000 0x0b0>; That's odd. Why order is decreasing? Isn't 0x0 the address of the SoC (soc@0)? It is, btw, 0x0, not 0x000. The same for 0x0b0 -> 0xb0, unless you want to pad to full word. Best regards, Krzysztof
Hi Krzysztof, >> diff --git >> a/Documentation/devicetree/bindings/gpio/realtek,rtd-gpio.yaml >> b/Documentation/devicetree/bindings/gpio/realtek,rtd-gpio.yaml >> new file mode 100644 >> index 000000000000..984e7dbd322e >> --- /dev/null >> +++ b/Documentation/devicetree/bindings/gpio/realtek,rtd-gpio.yaml >> @@ -0,0 +1,69 @@ >> +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) # Copyright 2023 >> +Realtek Semiconductor Corporation %YAML 1.2 >> +--- >> +$id: http://devicetree.org/schemas/gpio/realtek,rtd-gpio.yaml# >> +$schema: http://devicetree.org/meta-schemas/core.yaml# >> + >> +title: Realtek DHC GPIO controller >> + >> +maintainers: >> + - Tzuyi Chang <tychang@realtek.com> >> + >> +description: >> + The GPIO controller is designed for the Realtek DHC (Digital Home >> +Center) >> + RTD series SoC family, which are high-definition media processor SoCs. >> + >> +properties: >> + compatible: >> + enum: >> + - realtek,rtd1295-misc-gpio >> + - realtek,rtd1295-iso-gpio >> + - realtek,rtd1395-iso-gpio >> + - realtek,rtd1619-iso-gpio >> + - realtek,rtd1319-iso-gpio >> + - realtek,rtd1619b-iso-gpio >> + - realtek,rtd1319d-iso-gpio >> + - realtek,rtd1315e-iso-gpio > >If there is going to be resend, please order this list alphanumerically. > I will revise it in the next version >> + >> + reg: >> + items: >> + - description: GPIO controller registers >> + - description: GPIO interrupt registers >> + > >... > >> + >> +additionalProperties: false >> + >> +examples: >> + - | >> + gpio@100 { >> + compatible = "realtek,rtd1319d-iso-gpio"; >> + reg = <0x100 0x100>, >> + <0x000 0x0b0>; > >That's odd. Why order is decreasing? Isn't 0x0 the address of the SoC (soc@0)? > The DTS use in our platform follows this structure: soc@0 { rbus: rbus@98000000 { ... iso: syscon@7000 { ... gpio: gpio@100 { compatible = "realtek,rtd1319d-iso-gpio"; reg = <0x100 0x100>, <0x000 0x0b0>; interrupt-parent = <&iso_irq_mux>; interrupts = <19>, <20>; gpio-ranges = <&pinctrl 0 0 82>; gpio-controller; #gpio-cells = <2>; }; }; }; }; The base address for the GPIO controller is 0x98007100. The second line of 'reg' refers to the GPIO interrupt status registers, which are distributed within the range of 0x98007000 to 0x980070AF. Would it be advisable to fetch the syscon from parent node(iso: syscon@7000) to handle the GPIO interrupt status registers? >It is, btw, 0x0, not 0x000. The same for 0x0b0 -> 0xb0, unless you want to pad >to full word. > I will revise it in the next version. Thanks, Tzuyi Chang
On 08/12/2023 10:03, TY_Chang[張子逸] wrote: > > The DTS use in our platform follows this structure: > > soc@0 { > rbus: rbus@98000000 { > ... > iso: syscon@7000 { > ... > gpio: gpio@100 { > compatible = "realtek,rtd1319d-iso-gpio"; > reg = <0x100 0x100>, > <0x000 0x0b0>; > interrupt-parent = <&iso_irq_mux>; > interrupts = <19>, <20>; > gpio-ranges = <&pinctrl 0 0 82>; > gpio-controller; > #gpio-cells = <2>; > }; > }; > }; > }; > > The base address for the GPIO controller is 0x98007100. The second line of > 'reg' refers to the GPIO interrupt status registers, which are distributed > within the range of 0x98007000 to 0x980070AF. Ah, ok. > Would it be advisable to fetch the > syscon from parent node(iso: syscon@7000) to handle the GPIO interrupt status > registers? If these are GPIO interrupts then current description is fine. > >> It is, btw, 0x0, not 0x000. The same for 0x0b0 -> 0xb0, unless you want to pad >> to full word. >> Best regards, Krzysztof
diff --git a/Documentation/devicetree/bindings/gpio/realtek,rtd-gpio.yaml b/Documentation/devicetree/bindings/gpio/realtek,rtd-gpio.yaml new file mode 100644 index 000000000000..984e7dbd322e --- /dev/null +++ b/Documentation/devicetree/bindings/gpio/realtek,rtd-gpio.yaml @@ -0,0 +1,69 @@ +# SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause) +# Copyright 2023 Realtek Semiconductor Corporation +%YAML 1.2 +--- +$id: http://devicetree.org/schemas/gpio/realtek,rtd-gpio.yaml# +$schema: http://devicetree.org/meta-schemas/core.yaml# + +title: Realtek DHC GPIO controller + +maintainers: + - Tzuyi Chang <tychang@realtek.com> + +description: + The GPIO controller is designed for the Realtek DHC (Digital Home Center) + RTD series SoC family, which are high-definition media processor SoCs. + +properties: + compatible: + enum: + - realtek,rtd1295-misc-gpio + - realtek,rtd1295-iso-gpio + - realtek,rtd1395-iso-gpio + - realtek,rtd1619-iso-gpio + - realtek,rtd1319-iso-gpio + - realtek,rtd1619b-iso-gpio + - realtek,rtd1319d-iso-gpio + - realtek,rtd1315e-iso-gpio + + reg: + items: + - description: GPIO controller registers + - description: GPIO interrupt registers + + interrupts: + items: + - description: Interrupt number of the assert GPIO interrupt, which is + triggered when there is a rising edge. + - description: Interrupt number of the deassert GPIO interrupt, which is + triggered when there is a falling edge. + + gpio-ranges: true + + gpio-controller: true + + "#gpio-cells": + const: 2 + +required: + - compatible + - reg + - interrupts + - gpio-ranges + - gpio-controller + - "#gpio-cells" + +additionalProperties: false + +examples: + - | + gpio@100 { + compatible = "realtek,rtd1319d-iso-gpio"; + reg = <0x100 0x100>, + <0x000 0x0b0>; + interrupt-parent = <&iso_irq_mux>; + interrupts = <19>, <20>; + gpio-ranges = <&pinctrl 0 0 82>; + gpio-controller; + #gpio-cells = <2>; + };