Message ID | 20231211161331.1277825-6-james.clark@arm.com |
---|---|
State | Accepted |
Commit | 3115ee021bfb04efde2e96507bfcc1330261a6a1 |
Headers | show |
Series | arm64: perf: Add support for event counting threshold | expand |
Hello, On Mon, Dec 11, 2023 at 04:13:17PM +0000, James Clark wrote: > FEAT_PMUv3_TH (Armv8.8) adds two new fields to PMEVTYPER, so include > them in the mask. These aren't writable on 32 bit kernels as they are in > the high part of the register, so only include them for arm64. > > It would be difficult to do this statically in the asm header files for > each platform without resulting in circular includes or #ifdefs inline > in the code. For that reason the ARMV8_PMU_EVTYPE_MASK definition has > been removed and the mask is constructed programmatically. > > Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> > Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com> > Signed-off-by: James Clark <james.clark@arm.com> This change is in today's next as commit 3115ee021bfb04efde2e96507bfcc1330261a6a1. this breaks allmodconfig building on ARCH=arm: In file included from include/linux/ratelimit_types.h:5, from include/linux/printk.h:9, from include/asm-generic/bug.h:22, from arch/arm/include/asm/bug.h:60, from include/linux/bug.h:5, from include/linux/mmdebug.h:5, from include/linux/percpu.h:5, from include/asm-generic/irq_regs.h:11, from ./arch/arm/include/generated/asm/irq_regs.h:1, from drivers/perf/arm_pmuv3.c:11: drivers/perf/arm_pmuv3.c: In function ‘armv8pmu_write_evtype’: include/linux/bits.h:34:29: error: left shift count >= width of type [-Werror=shift-count-overflow] 34 | (((~UL(0)) - (UL(1) << (l)) + 1) & \ | ^~ include/linux/bits.h:37:38: note: in expansion of macro ‘__GENMASK’ 37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l)) | ^~~~~~~~~ include/linux/perf/arm_pmuv3.h:238:33: note: in expansion of macro ‘GENMASK’ 238 | #define ARMV8_PMU_EVTYPE_TC GENMASK(63, 61) | ^~~~~~~ drivers/perf/arm_pmuv3.c:567:25: note: in expansion of macro ‘ARMV8_PMU_EVTYPE_TC’ 567 | mask |= ARMV8_PMU_EVTYPE_TC | ARMV8_PMU_EVTYPE_TH; | ^~~~~~~~~~~~~~~~~~~ include/linux/bits.h:35:18: error: right shift count is negative [-Werror=shift-count-negative] 35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h)))) | ^~ include/linux/bits.h:37:38: note: in expansion of macro ‘__GENMASK’ 37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l)) | ^~~~~~~~~ include/linux/perf/arm_pmuv3.h:238:33: note: in expansion of macro ‘GENMASK’ 238 | #define ARMV8_PMU_EVTYPE_TC GENMASK(63, 61) | ^~~~~~~ drivers/perf/arm_pmuv3.c:567:25: note: in expansion of macro ‘ARMV8_PMU_EVTYPE_TC’ 567 | mask |= ARMV8_PMU_EVTYPE_TC | ARMV8_PMU_EVTYPE_TH; | ^~~~~~~~~~~~~~~~~~~ include/linux/bits.h:34:29: error: left shift count >= width of type [-Werror=shift-count-overflow] 34 | (((~UL(0)) - (UL(1) << (l)) + 1) & \ | ^~ include/linux/bits.h:37:38: note: in expansion of macro ‘__GENMASK’ 37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l)) | ^~~~~~~~~ include/linux/perf/arm_pmuv3.h:237:33: note: in expansion of macro ‘GENMASK’ 237 | #define ARMV8_PMU_EVTYPE_TH GENMASK(43, 32) | ^~~~~~~ drivers/perf/arm_pmuv3.c:567:47: note: in expansion of macro ‘ARMV8_PMU_EVTYPE_TH’ 567 | mask |= ARMV8_PMU_EVTYPE_TC | ARMV8_PMU_EVTYPE_TH; | ^~~~~~~~~~~~~~~~~~~ include/linux/bits.h:35:18: error: right shift count is negative [-Werror=shift-count-negative] 35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h)))) | ^~ include/linux/bits.h:37:38: note: in expansion of macro ‘__GENMASK’ 37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l)) | ^~~~~~~~~ include/linux/perf/arm_pmuv3.h:237:33: note: in expansion of macro ‘GENMASK’ 237 | #define ARMV8_PMU_EVTYPE_TH GENMASK(43, 32) | ^~~~~~~ drivers/perf/arm_pmuv3.c:567:47: note: in expansion of macro ‘ARMV8_PMU_EVTYPE_TH’ 567 | mask |= ARMV8_PMU_EVTYPE_TC | ARMV8_PMU_EVTYPE_TH; | ^~~~~~~~~~~~~~~~~~~ I guess that's easy to fix but I didn't look into that. Best regards Uwe
On 15/12/2023 12:08, Uwe Kleine-König wrote: > Hello, > > On Mon, Dec 11, 2023 at 04:13:17PM +0000, James Clark wrote: >> FEAT_PMUv3_TH (Armv8.8) adds two new fields to PMEVTYPER, so include >> them in the mask. These aren't writable on 32 bit kernels as they are in >> the high part of the register, so only include them for arm64. >> >> It would be difficult to do this statically in the asm header files for >> each platform without resulting in circular includes or #ifdefs inline >> in the code. For that reason the ARMV8_PMU_EVTYPE_MASK definition has >> been removed and the mask is constructed programmatically. >> >> Reviewed-by: Suzuki K Poulose <suzuki.poulose@arm.com> >> Reviewed-by: Anshuman Khandual <anshuman.khandual@arm.com> >> Signed-off-by: James Clark <james.clark@arm.com> > > This change is in today's next as commit > 3115ee021bfb04efde2e96507bfcc1330261a6a1. this breaks allmodconfig > building on ARCH=arm: > > In file included from include/linux/ratelimit_types.h:5, > from include/linux/printk.h:9, > from include/asm-generic/bug.h:22, > from arch/arm/include/asm/bug.h:60, > from include/linux/bug.h:5, > from include/linux/mmdebug.h:5, > from include/linux/percpu.h:5, > from include/asm-generic/irq_regs.h:11, > from ./arch/arm/include/generated/asm/irq_regs.h:1, > from drivers/perf/arm_pmuv3.c:11: > drivers/perf/arm_pmuv3.c: In function ‘armv8pmu_write_evtype’: > include/linux/bits.h:34:29: error: left shift count >= width of type [-Werror=shift-count-overflow] > 34 | (((~UL(0)) - (UL(1) << (l)) + 1) & \ > | ^~ > include/linux/bits.h:37:38: note: in expansion of macro ‘__GENMASK’ > 37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l)) > | ^~~~~~~~~ > include/linux/perf/arm_pmuv3.h:238:33: note: in expansion of macro ‘GENMASK’ > 238 | #define ARMV8_PMU_EVTYPE_TC GENMASK(63, 61) > | ^~~~~~~ > drivers/perf/arm_pmuv3.c:567:25: note: in expansion of macro ‘ARMV8_PMU_EVTYPE_TC’ > 567 | mask |= ARMV8_PMU_EVTYPE_TC | ARMV8_PMU_EVTYPE_TH; > | ^~~~~~~~~~~~~~~~~~~ > include/linux/bits.h:35:18: error: right shift count is negative [-Werror=shift-count-negative] > 35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h)))) > | ^~ > include/linux/bits.h:37:38: note: in expansion of macro ‘__GENMASK’ > 37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l)) > | ^~~~~~~~~ > include/linux/perf/arm_pmuv3.h:238:33: note: in expansion of macro ‘GENMASK’ > 238 | #define ARMV8_PMU_EVTYPE_TC GENMASK(63, 61) > | ^~~~~~~ > drivers/perf/arm_pmuv3.c:567:25: note: in expansion of macro ‘ARMV8_PMU_EVTYPE_TC’ > 567 | mask |= ARMV8_PMU_EVTYPE_TC | ARMV8_PMU_EVTYPE_TH; > | ^~~~~~~~~~~~~~~~~~~ > include/linux/bits.h:34:29: error: left shift count >= width of type [-Werror=shift-count-overflow] > 34 | (((~UL(0)) - (UL(1) << (l)) + 1) & \ > | ^~ > include/linux/bits.h:37:38: note: in expansion of macro ‘__GENMASK’ > 37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l)) > | ^~~~~~~~~ > include/linux/perf/arm_pmuv3.h:237:33: note: in expansion of macro ‘GENMASK’ > 237 | #define ARMV8_PMU_EVTYPE_TH GENMASK(43, 32) > | ^~~~~~~ > drivers/perf/arm_pmuv3.c:567:47: note: in expansion of macro ‘ARMV8_PMU_EVTYPE_TH’ > 567 | mask |= ARMV8_PMU_EVTYPE_TC | ARMV8_PMU_EVTYPE_TH; > | ^~~~~~~~~~~~~~~~~~~ > include/linux/bits.h:35:18: error: right shift count is negative [-Werror=shift-count-negative] > 35 | (~UL(0) >> (BITS_PER_LONG - 1 - (h)))) > | ^~ > include/linux/bits.h:37:38: note: in expansion of macro ‘__GENMASK’ > 37 | (GENMASK_INPUT_CHECK(h, l) + __GENMASK(h, l)) > | ^~~~~~~~~ > include/linux/perf/arm_pmuv3.h:237:33: note: in expansion of macro ‘GENMASK’ > 237 | #define ARMV8_PMU_EVTYPE_TH GENMASK(43, 32) > | ^~~~~~~ > drivers/perf/arm_pmuv3.c:567:47: note: in expansion of macro ‘ARMV8_PMU_EVTYPE_TH’ > 567 | mask |= ARMV8_PMU_EVTYPE_TC | ARMV8_PMU_EVTYPE_TH; > | ^~~~~~~~~~~~~~~~~~~ > > I guess that's easy to fix but I didn't look into that. > > Best regards > Uwe > Thanks for the report. I see that the build is only broken with GCC and is working with LLVM. I will look into a fix. Worst case the if can be changed to an #ifdef James
diff --git a/drivers/perf/arm_pmuv3.c b/drivers/perf/arm_pmuv3.c index fbdf3cab8e66..16ef8448afc0 100644 --- a/drivers/perf/arm_pmuv3.c +++ b/drivers/perf/arm_pmuv3.c @@ -554,8 +554,15 @@ static void armv8pmu_write_counter(struct perf_event *event, u64 value) static void armv8pmu_write_evtype(int idx, u32 val) { u32 counter = ARMV8_IDX_TO_COUNTER(idx); + unsigned long mask = ARMV8_PMU_EVTYPE_EVENT | + ARMV8_PMU_INCLUDE_EL2 | + ARMV8_PMU_EXCLUDE_EL0 | + ARMV8_PMU_EXCLUDE_EL1; - val &= ARMV8_PMU_EVTYPE_MASK; + if (IS_ENABLED(CONFIG_ARM64)) + mask |= ARMV8_PMU_EVTYPE_TC | ARMV8_PMU_EVTYPE_TH; + + val &= mask; write_pmevtypern(counter, val); } diff --git a/include/linux/perf/arm_pmuv3.h b/include/linux/perf/arm_pmuv3.h index daa63542242d..91957b3468e9 100644 --- a/include/linux/perf/arm_pmuv3.h +++ b/include/linux/perf/arm_pmuv3.h @@ -233,8 +233,9 @@ /* * PMXEVTYPER: Event selection reg */ -#define ARMV8_PMU_EVTYPE_MASK 0xc800ffff /* Mask for writable bits */ #define ARMV8_PMU_EVTYPE_EVENT GENMASK(15, 0) /* Mask for EVENT bits */ +#define ARMV8_PMU_EVTYPE_TH GENMASK(43, 32) +#define ARMV8_PMU_EVTYPE_TC GENMASK(63, 61) /* * Event filters for PMUv3