Message ID | 20240709-document_qcs9100_imem_compatible-v2-1-de2a8712d788@quicinc.com |
---|---|
State | New |
Headers | show |
Series | [v2] dt-bindings: soc: qcom: add qcom,qcs9100-imem compatible | expand |
On 7/9/2024 10:05 PM, Tengfei Fan wrote: > Add qcom,qcs9100-imem compatible name support. > QCS9100 is drived from SA8775p. Currently, both the QCS9100 and SA8775p > platform use non-SCMI resource. In the future, the SA8775p platform will > move to use SCMI resources and it will have new sa8775p-related device > tree. Consequently, introduce "qcom,qcs9100-imem" to describe non-SCMI > based imem. > > Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> > --- > Introduce support for the QCS9100 SoC device tree (DTSI) and the > QCS9100 RIDE board DTS. The QCS9100 is a variant of the SA8775p. > While the QCS9100 platform is still in the early design stage, the > QCS9100 RIDE board is identical to the SA8775p RIDE board, except it > mounts the QCS9100 SoC instead of the SA8775p SoC. > > The QCS9100 SoC DTSI is directly renamed from the SA8775p SoC DTSI, and > all the compatible strings will be updated from "SA8775p" to "QCS9100". > The QCS9100 device tree patches will be pushed after all the device tree > bindings and device driver patches are reviewed. > > The final dtsi will like: > https://lore.kernel.org/linux-arm-msm/20240703025850.2172008-3-quic_tengfan@quicinc.com/ > > The detailed cover letter reference: > https://lore.kernel.org/linux-arm-msm/20240703025850.2172008-1-quic_tengfan@quicinc.com/ > --- > Changes in v2: > - Split huge patch series into different patch series according to > subsytems > - Update patch commit message > > prevous disscussion here: > [1] v1: https://lore.kernel.org/linux-arm-msm/20240703025850.2172008-1-quic_tengfan@quicinc.com/ > --- > Documentation/devicetree/bindings/sram/qcom,imem.yaml | 1 + > 1 file changed, 1 insertion(+) > > diff --git a/Documentation/devicetree/bindings/sram/qcom,imem.yaml b/Documentation/devicetree/bindings/sram/qcom,imem.yaml > index faef3d6e0a94..e45337a21232 100644 > --- a/Documentation/devicetree/bindings/sram/qcom,imem.yaml > +++ b/Documentation/devicetree/bindings/sram/qcom,imem.yaml > @@ -21,6 +21,7 @@ properties: > - qcom,msm8226-imem > - qcom,msm8974-imem > - qcom,qcs404-imem > + - qcom,qcs9100-imem > - qcom,qdu1000-imem > - qcom,sa8775p-imem > - qcom,sc7180-imem > > --- > base-commit: 0b58e108042b0ed28a71cd7edf5175999955b233 > change-id: 20240709-document_qcs9100_imem_compatible-d40db479083e > > Best regards, After considering the feedback provided on the subject, We have decided to keep current SA8775p compatible and ABI compatibility in drivers. Let's close this session and ignore the current patche here. Thank you for your input.
diff --git a/Documentation/devicetree/bindings/sram/qcom,imem.yaml b/Documentation/devicetree/bindings/sram/qcom,imem.yaml index faef3d6e0a94..e45337a21232 100644 --- a/Documentation/devicetree/bindings/sram/qcom,imem.yaml +++ b/Documentation/devicetree/bindings/sram/qcom,imem.yaml @@ -21,6 +21,7 @@ properties: - qcom,msm8226-imem - qcom,msm8974-imem - qcom,qcs404-imem + - qcom,qcs9100-imem - qcom,qdu1000-imem - qcom,sa8775p-imem - qcom,sc7180-imem
Add qcom,qcs9100-imem compatible name support. QCS9100 is drived from SA8775p. Currently, both the QCS9100 and SA8775p platform use non-SCMI resource. In the future, the SA8775p platform will move to use SCMI resources and it will have new sa8775p-related device tree. Consequently, introduce "qcom,qcs9100-imem" to describe non-SCMI based imem. Signed-off-by: Tengfei Fan <quic_tengfan@quicinc.com> --- Introduce support for the QCS9100 SoC device tree (DTSI) and the QCS9100 RIDE board DTS. The QCS9100 is a variant of the SA8775p. While the QCS9100 platform is still in the early design stage, the QCS9100 RIDE board is identical to the SA8775p RIDE board, except it mounts the QCS9100 SoC instead of the SA8775p SoC. The QCS9100 SoC DTSI is directly renamed from the SA8775p SoC DTSI, and all the compatible strings will be updated from "SA8775p" to "QCS9100". The QCS9100 device tree patches will be pushed after all the device tree bindings and device driver patches are reviewed. The final dtsi will like: https://lore.kernel.org/linux-arm-msm/20240703025850.2172008-3-quic_tengfan@quicinc.com/ The detailed cover letter reference: https://lore.kernel.org/linux-arm-msm/20240703025850.2172008-1-quic_tengfan@quicinc.com/ --- Changes in v2: - Split huge patch series into different patch series according to subsytems - Update patch commit message prevous disscussion here: [1] v1: https://lore.kernel.org/linux-arm-msm/20240703025850.2172008-1-quic_tengfan@quicinc.com/ --- Documentation/devicetree/bindings/sram/qcom,imem.yaml | 1 + 1 file changed, 1 insertion(+) --- base-commit: 0b58e108042b0ed28a71cd7edf5175999955b233 change-id: 20240709-document_qcs9100_imem_compatible-d40db479083e Best regards,