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[v2,24/54] accel/tcg: Preserve tlb flags in tlb_set_compare

Message ID 20241114160131.48616-25-richard.henderson@linaro.org
State New
Headers show
Series accel/tcg: Convert victim tlb to IntervalTree | expand

Commit Message

Richard Henderson Nov. 14, 2024, 4:01 p.m. UTC
Before, if !enable, we squashed the entire address comparator to -1.
This works because TLB_INVALID_MASK is set.  It seemed natural, because
the tlb is cleared with memset of 0xff.

With this patch, we retain all of the other TLB_* bits even when
the page is not enabled.  This works because TLB_INVALID_MASK is set.
This will be used in a subsequent patch; the addr_read comparator
contains the flags for pages that are executable but not readable.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
---
 accel/tcg/cputlb.c | 16 +++++++---------
 1 file changed, 7 insertions(+), 9 deletions(-)

Comments

Pierrick Bouvier Nov. 14, 2024, 6:11 p.m. UTC | #1
On 11/14/24 08:01, Richard Henderson wrote:
> Before, if !enable, we squashed the entire address comparator to -1.
> This works because TLB_INVALID_MASK is set.  It seemed natural, because
> the tlb is cleared with memset of 0xff.
> 
> With this patch, we retain all of the other TLB_* bits even when
> the page is not enabled.  This works because TLB_INVALID_MASK is set.
> This will be used in a subsequent patch; the addr_read comparator
> contains the flags for pages that are executable but not readable.
> 
> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
> ---
>   accel/tcg/cputlb.c | 16 +++++++---------
>   1 file changed, 7 insertions(+), 9 deletions(-)
> 
> diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
> index ae3a99eb47..585f4171cc 100644
> --- a/accel/tcg/cputlb.c
> +++ b/accel/tcg/cputlb.c
> @@ -1032,15 +1032,13 @@ static inline void tlb_set_compare(CPUTLBEntryFull *full, CPUTLBEntry *ent,
>                                      vaddr address, int flags,
>                                      MMUAccessType access_type, bool enable)
>   {
> -    if (enable) {
> -        address |= flags & TLB_FLAGS_MASK;
> -        flags &= TLB_SLOW_FLAGS_MASK;
> -        if (flags) {
> -            address |= TLB_FORCE_SLOW;
> -        }
> -    } else {
> -        address = -1;
> -        flags = 0;
> +    if (!enable) {
> +        address = TLB_INVALID_MASK;
> +    }
> +    address |= flags & TLB_FLAGS_MASK;
> +    flags &= TLB_SLOW_FLAGS_MASK;
> +    if (flags) {
> +        address |= TLB_FORCE_SLOW;
>       }
>       ent->addr_idx[access_type] = address;
>       full->slow_flags[access_type] = flags;

Good that you extracted that from original patch, it's much more clear now.
Reviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>
diff mbox series

Patch

diff --git a/accel/tcg/cputlb.c b/accel/tcg/cputlb.c
index ae3a99eb47..585f4171cc 100644
--- a/accel/tcg/cputlb.c
+++ b/accel/tcg/cputlb.c
@@ -1032,15 +1032,13 @@  static inline void tlb_set_compare(CPUTLBEntryFull *full, CPUTLBEntry *ent,
                                    vaddr address, int flags,
                                    MMUAccessType access_type, bool enable)
 {
-    if (enable) {
-        address |= flags & TLB_FLAGS_MASK;
-        flags &= TLB_SLOW_FLAGS_MASK;
-        if (flags) {
-            address |= TLB_FORCE_SLOW;
-        }
-    } else {
-        address = -1;
-        flags = 0;
+    if (!enable) {
+        address = TLB_INVALID_MASK;
+    }
+    address |= flags & TLB_FLAGS_MASK;
+    flags &= TLB_SLOW_FLAGS_MASK;
+    if (flags) {
+        address |= TLB_FORCE_SLOW;
     }
     ent->addr_idx[access_type] = address;
     full->slow_flags[access_type] = flags;