Message ID | 20241115102537.1330300-1-romain.naour@smile.fr |
---|---|
State | New |
Headers | show |
Series | [v2] ARM: dts: dra7: Add bus_dma_limit for l4 cfg bus | expand |
On Fri, 15 Nov 2024 11:25:37 +0100, Romain Naour wrote: > A bus_dma_limit was added for l3 bus by commit cfb5d65f2595 > ("ARM: dts: dra7: Add bus_dma_limit for L3 bus") to fix an issue > observed only with SATA on DRA7-EVM with 4GB RAM and CONFIG_ARM_LPAE > enabled. > > Since kernel 5.13, the SATA issue can be reproduced again following > the SATA node move from L3 bus to L4_cfg in commit 8af15365a368 > ("ARM: dts: Configure interconnect target module for dra7 sata"). > > [...] Applied, thanks! [1/1] ARM: dts: dra7: Add bus_dma_limit for l4 cfg bus commit: 08272ce1de633bc99342ac1b7a1bb69172058dc0 Best regards,
diff --git a/arch/arm/boot/dts/ti/omap/dra7-l4.dtsi b/arch/arm/boot/dts/ti/omap/dra7-l4.dtsi index 6e67d99832ac..ba7fdaae9c6e 100644 --- a/arch/arm/boot/dts/ti/omap/dra7-l4.dtsi +++ b/arch/arm/boot/dts/ti/omap/dra7-l4.dtsi @@ -12,6 +12,7 @@ &l4_cfg { /* 0x4a000000 */ ranges = <0x00000000 0x4a000000 0x100000>, /* segment 0 */ <0x00100000 0x4a100000 0x100000>, /* segment 1 */ <0x00200000 0x4a200000 0x100000>; /* segment 2 */ + dma-ranges; segment@0 { /* 0x4a000000 */ compatible = "simple-pm-bus"; @@ -557,6 +558,7 @@ segment@100000 { /* 0x4a100000 */ <0x0007e000 0x0017e000 0x001000>, /* ap 124 */ <0x00059000 0x00159000 0x001000>, /* ap 125 */ <0x0005a000 0x0015a000 0x001000>; /* ap 126 */ + dma-ranges; target-module@2000 { /* 0x4a102000, ap 27 3c.0 */ compatible = "ti,sysc";