| Message ID | 20250418061500.1629200-2-shin.son@samsung.com |
|---|---|
| State | Superseded |
| Headers | show |
| Series | add CPUCL0 clock support for exynosauto v920 SoC | expand |
On 18/04/2025 08:14, Shin Son wrote:
> Add cpucl0 clock definitions.
... and cpucl0 is? Describe the hardware in the commit msg in the future.
Best regards,
Krzysztof
Hello Krzysztof Kozlowski, > -----Original Message----- > From: Krzysztof Kozlowski [mailto:krzk@kernel.org] > Sent: Tuesday, April 22, 2025 4:54 PM > To: Shin Son <shin.son@samsung.com>; Sylwester Nawrocki > <s.nawrocki@samsung.com>; Chanwoo Choi <cw00.choi@samsung.com>; Alim > Akhtar <alim.akhtar@samsung.com>; Michael Turquette > <mturquette@baylibre.com>; Stephen Boyd <sboyd@kernel.org>; Rob Herring > <robh@kernel.org>; Conor Dooley <conor+dt@kernel.org>; Sunyeal Hong > <sunyeal.hong@samsung.com> > Cc: linux-samsung-soc@vger.kernel.org; linux-clk@vger.kernel.org; > devicetree@vger.kernel.org; linux-arm-kernel@lists.infradead.org; linux- > kernel@vger.kernel.org > Subject: Re: [PATCH 1/3] dt-bindings: clock: exynosautov920: add cpucl0 > clock definitions > > On 18/04/2025 08:14, Shin Son wrote: > > Add cpucl0 clock definitions. > > ... and cpucl0 is? Describe the hardware in the commit msg in the future. > > > Best regards, > Krzysztof Thanks for the feedback. I'll update the commit message to include a brief description of the hardware. Best regards, Shin Son
diff --git a/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml b/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml index 3330b2727474..d12b17c177df 100644 --- a/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml +++ b/Documentation/devicetree/bindings/clock/samsung,exynosautov920-clock.yaml @@ -8,6 +8,7 @@ title: Samsung ExynosAuto v920 SoC clock controller maintainers: - Sunyeal Hong <sunyeal.hong@samsung.com> + - Shin Son <shin.son@samsung.com> - Chanwoo Choi <cw00.choi@samsung.com> - Krzysztof Kozlowski <krzk@kernel.org> - Sylwester Nawrocki <s.nawrocki@samsung.com> @@ -32,6 +33,7 @@ properties: compatible: enum: - samsung,exynosautov920-cmu-top + - samsung,exynosautov920-cmu-cpucl0 - samsung,exynosautov920-cmu-peric0 - samsung,exynosautov920-cmu-peric1 - samsung,exynosautov920-cmu-misc @@ -69,6 +71,29 @@ allOf: items: - const: oscclk + - if: + properties: + compatible: + contains: + enum: + - samsung,exynosautov920-cmu-cpucl0 + + then: + properties: + clocks: + items: + - description: External reference clock (38.4 MHz) + - description: CMU_CPUCL0 SWITCH clock (from CMU_TOP) + - description: CMU_CPUCL0 CLUSTER clock (from CMU_TOP) + - description: CMU_CPUCL0 DBG clock (from CMU_TOP) + + clock-names: + items: + - const: oscclk + - const: switch + - const: cluster + - const: dbg + - if: properties: compatible: diff --git a/include/dt-bindings/clock/samsung,exynosautov920.h b/include/dt-bindings/clock/samsung,exynosautov920.h index 0c681f2ba3d0..c57a1d749700 100644 --- a/include/dt-bindings/clock/samsung,exynosautov920.h +++ b/include/dt-bindings/clock/samsung,exynosautov920.h @@ -162,6 +162,25 @@ #define DOUT_CLKCMU_TAA_NOC 146 #define DOUT_TCXO_DIV2 147 +/* CMU_CPUCL0 */ +#define CLK_FOUT_CPUCL0_PLL 1 + +#define CLK_MOUT_PLL_CPUCL0 2 +#define CLK_MOUT_CPUCL0_CLUSTER_USER 3 +#define CLK_MOUT_CPUCL0_DBG_USER 4 +#define CLK_MOUT_CPUCL0_SWITCH_USER 5 +#define CLK_MOUT_CPUCL0_CLUSTER 6 +#define CLK_MOUT_CPUCL0_CORE 7 + +#define CLK_DOUT_CLUSTER0_ACLK 8 +#define CLK_DOUT_CLUSTER0_ATCLK 9 +#define CLK_DOUT_CLUSTER0_MPCLK 10 +#define CLK_DOUT_CLUSTER0_PCLK 11 +#define CLK_DOUT_CLUSTER0_PERIPHCLK 12 +#define CLK_DOUT_CPUCL0_DBG_NOC 13 +#define CLK_DOUT_CPUCL0_DBG_PCLKDBG 14 +#define CLK_DOUT_CPUCL0_NOCP 15 + /* CMU_PERIC0 */ #define CLK_MOUT_PERIC0_IP_USER 1 #define CLK_MOUT_PERIC0_NOC_USER 2
Add cpucl0 clock definitions. Signed-off-by: Shin Son <shin.son@samsung.com> --- .../clock/samsung,exynosautov920-clock.yaml | 25 +++++++++++++++++++ .../clock/samsung,exynosautov920.h | 19 ++++++++++++++ 2 files changed, 44 insertions(+)