| Message ID | 20170908071156.5115-1-clabbe.montjoie@gmail.com |
|---|---|
| Headers | show |
| Series | net: stmmac: dwmac-sun8i: Handle integrated PHY | expand |
On Fri, Sep 08, 2017 at 09:11:51AM +0200, Corentin Labbe wrote: > This patch add documentation about the MDIO switch used on sun8i-h3-emac > for integrated PHY. > > Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> > --- > .../devicetree/bindings/net/dwmac-sun8i.txt | 127 +++++++++++++++++++-- > 1 file changed, 120 insertions(+), 7 deletions(-) > > diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt > index 725f3b187886..3fa0e54825ea 100644 > --- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt > +++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt > @@ -39,7 +39,7 @@ Optional properties for the following compatibles: > - allwinner,leds-active-low: EPHY LEDs are active low > > Required child node of emac: > -- mdio bus node: should be named mdio > +- mdio bus node: should be labelled mdio labels do not end up in the final DT (while the names do) so why are you making this change? > > Required properties of the mdio node: > - #address-cells: shall be 1 > @@ -48,14 +48,28 @@ Required properties of the mdio node: > The device node referenced by "phy" or "phy-handle" should be a child node > of the mdio node. See phy.txt for the generic PHY bindings. > > -Required properties of the phy node with the following compatibles: > +The following compatibles require an mdio-mux node called "mdio-mux": > + - "allwinner,sun8i-h3-emac" > + - "allwinner,sun8i-v3s-emac": > +Required properties for the mdio-mux node: > + - compatible = "mdio-mux" > + - one child mdio for the integrated mdio > + - one child mdio for the external mdio if present (V3s have none) > +Required properties for the mdio-mux children node: > + - reg: 0 for internal MDIO bus, 1 for external MDIO bus > + > +The following compatibles require a PHY node representing the integrated > +PHY, under the integrated MDIO bus node if an mdio-mux node is used: > - "allwinner,sun8i-h3-emac", > - "allwinner,sun8i-v3s-emac": > + > +Required properties of the integrated phy node: > - clocks: a phandle to the reference clock for the EPHY > - resets: a phandle to the reset control for the EPHY > +- phy-is-integrated > +- Should be a child of the integrated mdio I'm not sure what you mean by that, you ask that it should (so not required?) be a child of the integrated mdio... > > -Example: > - > +Example with integrated PHY: > emac: ethernet@1c0b000 { > compatible = "allwinner,sun8i-h3-emac"; > syscon = <&syscon>; > @@ -72,13 +86,112 @@ emac: ethernet@1c0b000 { > phy-handle = <&int_mii_phy>; > phy-mode = "mii"; > allwinner,leds-active-low; > + > + mdio0: mdio { (You don't label it mdio here, unlike what was asked before) > + #address-cells = <1>; > + #size-cells = <0>; > + compatible = "snps,dwmac-mdio"; > + }; I think Rob wanted that node gone? > + mdio-mux { > + compatible = "mdio-mux"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + int_mdio: mdio@1 { > + reg = <0>; > + #address-cells = <1>; > + #size-cells = <0>; > + int_mii_phy: ethernet-phy@1 { > + reg = <1>; > + clocks = <&ccu CLK_BUS_EPHY>; > + resets = <&ccu RST_BUS_EPHY>; > + phy-is-integrated > + }; > + }; ... And in your example it's a child of the mdio mux? > + ext_mdio: mdio@0 { > + reg = <1>; > + #address-cells = <1>; > + #size-cells = <0>; > + }; > + }; > +}; > + > +Example with external PHY: > +emac: ethernet@1c0b000 { > + compatible = "allwinner,sun8i-h3-emac"; > + syscon = <&syscon>; > + reg = <0x01c0b000 0x104>; > + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "macirq"; > + resets = <&ccu RST_BUS_EMAC>; > + reset-names = "stmmaceth"; > + clocks = <&ccu CLK_BUS_EMAC>; > + clock-names = "stmmaceth"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + phy-handle = <&ext_rgmii_phy>; > + phy-mode = "rgmii"; > + allwinner,leds-active-low; > + > + mdio0: mdio { > + #address-cells = <1>; > + #size-cells = <0>; > + compatible = "snps,dwmac-mdio"; > + }; > + > + mdio-mux { > + compatible = "mdio-mux"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + int_mdio: mdio@1 { > + reg = <0>; > + #address-cells = <1>; > + #size-cells = <0>; > + int_mii_phy: ethernet-phy@1 { > + reg = <1>; > + clocks = <&ccu CLK_BUS_EPHY>; > + resets = <&ccu RST_BUS_EPHY>; > + phy-is-integrated > + }; > + }; > + ext_mdio: mdio@0 { > + reg = <1>; > + #address-cells = <1>; > + #size-cells = <0>; > + ext_rgmii_phy: ethernet-phy@1 { > + reg = <1>; > + }; > + }; > + }; > +}; > + > +Example with SoC without integrated PHY > + > +emac: ethernet@1c0b000 { > + compatible = "allwinner,sun8i-a83t-emac"; > + syscon = <&syscon>; > + reg = <0x01c0b000 0x104>; > + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; > + interrupt-names = "macirq"; > + resets = <&ccu RST_BUS_EMAC>; > + reset-names = "stmmaceth"; > + clocks = <&ccu CLK_BUS_EMAC>; > + clock-names = "stmmaceth"; > + #address-cells = <1>; > + #size-cells = <0>; > + > + phy-handle = <&ext_rgmii_phy>; > + phy-mode = "rgmii"; > + > mdio: mdio { > + compatible = "snps,dwmac-mdio"; > #address-cells = <1>; > #size-cells = <0>; > - int_mii_phy: ethernet-phy@1 { > + ext_rgmii_phy: ethernet-phy@1 { > reg = <1>; > - clocks = <&ccu CLK_BUS_EPHY>; > - resets = <&ccu RST_BUS_EPHY>; > }; > }; > }; > -- > 2.13.5 > -- Maxime Ripard, Free Electrons Embedded Linux and Kernel engineering http://free-electrons.com
On Fri, Sep 08, 2017 at 09:19:54AM +0200, Maxime Ripard wrote: > On Fri, Sep 08, 2017 at 09:11:47AM +0200, Corentin Labbe wrote: > > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts > > index 1c2387bd5df6..968908761194 100644 > > --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts > > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts > > @@ -50,6 +50,7 @@ > > compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5"; > > > > aliases { > > + ethernet0 = &emac; > > serial0 = &uart0; > > }; > > > > @@ -108,6 +109,22 @@ > > status = "okay"; > > }; > > > > +&emac { > > + pinctrl-names = "default"; > > + pinctrl-0 = <&emac_rgmii_pins>; > > + phy-supply = <®_gmac_3v3>; > > + phy-handle = <&ext_rgmii_phy>; > > + phy-mode = "rgmii"; > > + status = "okay"; > > +}; > > + > > +&mdio { > > + ext_rgmii_phy: ethernet-phy@7 { > > + compatible = "ethernet-phy-ieee802.3-c22"; > > + reg = <7>; > > + }; > > +}; > > + > > This won't compile, you don't have that node in the H5 DTSI. > Since H5 DTSI include arm/sunxi-h3-h5.dtsi it compiles. Furthermore, I restested just now and confirm, it compiles fine. Regards -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Fri, Sep 08, 2017 at 09:25:38AM +0200, Maxime Ripard wrote: > On Fri, Sep 08, 2017 at 09:11:51AM +0200, Corentin Labbe wrote: > > This patch add documentation about the MDIO switch used on sun8i-h3-emac > > for integrated PHY. > > > > Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> > > --- > > .../devicetree/bindings/net/dwmac-sun8i.txt | 127 +++++++++++++++++++-- > > 1 file changed, 120 insertions(+), 7 deletions(-) > > > > diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt > > index 725f3b187886..3fa0e54825ea 100644 > > --- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt > > +++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt > > @@ -39,7 +39,7 @@ Optional properties for the following compatibles: > > - allwinner,leds-active-low: EPHY LEDs are active low > > > > Required child node of emac: > > -- mdio bus node: should be named mdio > > +- mdio bus node: should be labelled mdio > > labels do not end up in the final DT (while the names do) so why are > you making this change? > I misunderstood label/name. Anyway, this contrainst should leave due to "snps,dwmac-mdio MDIOs are automatically registered" > > > > Required properties of the mdio node: > > - #address-cells: shall be 1 > > @@ -48,14 +48,28 @@ Required properties of the mdio node: > > The device node referenced by "phy" or "phy-handle" should be a child node > > of the mdio node. See phy.txt for the generic PHY bindings. > > > > -Required properties of the phy node with the following compatibles: > > +The following compatibles require an mdio-mux node called "mdio-mux": > > + - "allwinner,sun8i-h3-emac" > > + - "allwinner,sun8i-v3s-emac": > > +Required properties for the mdio-mux node: > > + - compatible = "mdio-mux" > > + - one child mdio for the integrated mdio > > + - one child mdio for the external mdio if present (V3s have none) > > +Required properties for the mdio-mux children node: > > + - reg: 0 for internal MDIO bus, 1 for external MDIO bus > > + > > +The following compatibles require a PHY node representing the integrated > > +PHY, under the integrated MDIO bus node if an mdio-mux node is used: > > - "allwinner,sun8i-h3-emac", > > - "allwinner,sun8i-v3s-emac": > > + > > +Required properties of the integrated phy node: > > - clocks: a phandle to the reference clock for the EPHY > > - resets: a phandle to the reset control for the EPHY > > +- phy-is-integrated > > +- Should be a child of the integrated mdio > > I'm not sure what you mean by that, you ask that it should (so not > required?) be a child of the integrated mdio... > I will change words to "must" > > > > -Example: > > - > > +Example with integrated PHY: > > emac: ethernet@1c0b000 { > > compatible = "allwinner,sun8i-h3-emac"; > > syscon = <&syscon>; > > @@ -72,13 +86,112 @@ emac: ethernet@1c0b000 { > > phy-handle = <&int_mii_phy>; > > phy-mode = "mii"; > > allwinner,leds-active-low; > > + > > + mdio0: mdio { > > (You don't label it mdio here, unlike what was asked before) > > > + #address-cells = <1>; > > + #size-cells = <0>; > > + compatible = "snps,dwmac-mdio"; > > + }; > > I think Rob wanted that node gone? > MDIO mux does not work without a parent MDIO, either gived by "parent-bus" or directly via mdio_mux_init() (like it is the case in dwmac-sun8i) > > + mdio-mux { > > + compatible = "mdio-mux"; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + int_mdio: mdio@1 { > > + reg = <0>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + int_mii_phy: ethernet-phy@1 { > > + reg = <1>; > > + clocks = <&ccu CLK_BUS_EPHY>; > > + resets = <&ccu RST_BUS_EPHY>; > > + phy-is-integrated > > + }; > > + }; > > ... And in your example it's a child of the mdio mux? > So I confirm, integrated PHY must be a child of integrated MDIO (that must be a child of mdio-mux). The example is good. > > + ext_mdio: mdio@0 { > > + reg = <1>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + }; > > + }; > > +}; > > + > > +Example with external PHY: > > +emac: ethernet@1c0b000 { > > + compatible = "allwinner,sun8i-h3-emac"; > > + syscon = <&syscon>; > > + reg = <0x01c0b000 0x104>; > > + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; > > + interrupt-names = "macirq"; > > + resets = <&ccu RST_BUS_EMAC>; > > + reset-names = "stmmaceth"; > > + clocks = <&ccu CLK_BUS_EMAC>; > > + clock-names = "stmmaceth"; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + phy-handle = <&ext_rgmii_phy>; > > + phy-mode = "rgmii"; > > + allwinner,leds-active-low; > > + > > + mdio0: mdio { > > + #address-cells = <1>; > > + #size-cells = <0>; > > + compatible = "snps,dwmac-mdio"; > > + }; > > + > > + mdio-mux { > > + compatible = "mdio-mux"; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + int_mdio: mdio@1 { > > + reg = <0>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + int_mii_phy: ethernet-phy@1 { > > + reg = <1>; > > + clocks = <&ccu CLK_BUS_EPHY>; > > + resets = <&ccu RST_BUS_EPHY>; > > + phy-is-integrated > > + }; > > + }; > > + ext_mdio: mdio@0 { > > + reg = <1>; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + ext_rgmii_phy: ethernet-phy@1 { > > + reg = <1>; > > + }; > > + }; > > + }; > > +}; > > + > > +Example with SoC without integrated PHY > > + > > +emac: ethernet@1c0b000 { > > + compatible = "allwinner,sun8i-a83t-emac"; > > + syscon = <&syscon>; > > + reg = <0x01c0b000 0x104>; > > + interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>; > > + interrupt-names = "macirq"; > > + resets = <&ccu RST_BUS_EMAC>; > > + reset-names = "stmmaceth"; > > + clocks = <&ccu CLK_BUS_EMAC>; > > + clock-names = "stmmaceth"; > > + #address-cells = <1>; > > + #size-cells = <0>; > > + > > + phy-handle = <&ext_rgmii_phy>; > > + phy-mode = "rgmii"; > > + > > mdio: mdio { > > + compatible = "snps,dwmac-mdio"; > > #address-cells = <1>; > > #size-cells = <0>; > > - int_mii_phy: ethernet-phy@1 { > > + ext_rgmii_phy: ethernet-phy@1 { > > reg = <1>; > > - clocks = <&ccu CLK_BUS_EPHY>; > > - resets = <&ccu RST_BUS_EPHY>; > > }; > > }; > > }; > > -- > > 2.13.5 > > > > -- > Maxime Ripard, Free Electrons > Embedded Linux and Kernel engineering > http://free-electrons.com Thanks for the review, I will fix all reported problem in next version. Regards Corentin Labbe -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
> > > +static int mdio_mux_syscon_switch_fn(int current_child, int desired_child, > > > + void *data) > > > +{ > > > + struct stmmac_priv *priv = data; > > > + struct sunxi_priv_data *gmac = priv->plat->bsp_priv; > > > + u32 reg, val; > > > + int ret = 0; > > > + bool need_reset = false; > > > + > > > + if (current_child ^ desired_child) { > > > + regmap_read(gmac->regmap, SYSCON_EMAC_REG, ®); > > > + switch (desired_child) { > > > + case DWMAC_sUN8I_MDIO_MUX_INTERNAL_ID: > > > + dev_info(priv->device, "Switch mux to internal PHY"); > > > + val = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SELECT; > > > + if (gmac->use_internal_phy) > > > + need_reset = true; > > > + break; > > > > This i don't get. Why do you need use_internal_phy? Isn't that > > implicit from DWMAC_sUN8I_MDIO_MUX_INTERNAL_ID? Is it even possible to > > use an external PHY on the internal MDIO bus? > > > > On my H3 box with external PHY, the MDIO mux library first select (for scan ?) the internal MDIO. > Without use_internal_phy usage, this board will launch a reset to use the internal MDIO... and this reset timeout/fail. Do you know why the reset times out/fails? Andrew -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Fri, Sep 08, 2017 at 04:00:20PM +0200, Andrew Lunn wrote: > > > > +static int mdio_mux_syscon_switch_fn(int current_child, int desired_child, > > > > + void *data) > > > > +{ > > > > + struct stmmac_priv *priv = data; > > > > + struct sunxi_priv_data *gmac = priv->plat->bsp_priv; > > > > + u32 reg, val; > > > > + int ret = 0; > > > > + bool need_reset = false; > > > > + > > > > + if (current_child ^ desired_child) { > > > > + regmap_read(gmac->regmap, SYSCON_EMAC_REG, ®); > > > > + switch (desired_child) { > > > > + case DWMAC_sUN8I_MDIO_MUX_INTERNAL_ID: > > > > + dev_info(priv->device, "Switch mux to internal PHY"); > > > > + val = (reg & ~H3_EPHY_MUX_MASK) | H3_EPHY_SELECT; > > > > + if (gmac->use_internal_phy) > > > > + need_reset = true; > > > > + break; > > > > > > This i don't get. Why do you need use_internal_phy? Isn't that > > > implicit from DWMAC_sUN8I_MDIO_MUX_INTERNAL_ID? Is it even possible to > > > use an external PHY on the internal MDIO bus? > > > > > > > On my H3 box with external PHY, the MDIO mux library first select (for scan ?) the internal MDIO. > > Without use_internal_phy usage, this board will launch a reset to use the internal MDIO... and this reset timeout/fail. > > Do you know why the reset times out/fails? > Because there are nothing connected to it. I got also reset timeout on integrated MDIO when the integrated PHY is not powered. -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
> > Do you know why the reset times out/fails? > > > > Because there are nothing connected to it. That should not be an issue. A read should just return 0xffff. And it should return 0xffff fast. The timing of the MDIO protocol is fixed. A read or a write takes a fixed number of cycles, independent of if there is a device there or not. The bus data line has a pullup, so if you try to access a missing device, you automatically read 0xffff. Andrew -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Fri, Sep 08, 2017 at 04:17:36PM +0200, Andrew Lunn wrote: > > > Do you know why the reset times out/fails? > > > > > > > Because there are nothing connected to it. > > That should not be an issue. A read should just return 0xffff. And it > should return 0xffff fast. The timing of the MDIO protocol is fixed. A > read or a write takes a fixed number of cycles, independent of if > there is a device there or not. The bus data line has a pullup, so if > you try to access a missing device, you automatically read 0xffff. > Perhaps, but the reality is that with nothing connected to it, the reset of the MAC timeout. Certainly, the MAC does not support finding no PHY. So, to prevent an error message, and a "freeze" of the net process, the need_reset trick is necessary. Regards Corentin Labbe -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Fri, Sep 08, 2017 at 03:39:04PM +0800, Chen-Yu Tsai wrote: > On Fri, Sep 8, 2017 at 3:36 PM, Corentin Labbe > <clabbe.montjoie@gmail.com> wrote: > > On Fri, Sep 08, 2017 at 09:19:54AM +0200, Maxime Ripard wrote: > >> On Fri, Sep 08, 2017 at 09:11:47AM +0200, Corentin Labbe wrote: > >> > diff --git a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts > >> > index 1c2387bd5df6..968908761194 100644 > >> > --- a/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts > >> > +++ b/arch/arm64/boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts > >> > @@ -50,6 +50,7 @@ > >> > compatible = "friendlyarm,nanopi-neo2", "allwinner,sun50i-h5"; > >> > > >> > aliases { > >> > + ethernet0 = &emac; > >> > serial0 = &uart0; > >> > }; > >> > > >> > @@ -108,6 +109,22 @@ > >> > status = "okay"; > >> > }; > >> > > >> > +&emac { > >> > + pinctrl-names = "default"; > >> > + pinctrl-0 = <&emac_rgmii_pins>; > >> > + phy-supply = <®_gmac_3v3>; > >> > + phy-handle = <&ext_rgmii_phy>; > >> > + phy-mode = "rgmii"; > >> > + status = "okay"; > >> > +}; > >> > + > >> > +&mdio { > >> > + ext_rgmii_phy: ethernet-phy@7 { > >> > + compatible = "ethernet-phy-ieee802.3-c22"; > >> > + reg = <7>; > >> > + }; > >> > +}; > >> > + > >> > >> This won't compile, you don't have that node in the H5 DTSI. > >> > > > > Since H5 DTSI include arm/sunxi-h3-h5.dtsi it compiles. > > Furthermore, I restested just now and confirm, it compiles fine. > > The order of your patches are wrong. No individual patch should > introduce build failures, not just the whole patch series. > Yes, I just miss-understood the reason of build failure. I will fix the order in the next serie. Thanks Corentin Labbe -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Fri, Sep 08, 2017 at 04:28:25PM +0200, Corentin Labbe wrote: > On Fri, Sep 08, 2017 at 04:17:36PM +0200, Andrew Lunn wrote: > > > > Do you know why the reset times out/fails? > > > > > > > > > > Because there are nothing connected to it. > > > > That should not be an issue. A read should just return 0xffff. And it > > should return 0xffff fast. The timing of the MDIO protocol is fixed. A > > read or a write takes a fixed number of cycles, independent of if > > there is a device there or not. The bus data line has a pullup, so if > > you try to access a missing device, you automatically read 0xffff. > > > > Perhaps, but the reality is that with nothing connected to it, the reset of the MAC timeout. > Certainly, the MAC does not support finding no PHY. Are you sure this is not because of the clock and reset? + #address-cells = <1>; + #size-cells = <0>; + int_mii_phy: ethernet-phy@1 { + compatible = "ethernet-phy-ieee802.3-c22"; + reg = <1>; + clocks = <&ccu CLK_BUS_EPHY>; + resets = <&ccu RST_BUS_EPHY>; The way you describe it here, the clock and reset are for the PHY. But maybe it is actually for the bus? I can understand a bus timing out if it has no clock, or it is held in reset. Try enabling the clock and reset when the internal bus is selected, not when the PHY on the bus is selected. Andrew -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Mon, Sep 11, 2017 at 06:11:24PM +0200, Andrew Lunn wrote: > On Fri, Sep 08, 2017 at 04:28:25PM +0200, Corentin Labbe wrote: > > On Fri, Sep 08, 2017 at 04:17:36PM +0200, Andrew Lunn wrote: > > > > > Do you know why the reset times out/fails? > > > > > > > > > > > > > Because there are nothing connected to it. > > > > > > That should not be an issue. A read should just return 0xffff. And it > > > should return 0xffff fast. The timing of the MDIO protocol is fixed. A > > > read or a write takes a fixed number of cycles, independent of if > > > there is a device there or not. The bus data line has a pullup, so if > > > you try to access a missing device, you automatically read 0xffff. > > > > > > > Perhaps, but the reality is that with nothing connected to it, the reset of the MAC timeout. > > Certainly, the MAC does not support finding no PHY. > > Are you sure this is not because of the clock and reset? > > + #address-cells = <1>; > + #size-cells = <0>; > + int_mii_phy: ethernet-phy@1 { > + compatible = "ethernet-phy-ieee802.3-c22"; > + reg = <1>; > + clocks = <&ccu CLK_BUS_EPHY>; > + resets = <&ccu RST_BUS_EPHY>; > > The way you describe it here, the clock and reset are for the PHY. But > maybe it is actually for the bus? I can understand a bus timing out if > it has no clock, or it is held in reset. Try enabling the clock and > reset when the internal bus is selected, not when the PHY on the bus > is selected. > Even with CLK_BUS_EPHY/RST_BUS_EPHY enabled, the MAC reset timeout. So no the CLK/RST are really for the PHY. Regards PS: patch and result with "integrated CLK/RST always on" --- a/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c +++ b/drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c @@ -659,7 +659,7 @@ static int mdio_mux_syscon_switch_fn(int current_child, int desired_child, struct sunxi_priv_data *gmac = priv->plat->bsp_priv; u32 reg, val; int ret = 0; - bool need_reset = false; + bool need_reset = true; if (current_child ^ desired_child) { regmap_read(gmac->regmap, SYSCON_EMAC_REG, ®); @@ -824,7 +824,7 @@ static int sun8i_dwmac_power_internal_phy(struct stmmac_priv *priv) int ret; if (!gmac->use_internal_phy) - return 0; + dev_info(priv->device, "IPHY BYPASS\n"); ret = clk_prepare_enable(gmac->ephy_clk); if (ret) { [ 18.057162] dwmac-sun8i 1c30000.ethernet: Will use external PHY [ 18.183789] dwmac-sun8i 1c30000.ethernet: IPHY BYPASS [ 18.184136] dwmac-sun8i 1c30000.ethernet: Chain mode enabled [ 18.184158] dwmac-sun8i 1c30000.ethernet: No HW DMA feature register supported [ 18.184175] dwmac-sun8i 1c30000.ethernet: Normal descriptors [ 18.184192] dwmac-sun8i 1c30000.ethernet: RX Checksum Offload Engine supported [ 18.184214] dwmac-sun8i 1c30000.ethernet: COE Type 2 [ 18.184231] dwmac-sun8i 1c30000.ethernet: TX Checksum insertion supported [ 18.185491] libphy: stmmac: probed [ 18.188481] libphy: mdio_mux: probed [ 18.188831] dwmac-sun8i 1c30000.ethernet: Switch mux to internal PHY [ 18.288981] dwmac-sun8i 1c30000.ethernet: EMAC reset timeout [ 18.289559] libphy: mdio_mux: probed [ 18.289629] dwmac-sun8i 1c30000.ethernet: Switch mux to external PHY [ 20.578316] EXT4-fs (mmcblk0p1): re-mounted. Opts: (null) [ 31.240650] RTL8211E Gigabit Ethernet 0.1:00: attached PHY driver [RTL8211E Gigabit Ethernet] (mii_bus:phy_addr=0.1:00, irq=POLL) -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
> Even with CLK_BUS_EPHY/RST_BUS_EPHY enabled, the MAC reset timeout. > So no the CLK/RST are really for the PHY. Thanks for trying that. You said it was probably during scanning of the bus it times out. What address is causing the timeout? 0 or 1? If the internal bus can only have one PHY on it, maybe we need to set bus->phy_mask to 0x1? Andrew -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Mon, Sep 11, 2017 at 10:19:20PM +0200, Andrew Lunn wrote: > > Even with CLK_BUS_EPHY/RST_BUS_EPHY enabled, the MAC reset timeout. > > So no the CLK/RST are really for the PHY. > > Thanks for trying that. > > You said it was probably during scanning of the bus it times out. What > address is causing the timeout? 0 or 1? If the internal bus can only > have one PHY on it, maybe we need to set bus->phy_mask to 0x1? > I have added a trace in begin and end of stmmac_mdio_read() [ 18.145451] libphy: stmmac: probed [ 18.148398] libphy: mdio_mux: probed [ 18.148650] dwmac-sun8i 1c30000.ethernet: Switch mux to internal PHY [ 18.248751] dwmac-sun8i 1c30000.ethernet: EMAC reset timeout [ 18.249297] libphy: mdio_mux: probed [ 18.249362] dwmac-sun8i 1c30000.ethernet: Switch mux to external PHY [ 18.249391] stmmac_mdio_read 0 2 [ 18.249598] stmmac_mdio_read 0 2 1c [ 18.249623] stmmac_mdio_read 0 3 [ 18.249811] stmmac_mdio_read 0 3 c915 [ 20.737271] EXT4-fs (mmcblk0p1): re-mounted. Opts: (null) [ 31.294868] stmmac_mdio_read 0 0 [ 31.295311] stmmac_mdio_read 0 0 1140 It seems that the timeout is unrelated to MDIO bus. Regards -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Fri, Sep 08, 2017 at 09:43:25AM +0200, Corentin Labbe wrote: > On Fri, Sep 08, 2017 at 09:25:38AM +0200, Maxime Ripard wrote: > > On Fri, Sep 08, 2017 at 09:11:51AM +0200, Corentin Labbe wrote: > > > This patch add documentation about the MDIO switch used on sun8i-h3-emac > > > for integrated PHY. > > > > > > Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> > > > --- > > > .../devicetree/bindings/net/dwmac-sun8i.txt | 127 +++++++++++++++++++-- > > > 1 file changed, 120 insertions(+), 7 deletions(-) > > > > > > diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt > > > index 725f3b187886..3fa0e54825ea 100644 > > > --- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt > > > +++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt > > > @@ -39,7 +39,7 @@ Optional properties for the following compatibles: > > > - allwinner,leds-active-low: EPHY LEDs are active low > > > > > > Required child node of emac: > > > -- mdio bus node: should be named mdio > > > +- mdio bus node: should be labelled mdio > > > > labels do not end up in the final DT (while the names do) so why are > > you making this change? > > > > I misunderstood label/name. > Anyway, this contrainst should leave due to "snps,dwmac-mdio MDIOs are automatically registered" > > > > > > > Required properties of the mdio node: > > > - #address-cells: shall be 1 > > > @@ -48,14 +48,28 @@ Required properties of the mdio node: > > > The device node referenced by "phy" or "phy-handle" should be a child node > > > of the mdio node. See phy.txt for the generic PHY bindings. > > > > > > -Required properties of the phy node with the following compatibles: > > > +The following compatibles require an mdio-mux node called "mdio-mux": > > > + - "allwinner,sun8i-h3-emac" > > > + - "allwinner,sun8i-v3s-emac": > > > +Required properties for the mdio-mux node: > > > + - compatible = "mdio-mux" > > > + - one child mdio for the integrated mdio > > > + - one child mdio for the external mdio if present (V3s have none) > > > +Required properties for the mdio-mux children node: > > > + - reg: 0 for internal MDIO bus, 1 for external MDIO bus > > > + > > > +The following compatibles require a PHY node representing the integrated > > > +PHY, under the integrated MDIO bus node if an mdio-mux node is used: > > > - "allwinner,sun8i-h3-emac", > > > - "allwinner,sun8i-v3s-emac": > > > + > > > +Required properties of the integrated phy node: > > > - clocks: a phandle to the reference clock for the EPHY > > > - resets: a phandle to the reset control for the EPHY > > > +- phy-is-integrated > > > +- Should be a child of the integrated mdio > > > > I'm not sure what you mean by that, you ask that it should (so not > > required?) be a child of the integrated mdio... > > > > I will change words to "must" > > > > > > > -Example: > > > - > > > +Example with integrated PHY: > > > emac: ethernet@1c0b000 { > > > compatible = "allwinner,sun8i-h3-emac"; > > > syscon = <&syscon>; > > > @@ -72,13 +86,112 @@ emac: ethernet@1c0b000 { > > > phy-handle = <&int_mii_phy>; > > > phy-mode = "mii"; > > > allwinner,leds-active-low; > > > + > > > + mdio0: mdio { > > > > (You don't label it mdio here, unlike what was asked before) > > > > > + #address-cells = <1>; > > > + #size-cells = <0>; > > > + compatible = "snps,dwmac-mdio"; > > > + }; > > > > I think Rob wanted that node gone? > > > > MDIO mux does not work without a parent MDIO, either gived by "parent-bus" or directly via mdio_mux_init() (like it is the case in dwmac-sun8i) Is the MDIO controller "allwinner,sun8i-h3-emac" or "snps,dwmac-mdio"? If the latter, then I think the node is fine, but then the mux should be a child node of it. IOW, the child of an MDIO controller should either be a mux node or slave devices. > > > > + mdio-mux { > > > + compatible = "mdio-mux"; > > > + #address-cells = <1>; > > > + #size-cells = <0>; > > > + > > > + int_mdio: mdio@1 { > > > + reg = <0>; unit address of 1 and reg prop of 0 don't match. Build your dtb with W=2. > > > + #address-cells = <1>; > > > + #size-cells = <0>; > > > + int_mii_phy: ethernet-phy@1 { > > > + reg = <1>; > > > + clocks = <&ccu CLK_BUS_EPHY>; > > > + resets = <&ccu RST_BUS_EPHY>; > > > + phy-is-integrated Missing ; > > > + }; > > > + }; > > > > ... And in your example it's a child of the mdio mux? > > > > So I confirm, integrated PHY must be a child of integrated MDIO (that must be a child of mdio-mux). > The example is good. > > > > + ext_mdio: mdio@0 { > > > + reg = <1>; Another unit address mismatch. Rob -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Wed, Sep 13, 2017 at 01:20:04PM -0500, Rob Herring wrote: > On Fri, Sep 08, 2017 at 09:43:25AM +0200, Corentin Labbe wrote: > > On Fri, Sep 08, 2017 at 09:25:38AM +0200, Maxime Ripard wrote: > > > On Fri, Sep 08, 2017 at 09:11:51AM +0200, Corentin Labbe wrote: > > > > This patch add documentation about the MDIO switch used on sun8i-h3-emac > > > > for integrated PHY. > > > > > > > > Signed-off-by: Corentin Labbe <clabbe.montjoie@gmail.com> > > > > --- > > > > .../devicetree/bindings/net/dwmac-sun8i.txt | 127 +++++++++++++++++++-- > > > > 1 file changed, 120 insertions(+), 7 deletions(-) > > > > > > > > diff --git a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt > > > > index 725f3b187886..3fa0e54825ea 100644 > > > > --- a/Documentation/devicetree/bindings/net/dwmac-sun8i.txt > > > > +++ b/Documentation/devicetree/bindings/net/dwmac-sun8i.txt > > > > @@ -39,7 +39,7 @@ Optional properties for the following compatibles: > > > > - allwinner,leds-active-low: EPHY LEDs are active low > > > > > > > > Required child node of emac: > > > > -- mdio bus node: should be named mdio > > > > +- mdio bus node: should be labelled mdio > > > > > > labels do not end up in the final DT (while the names do) so why are > > > you making this change? > > > > > > > I misunderstood label/name. > > Anyway, this contrainst should leave due to "snps,dwmac-mdio MDIOs are automatically registered" > > > > > > > > > > Required properties of the mdio node: > > > > - #address-cells: shall be 1 > > > > @@ -48,14 +48,28 @@ Required properties of the mdio node: > > > > The device node referenced by "phy" or "phy-handle" should be a child node > > > > of the mdio node. See phy.txt for the generic PHY bindings. > > > > > > > > -Required properties of the phy node with the following compatibles: > > > > +The following compatibles require an mdio-mux node called "mdio-mux": > > > > + - "allwinner,sun8i-h3-emac" > > > > + - "allwinner,sun8i-v3s-emac": > > > > +Required properties for the mdio-mux node: > > > > + - compatible = "mdio-mux" > > > > + - one child mdio for the integrated mdio > > > > + - one child mdio for the external mdio if present (V3s have none) > > > > +Required properties for the mdio-mux children node: > > > > + - reg: 0 for internal MDIO bus, 1 for external MDIO bus > > > > + > > > > +The following compatibles require a PHY node representing the integrated > > > > +PHY, under the integrated MDIO bus node if an mdio-mux node is used: > > > > - "allwinner,sun8i-h3-emac", > > > > - "allwinner,sun8i-v3s-emac": > > > > + > > > > +Required properties of the integrated phy node: > > > > - clocks: a phandle to the reference clock for the EPHY > > > > - resets: a phandle to the reset control for the EPHY > > > > +- phy-is-integrated > > > > +- Should be a child of the integrated mdio > > > > > > I'm not sure what you mean by that, you ask that it should (so not > > > required?) be a child of the integrated mdio... > > > > > > > I will change words to "must" > > > > > > > > > > -Example: > > > > - > > > > +Example with integrated PHY: > > > > emac: ethernet@1c0b000 { > > > > compatible = "allwinner,sun8i-h3-emac"; > > > > syscon = <&syscon>; > > > > @@ -72,13 +86,112 @@ emac: ethernet@1c0b000 { > > > > phy-handle = <&int_mii_phy>; > > > > phy-mode = "mii"; > > > > allwinner,leds-active-low; > > > > + > > > > + mdio0: mdio { > > > > > > (You don't label it mdio here, unlike what was asked before) > > > > > > > + #address-cells = <1>; > > > > + #size-cells = <0>; > > > > + compatible = "snps,dwmac-mdio"; > > > > + }; > > > > > > I think Rob wanted that node gone? > > > > > > > MDIO mux does not work without a parent MDIO, either gived by "parent-bus" or directly via mdio_mux_init() (like it is the case in dwmac-sun8i) > > Is the MDIO controller "allwinner,sun8i-h3-emac" or "snps,dwmac-mdio"? > If the latter, then I think the node is fine, but then the mux should be > a child node of it. IOW, the child of an MDIO controller should either > be a mux node or slave devices. > It will be snps,dwmac-mdio but putting mdio-mux as a child of it (the mdio node) give me: [ 18.175338] libphy: stmmac: probed [ 18.175379] mdio_bus stmmac-0: /soc/ethernet@1c30000/mdio/mdio-mux has invalid PHY address [ 18.175408] mdio_bus stmmac-0: scan phy mdio-mux at address 0 [ 18.175450] mdio_bus stmmac-0: scan phy mdio-mux at address 1 [ 18.175482] mdio_bus stmmac-0: scan phy mdio-mux at address 2 [ 18.175513] mdio_bus stmmac-0: scan phy mdio-mux at address 3 [ 18.175544] mdio_bus stmmac-0: scan phy mdio-mux at address 4 [ 18.175575] mdio_bus stmmac-0: scan phy mdio-mux at address 5 [ 18.175607] mdio_bus stmmac-0: scan phy mdio-mux at address 6 [ 18.175638] mdio_bus stmmac-0: scan phy mdio-mux at address 7 [ 18.175669] mdio_bus stmmac-0: scan phy mdio-mux at address 8 [ 18.175700] mdio_bus stmmac-0: scan phy mdio-mux at address 9 [ 18.175731] mdio_bus stmmac-0: scan phy mdio-mux at address 10 [ 18.175762] mdio_bus stmmac-0: scan phy mdio-mux at address 11 [ 18.175795] mdio_bus stmmac-0: scan phy mdio-mux at address 12 [ 18.175827] mdio_bus stmmac-0: scan phy mdio-mux at address 13 [ 18.175858] mdio_bus stmmac-0: scan phy mdio-mux at address 14 [ 18.175889] mdio_bus stmmac-0: scan phy mdio-mux at address 15 [ 18.175919] mdio_bus stmmac-0: scan phy mdio-mux at address 16 [ 18.175951] mdio_bus stmmac-0: scan phy mdio-mux at address 17 [ 18.175982] mdio_bus stmmac-0: scan phy mdio-mux at address 18 [ 18.176014] mdio_bus stmmac-0: scan phy mdio-mux at address 19 [ 18.176045] mdio_bus stmmac-0: scan phy mdio-mux at address 20 [ 18.176076] mdio_bus stmmac-0: scan phy mdio-mux at address 21 [ 18.176107] mdio_bus stmmac-0: scan phy mdio-mux at address 22 [ 18.176139] mdio_bus stmmac-0: scan phy mdio-mux at address 23 [ 18.176170] mdio_bus stmmac-0: scan phy mdio-mux at address 24 [ 18.176202] mdio_bus stmmac-0: scan phy mdio-mux at address 25 [ 18.176233] mdio_bus stmmac-0: scan phy mdio-mux at address 26 [ 18.176271] mdio_bus stmmac-0: scan phy mdio-mux at address 27 [ 18.176320] mdio_bus stmmac-0: scan phy mdio-mux at address 28 [ 18.176371] mdio_bus stmmac-0: scan phy mdio-mux at address 29 [ 18.176420] mdio_bus stmmac-0: scan phy mdio-mux at address 30 [ 18.176452] mdio_bus stmmac-0: scan phy mdio-mux at address 31 Adding a fake <reg> to mdio-mux remove it. Does it is acceptable ? or perhaps patching of_mdiobus_register() to not scan node with compatible "mdio-mux". > > > > > > + mdio-mux { > > > > + compatible = "mdio-mux"; > > > > + #address-cells = <1>; > > > > + #size-cells = <0>; > > > > + > > > > + int_mdio: mdio@1 { > > > > + reg = <0>; > > unit address of 1 and reg prop of 0 don't match. Build your dtb with > W=2. > reg are arbitrary value (like mdio-mux-mmioreg), but in our case it is easy to fix this warning. Thanks -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Thu, Sep 14, 2017 at 09:19:49PM +0200, Andrew Lunn wrote: > > > Is the MDIO controller "allwinner,sun8i-h3-emac" or "snps,dwmac-mdio"? > > > If the latter, then I think the node is fine, but then the mux should be > > > a child node of it. IOW, the child of an MDIO controller should either > > > be a mux node or slave devices. > > Hi Rob > > Up until now, children of an MDIO bus have been MDIO devices. Those > MDIO devices are either Ethernet PHYs, Ethernet Switches, or the > oddball devices that Broadcom iProc has, like generic PHYs. > > We have never had MDIO-muxes as MDIO children. A Mux is not an MDIO > device, and does not have the properties of an MDIO device. It is not > addressable on the MDIO bus. The current MUXes are addressed via GPIOs > or MMIO. > > There other similar cases. i2c-mux-gpio is not a child of an i2c bus, > nor i2c-mux-reg or gpio-mux. nxp,pca9548 is however a child of the i2c > bus, because it is an i2c device itself... > > If the MDIO mux was an MDIO device, i would agree with you. Bit it is > not, so lets not make it a child. > > Andrew Hello Rob, could you anwser/confirm please. I wait on this for sending the next version. Thanks Regards Corentin Labbe -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
On Thu, Sep 14, 2017 at 2:19 PM, Andrew Lunn <andrew@lunn.ch> wrote: >> > Is the MDIO controller "allwinner,sun8i-h3-emac" or "snps,dwmac-mdio"? >> > If the latter, then I think the node is fine, but then the mux should be >> > a child node of it. IOW, the child of an MDIO controller should either >> > be a mux node or slave devices. > > Hi Rob > > Up until now, children of an MDIO bus have been MDIO devices. Those > MDIO devices are either Ethernet PHYs, Ethernet Switches, or the > oddball devices that Broadcom iProc has, like generic PHYs. > > We have never had MDIO-muxes as MDIO children. A Mux is not an MDIO > device, and does not have the properties of an MDIO device. It is not > addressable on the MDIO bus. The current MUXes are addressed via GPIOs > or MMIO. The DT parent/child relationship defines the bus topology. We describe MDIO buses in that way and if a mux is sitting between the controller and the devices, then the DT hierarchy should reflect that. Now sometimes we have 2 options for what interface has the parent/child relationship (e.g. an I2C controlled USB hub chip), but in this case we don't. > There other similar cases. i2c-mux-gpio is not a child of an i2c bus, > nor i2c-mux-reg or gpio-mux. nxp,pca9548 is however a child of the i2c > bus, because it is an i2c device itself... Some are i2c controlled mux devices, but some can be GPIO controlled. > > If the MDIO mux was an MDIO device, i would agree with you. Bit it is > not, so lets not make it a child. > > Andrew > > _______________________________________________ > linux-arm-kernel mailing list > linux-arm-kernel@lists.infradead.org > http://lists.infradead.org/mailman/listinfo/linux-arm-kernel -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html
Hello The current way to find if the PHY is internal is to compare DT phy-mode and emac_variant/internal_phy. But it will negate a possible future SoC where an external PHY use the same phy mode than the integrated one. This patchs series adds a new way to find if the PHY is integrated, via the phy-is-integrated DT property. Since it exists both integrated and external ethernet-phy@1, they are merged in the final DTB and so share all properties. For avoiding this, and better represent the reality, we use a MDIO mux. The first try was to create a new MDIO mux "mdio-mux-syscon". mdio-mux-syscon working the same way than mdio-mux-mmioreg with the exception that the register is used via syscon/regmap. But this solution does not work for two reason: - changing the MDIO selection need the reset of MAC which cannot be done by the mdio-mux-syscon driver - There were driver loading order problem: - mdio-mux-syscon needing that stmmac register the parent MDIO - stmmac needing that child MDIO was registered just after registering parent MDIO So we cannot use any external MDIO-mux. The final solution was to represent a mdio-mux and let the MAC handle all things. Note that phy-is-integrated is still needed (even if we use a MDIO mux) since some properties apply only on integrated PHY and we need to know the final MDIO bus in mdio_mux_syscon_switch_fn(). Since DT bits was reverted in 4.13, this patch series include the revert of the revert. So - the first four patchs bring back DT/stmmac stuff that was in 4.13 (and reverted) - fifth patch document how DT MDIO mux is implemented - patch 6 and 7 modify DT - patch 8, 9, 10 Modify stmmac according to the new bindings I have let patch splited for easy review. (for seeing what's new) But the final serie could have some patch squashed if someone want. Like squashing patch and 2 and 5 (documentation) Since DT worked well in 4.13, could it be targeted for 4.14 ? If necessary I could split this serie in two: - bring back A64/A83T (patchs 1, 2, 4, 7, 9) - add MXIO-mux and H3 (patchs 3, 4, 5, 6, 8, 10) Regards Changes since v4: - Update documentation for new bindings - Added 4 patchs for bring back reverted stuff of 4.13 - dwmac-sun8i now handle mdio-mux - MDIO use now compatible = "snps,dwmac-mdio"; Changes since v3: - Added a patch for handling fixed-link - Updated documentation Changes since v2: - Add a MDIO mux for creating distinction between integrated and external MDIO. - phy-is-integrated is not set in dtsi. Changes since v1: - Dropped phy-is-integrated documentation patch since another same patch was already merged - Moved phy-is-integrated from SoC dtsi to final board DT. Corentin Labbe (10): arm64: dts: allwinner: Restore EMAC changes dt-bindings: net: Restore sun8i dwmac binding arm: dts: sunxi: Restore EMAC changes net: stmmac: sun8i: Restore the compatibles dt-bindings: net: dwmac-sun8i: update documentation about integrated PHY ARM: dts: sunxi: h3/h5: represent the mdio switch used by sun8i-h3-emac arm64: dts: allwinner: add snps,dwmac-mdio compatible to emac/mdio net: stmmac: dwmac-sun8i: choose internal PHY via phy-is-integrated net: stmmac: snps,dwmac-mdio MDIOs are automatically registered net: stmmac: dwmac-sun8i: Handle integrated/external MDIOs .../devicetree/bindings/net/dwmac-sun8i.txt | 197 +++++++++++++++++++++ arch/arm/boot/dts/sun8i-h2-plus-orangepi-zero.dts | 9 + arch/arm/boot/dts/sun8i-h3-bananapi-m2-plus.dts | 19 ++ arch/arm/boot/dts/sun8i-h3-nanopi-neo.dts | 7 + arch/arm/boot/dts/sun8i-h3-orangepi-2.dts | 8 + arch/arm/boot/dts/sun8i-h3-orangepi-one.dts | 8 + arch/arm/boot/dts/sun8i-h3-orangepi-pc-plus.dts | 5 + arch/arm/boot/dts/sun8i-h3-orangepi-pc.dts | 8 + arch/arm/boot/dts/sun8i-h3-orangepi-plus.dts | 22 +++ arch/arm/boot/dts/sun8i-h3-orangepi-plus2e.dts | 16 ++ arch/arm/boot/dts/sunxi-h3-h5.dtsi | 46 +++++ .../boot/dts/allwinner/sun50i-a64-bananapi-m64.dts | 16 ++ .../boot/dts/allwinner/sun50i-a64-pine64-plus.dts | 15 ++ .../arm64/boot/dts/allwinner/sun50i-a64-pine64.dts | 17 ++ .../dts/allwinner/sun50i-a64-sopine-baseboard.dts | 16 ++ arch/arm64/boot/dts/allwinner/sun50i-a64.dtsi | 21 +++ .../boot/dts/allwinner/sun50i-h5-nanopi-neo2.dts | 17 ++ .../boot/dts/allwinner/sun50i-h5-orangepi-pc2.dts | 17 ++ .../dts/allwinner/sun50i-h5-orangepi-prime.dts | 17 ++ drivers/net/ethernet/stmicro/stmmac/Kconfig | 1 + drivers/net/ethernet/stmicro/stmmac/dwmac-sun8i.c | 140 ++++++++++++--- .../net/ethernet/stmicro/stmmac/stmmac_platform.c | 4 - 22 files changed, 601 insertions(+), 25 deletions(-) create mode 100644 Documentation/devicetree/bindings/net/dwmac-sun8i.txt -- 2.13.5 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html