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[v2,0/9] ARM: dts: aspeed: Device tree updates

Message ID 20171004064917.2498-1-joel@jms.id.au
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Series ARM: dts: aspeed: Device tree updates | expand

Message

Joel Stanley Oct. 4, 2017, 6:49 a.m. UTC 
This series adds support for the i2c buses and vuart in the ASPEED device
trees, as well as making a few cleanups.

v2 fixes issues pointed out by Andrew's reivew, and adds Brendan's acks. Thanks
for the review both of you!

There's one more patch than v1 to seperate out fixing the UARTs from changing
their oder. I also used --diff-algorithm=patience for a nicer diff in patch 1.

I will merge these into my Aspeed devicetree tree once they have some acks.

I have a second series ready to go as soon as our clk driver is merged.

Cheers,

Joel

Andrew Jeffery (1):
  ARM: dts: aspeed: Move pinctrl subnodes to improve readability

Joel Stanley (8):
  ARM: dts: aspeed: Reorder ADC node
  ARM: dts: aspeed: Add I2C buses
  ARM: dts: aspeed-romulus: Add I2C devices
  ARM: dts: aspeed-palmetto: Add I2C devices
  ARM: dts: aspeed-ast2500: Add I2C devices
  ARM: dts: aspeed: Add aliases for UARTs
  ARM: dts: aspeed: Correctly order UART nodes
  ARM: dts: aspeed: Clean up UART nodes

 arch/arm/boot/dts/aspeed-ast2500-evb.dts      |   19 +
 arch/arm/boot/dts/aspeed-bmc-opp-palmetto.dts |   52 +-
 arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts  |   54 +
 arch/arm/boot/dts/aspeed-g4.dtsi              | 1812 +++++++++++++----------
 arch/arm/boot/dts/aspeed-g5.dtsi              | 1951 ++++++++++++++-----------
 5 files changed, 2265 insertions(+), 1623 deletions(-)

-- 
2.14.1

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Comments

Joel Stanley Oct. 4, 2017, 6:52 a.m. UTC | #1 
On Wed, Oct 4, 2017 at 4:19 PM, Joel Stanley <joel@jms.id.au> wrote:

> diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi

> index 61cc2d25143a..cef51dcc1002 100644

> --- a/arch/arm/boot/dts/aspeed-g5.dtsi

> +++ b/arch/arm/boot/dts/aspeed-g5.dtsi


> @@ -297,9 +297,9 @@

>                                 };

>                         };

>

> -                       uart6: serial@1e787000 {

> -                               compatible = "ns16550a";

> -                               reg = <0x1e787000 0x1000>;

> +                       vuart: vuart@1e787000 {


Doh. I'll fix this up when I apply, assuming I don't need to send a v3.


> +                               compatible = "aspeed,ast2500-vuart";

> +                               reg = <0x1e787000 0x40>;

>                                 reg-shift = <2>;

>                                 interrupts = <10>;

>                                 clocks = <&clk_uart>;

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Andrew Jeffery Oct. 4, 2017, 11:35 p.m. UTC | #2 
On Wed, 2017-10-04 at 17:19 +1030, Joel Stanley wrote:
> Enable the buses that are in use and the devices that are attached.

> Currently that is just the battery backed RTC.

> 

> Some of these buses are for hotplugged cards, such as PCIe cards. Others

> do not yet have upstream drivers, so there are no devices attached.

> 

> Reviewed-by: Brendan Higgins <brendanhiggins@google.com>

> Signed-off-by: Joel Stanley <joel@jms.id.au>


Reviewed-by: Andrew Jeffery <andrew@aj.id.au>


> ---

> v2:

>  - Use okay not enabled for the status

> ---

>  arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts | 54 ++++++++++++++++++++++++++++

>  1 file changed, 54 insertions(+)

> 

> diff --git a/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts b/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts

> index 1190fec1b5d0..8b96baf7c4de 100644

> --- a/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts

> +++ b/arch/arm/boot/dts/aspeed-bmc-opp-romulus.dts

> @@ -79,3 +79,57 @@

>  	pinctrl-names = "default";

>  	pinctrl-0 = <&pinctrl_rmii1_default>;

>  };

> +

> +&i2c2 {

> +	status = "okay";

> +};

> +

> +&i2c3 {

> +	status = "okay";

> +};

> +

> +&i2c4 {

> +	status = "okay";

> +};

> +

> +&i2c5 {

> +	status = "okay";

> +};

> +

> +&i2c6 {

> +	/* PCIe slot 1 (x8) */

> +	status = "okay";

> +};

> +

> +&i2c7 {

> +	/* PCIe slot 2 (x16) */

> +	status = "okay";

> +};

> +

> +&i2c8 {

> +	/* PCIe slot 3 (x16) */

> +	status = "okay";

> +};

> +

> +&i2c9 {

> +	/* PCIe slot 4 (x16) */

> +	status = "okay";

> +};

> +

> +&i2c10 {

> +	/* PCIe slot 5 (x8) */

> +	status = "okay";

> +};

> +

> +&i2c11 {

> +	status = "okay";

> +

> +	rtc@32 {

> +		compatible = "epson,rx8900";

> +		reg = <0x32>;

> +	};

> +};

> +

> +&i2c12 {

> +	status = "okay";

> +};
Andrew Jeffery Oct. 4, 2017, 11:39 p.m. UTC | #3 
On Wed, 2017-10-04 at 16:22 +0930, Joel Stanley wrote:
> > On Wed, Oct 4, 2017 at 4:19 PM, Joel Stanley <joel@jms.id.au> wrote:
> 
> > diff --git a/arch/arm/boot/dts/aspeed-g5.dtsi b/arch/arm/boot/dts/aspeed-g5.dtsi
> > index 61cc2d25143a..cef51dcc1002 100644
> > --- a/arch/arm/boot/dts/aspeed-g5.dtsi
> > +++ b/arch/arm/boot/dts/aspeed-g5.dtsi
> > @@ -297,9 +297,9 @@
> >                                 };
> >                         };
> > 
> > -                       uart6: serial@1e787000 {
> > -                               compatible = "ns16550a";
> > -                               reg = <0x1e787000 0x1000>;
> > +                       vuart: vuart@1e787000 {
> 
> Doh. I'll fix this up when I apply, assuming I don't need to send a v3.

In that case:

Reviewed-by: Andrew Jeffery <andrew@aj.id.au>

> 
> 
> > +                               compatible = "aspeed,ast2500-vuart";
> > +                               reg = <0x1e787000 0x40>;
> >                                 reg-shift = <2>;
> >                                 interrupts = <10>;
> >                                 clocks = <&clk_uart>;