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[174.21.6.47]) by smtp.gmail.com with ESMTPSA id y129sm8850354pgb.27.2018.02.11.12.58.49 (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Sun, 11 Feb 2018 12:58:49 -0800 (PST) From: Richard Henderson To: qemu-devel@nongnu.org Date: Sun, 11 Feb 2018 12:58:41 -0800 Message-Id: <20180211205848.4568-1-richard.henderson@linaro.org> X-Mailer: git-send-email 2.14.3 X-detected-operating-system: by eggs.gnu.org: Genre and OS details not recognized. X-Received-From: 2607:f8b0:400e:c05::242 Subject: [Qemu-devel] [PATCH v2 0/7] target/arm: More SVE prep work X-BeenThere: qemu-devel@nongnu.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: peter.maydell@linaro.org, qemu-arm@nongnu.org Errors-To: qemu-devel-bounces+patch=linaro.org@nongnu.org Sender: "Qemu-devel" Changes for v2: Include signal frames and PR_SVE_SET/GET_VL. Blurb for v1: First, we had noted that ARM_CP_64BIT needed to be removed from the ZCR_EL registers, but the patch set was applied without actually fixing that. Second, there's an existing bug by which the FPCR/FPSR registers are not properly trapped when FP is disabled. Fix that with a translation-time check. Third, my attempt at using .accessfn for ZCR_EL fails to take into account the two different exception syndromes that must be raised. Although they probably aren't as important as FPCR/FPSR, handle them at translation time too. Fourth, when writing to an AdvSIMD register, zero the rest of the SVE register. r~ Richard Henderson (7): target/arm: Remove ARM_CP_64BIT from ZCR_EL registers target/arm: Enforce FP access to FPCR/FPSR target/arm: Suppress TB end for FPCR/FPSR target/arm: Enforce access to ZCR_EL at translation target/arm: Handle SVE registers when using clear_vec_high linux-user: Support SVE in aarch64 signal frames linux-user: Implement aarch64 PR_SVE_SET/GET_VL target/arm/cpu.h | 38 ++--- target/arm/internals.h | 6 + linux-user/signal.c | 348 ++++++++++++++++++++++++++++++++++++--------- linux-user/syscall.c | 20 +++ target/arm/cpu64.c | 61 ++++++++ target/arm/helper.c | 28 ++-- target/arm/translate-a64.c | 181 +++++++++++------------ 7 files changed, 480 insertions(+), 202 deletions(-) -- 2.14.3