mbox series

[0/5] RFC: Mezzanine handling for 96boards

Message ID 20180618074556.6944-1-linus.walleij@linaro.org
Headers show
Series RFC: Mezzanine handling for 96boards | expand

Message

Linus Walleij June 18, 2018, 7:45 a.m. UTC
This is a proposal for how to handle the non-discoverable
96boards plug-in expansion boards called "mezzanines" in the
Linux kernel. It is a working RFC series meant for discussion
at the moment.

The RFC was done on the brand new Ultra96 board from Xilinx
with a Secure96 mezzanine expansion board. The main part
is in patch 4, the rest is enabling and examples.

The code can be obtained from here:
https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator.git/log/?h=ultra96

You can for example probably augment the DTS file for any
upstream-supported 96board and get the Secure96 going with
it with minor efforts.

TODO:

- Proper device tree bindings for the connector, for now
  look at the example.

- Discuss whether to actually do this or just take it all and
  flush it down the drain because the community doesn't like
  it. I'm not one of those especially infatuated with my own code,
  I always stay by the old programming project management mantra
  to calculate to make one version and throw it away as stepping
  stone to a good final design.

- Placement: putting this in drivers/bus is just an example.
  drivers/platform/96boards-mezzanines is fine too, maybe better?

- I am especially curious about input from Andy and Mika from
  the Intel/ACPI camp on what they have seen for non-discoverable
  plug-in boards. Does this problem even exist in the Intel
  world, or not...

Background:

- These boards connect on a custom connector on this family
  of boards. The relationship is many-to-many with the connector
  as nexus. The electronic standard for the connector is specified:
  https://github.com/96boards/documentation/blob/master/Specifications/96Boards-CE-Specification.pdf
  Example mezzanines:
  https://www.96boards.org/documentation/mezzanine/

- These boards have siblings on other platforms, the problem
  scope is similar with BeagleBone "capes":
  https://beagleboard.org/capes
  Raspberry Pi expansion boards:
  https://www.abelectronics.co.uk/products/18/raspberry-pi-expansion-boards
  Intel Edison, Galileo, Joule also have expansion boards.

Idea: add a driver for the connector itself and tie it in to
the device tree with a compatible string. Since the boards
are non-discoverable two mechanisms are provided to discover
them:

- Add a very simple device tree node with just a compatible
  string for the board in the node. This will be simple to
  add from e.g. a boot loader or as an overlay from userspace.

  board {
        compatible = "96boards,secure96";
  };


- Echo 1 > boardname into a sysfs file to populate the
  board and echo 0 > boardname to depopulate it. This
  makes it easy to even switch out expansion boards at
  runtime, if allowed by the electronics.

  > cd /sys/devices/platform/connector

  > echo 1 > secure96

  lscon connector: called mezzanine_store on secure96
  lscon connector: populate secure96
  at24 1-0050: 2048 byte 24c128 EEPROM, writable, 128 bytes/write
  atmel-ecc 1-0060: configuration zone is unlocked
  tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x1B, rev-id 16)
  (...)

What this patch set does not do:

- It does not use device tree or ACPI DSDT or any other
  hardware decription language to model the contents of the
  board per se. Instead the boards buses are populated
  directly with platform devices.

Predictable complaints about this design:

Q: This is not device tree overlays. Why is it not device
   tree overlays?

A1: Right tool for the job, overlays are complex and the
    plan to get it in place seems to be spanning years, this
    is a few devices on simple busses and it works today.
    Using this approach I can already work on shaping up
    drivers for the mezzanine board devices as proved by:
    https://marc.info/?l=linux-crypto-vger&m=152820660120590&w=2
    https://marc.info/?l=linux-crypto-vger&m=152820662820595&w=2
    (...)

    I can work on drivers for the chips on the
    Secure96 mezzanine board. It's just an example of
    what the mezzanine community can do.
    Now they are hacking around in userspace instead of
    doing/reusing kernel drivers for their stuff:
    https://github.com/jbech-linaro/secure96

    This way we can bring developers for these components
    into the kernel community instead of telling them to
    wait for some big infrastructure that comes later
    before they can contribute their stuff.

A2: Overlays does not solve the problem if the system runs
    ACPI, and what about if the same connector[s] appear
    on a server board, servers use ACPI. Also notice
    that Intel have development boards with non-discoverable
    expansion boards as well. They just will not use
    device tree.

A3: Overlays is Big Upfront Design.
    https://en.wikipedia.org/wiki/Big_Design_Up_Front
    This way of designing things is associated with the
    (pejorative term) "waterfall model" which is out of
    fashion as a way of doing development. I think I am not
    the only one slightly annoyed by the fact that device
    tree overlays is now starting to look like a very
    big very upfront design. It's just not possible to get
    something up and running in small iterative steps with
    device tree overlays. Instead huge efforts are
    required and it involves major possible showstoppers
    and uncertain outcome as indicated by Frank's TODO:
    https://elinux.org/Frank's_Evolving_Overlay_Thoughts

    This appears also in our work process documents:
    Documentation/process/4.Coding.rst
    "experience has shown that excessive or premature
     abstraction can be just as harmful as premature
     optimization.  Abstraction should be used to the level
     required and no further."

So for that reason, or other predictable statements such
as "you're reinventing board files", I'd like to have an
open discussion on how to actually support these boards
with the mainline kernel and work on device drivers common
with other systems now, and not in 2020 when they are already
obsolete.

Yeah it is a bit controversial, but what we are doing right
now for non-discoverable expansion boards isn't working
in my opinion, so I have to throw something out there,
and this is it.

Linus Walleij (5):
  RFC: gpio: Add API to explicitly name a consumer
  RFC: eeprom: at24: Allow passing gpiodesc from pdata
  RFC: spi: Make of_find_spi_device_by_node() available
  RFC: bus: 96boards Low-Speed Connector
  RFC: ARM64: dts: Add Low-Speed Connector to ZCU100

 .../boot/dts/xilinx/zynqmp-zcu100-revC.dts    |  27 +-
 .../96boards-ls-connector.c                   | 307 ++++++++++++++++++
 .../96boards-mezzanines/96boards-mezzanines.h |  46 +++
 .../96boards-mezzanines/96boards-secure96.c   | 249 ++++++++++++++
 drivers/bus/96boards-mezzanines/Kconfig       |  36 ++
 drivers/bus/96boards-mezzanines/Makefile      |   6 +
 drivers/bus/Kconfig                           |   2 +
 drivers/bus/Makefile                          |   4 +-
 drivers/gpio/gpiolib.c                        |  13 +
 drivers/misc/eeprom/at24.c                    |   6 +-
 drivers/spi/spi.c                             |  33 +-
 include/linux/gpio/consumer.h                 |   7 +
 include/linux/platform_data/at24.h            |   2 +
 include/linux/spi/spi.h                       |   4 +
 14 files changed, 723 insertions(+), 19 deletions(-)
 create mode 100644 drivers/bus/96boards-mezzanines/96boards-ls-connector.c
 create mode 100644 drivers/bus/96boards-mezzanines/96boards-mezzanines.h
 create mode 100644 drivers/bus/96boards-mezzanines/96boards-secure96.c
 create mode 100644 drivers/bus/96boards-mezzanines/Kconfig
 create mode 100644 drivers/bus/96boards-mezzanines/Makefile

-- 
2.17.0

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Comments

Arnd Bergmann June 18, 2018, 12:21 p.m. UTC | #1
On Mon, Jun 18, 2018 at 9:45 AM, Linus Walleij <linus.walleij@linaro.org> wrote:
> This is a proposal for how to handle the non-discoverable

> 96boards plug-in expansion boards called "mezzanines" in the

> Linux kernel. It is a working RFC series meant for discussion

> at the moment.

>

> The RFC was done on the brand new Ultra96 board from Xilinx

> with a Secure96 mezzanine expansion board. The main part

> is in patch 4, the rest is enabling and examples.

>

> The code can be obtained from here:

> https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator.git/log/?h=ultra96

>

> You can for example probably augment the DTS file for any

> upstream-supported 96board and get the Secure96 going with

> it with minor efforts.


Hi Linus,

Thanks for your work on solving this long-standing problem. I've just
read through your patches briefly and have a few thoughts:

- I really like the idea of having C code deal with the mezzanine
  connector itself, acting as an intermediate to tie a number of
  boards to a number of add-on cards, this seems much simpler than
  trying to do everything with overlays or one of the other more
  generic mechanisms.

- I don't like the idea of having the bus driver contain a list of possible
  add-ons, this seems to go against our usual driver model. What
  I think we want instead is to make the connector itself a proper
  bus_type, to allow drivers to register against it as loadable modules,
  and devices (maybe limited to one device) being created as probed
  from DT or some other method as you describe.

- You export symbols in the mezzanine_* namespace, which I think
   is a bit too generic and should perhaps contain something related
   to  96boards in its name to make it less ambiguous. I suspect we
   would add a number of further connectors for hats, capes, lures etc,
   which could all be described as mezzanines. One open question
   is how we structure the commonality between the various
   connectors, but we can defer that until we have more than one
   or two of them.

          Arnd
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Ard Biesheuvel June 18, 2018, 1:22 p.m. UTC | #2
On 18 June 2018 at 14:21, Arnd Bergmann <arnd@arndb.de> wrote:
> On Mon, Jun 18, 2018 at 9:45 AM, Linus Walleij <linus.walleij@linaro.org> wrote:

>> This is a proposal for how to handle the non-discoverable

>> 96boards plug-in expansion boards called "mezzanines" in the

>> Linux kernel. It is a working RFC series meant for discussion

>> at the moment.

>>

>> The RFC was done on the brand new Ultra96 board from Xilinx

>> with a Secure96 mezzanine expansion board. The main part

>> is in patch 4, the rest is enabling and examples.

>>

>> The code can be obtained from here:

>> https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator.git/log/?h=ultra96

>>

>> You can for example probably augment the DTS file for any

>> upstream-supported 96board and get the Secure96 going with

>> it with minor efforts.

>

> Hi Linus,

>

> Thanks for your work on solving this long-standing problem. I've just

> read through your patches briefly and have a few thoughts:

>

> - I really like the idea of having C code deal with the mezzanine

>   connector itself, acting as an intermediate to tie a number of

>   boards to a number of add-on cards, this seems much simpler than

>   trying to do everything with overlays or one of the other more

>   generic mechanisms.

>

> - I don't like the idea of having the bus driver contain a list of possible

>   add-ons, this seems to go against our usual driver model. What

>   I think we want instead is to make the connector itself a proper

>   bus_type, to allow drivers to register against it as loadable modules,

>   and devices (maybe limited to one device) being created as probed

>   from DT or some other method as you describe.

>

> - You export symbols in the mezzanine_* namespace, which I think

>    is a bit too generic and should perhaps contain something related

>    to  96boards in its name to make it less ambiguous. I suspect we

>    would add a number of further connectors for hats, capes, lures etc,

>    which could all be described as mezzanines. One open question

>    is how we structure the commonality between the various

>    connectors, but we can defer that until we have more than one

>    or two of them.

>


Hello all,

We should also consider firmware use of the mezzanines. For instance,
the Secure96 has a RNG which UEFI may want to use so the early boot
code can access is for KASLR. It also has a TPM, which should not be
reset/reinitialized/etc by the OS if we want to make meaningful use of
it.

Also, given that we can (and do) already describe topologies involving
mezzanines by ignoring the connector altogether (which is not entirely
unreasonable given the fact that we [as Linaro/96boards] dropped the
ball on this one and did not mandate discoverability for mezzanines).
So ideally, DTs can be expressed such that older kernels can still use
those peripherals.
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Arnd Bergmann June 18, 2018, 2:15 p.m. UTC | #3
On Mon, Jun 18, 2018 at 3:22 PM, Ard Biesheuvel
<ard.biesheuvel@linaro.org> wrote:
> On 18 June 2018 at 14:21, Arnd Bergmann <arnd@arndb.de> wrote:

>> On Mon, Jun 18, 2018 at 9:45 AM, Linus Walleij <linus.walleij@linaro.org> wrote:

>

> Also, given that we can (and do) already describe topologies involving

> mezzanines by ignoring the connector altogether (which is not entirely

> unreasonable given the fact that we [as Linaro/96boards] dropped the

> ball on this one and did not mandate discoverability for mezzanines).

> So ideally, DTs can be expressed such that older kernels can still use

> those peripherals.


Not sure. Modeling the connector as a device with its own driver does
seem like a significant advantage, which to me weighs more than backward
compatibility with old kernels. We can clearly always describe the devices
behind the connector individually and ignore the connector on old kernels
and we should still allow running DT files that work with the old kernels
on new kernels, but I don't see running new DT files on old kernels as
essential in this case. Many platforms don't actually care about that case
at all today (but some do of course).

      Arnd
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Daniel Thompson June 19, 2018, 11:10 a.m. UTC | #4
On Mon, Jun 18, 2018 at 09:45:51AM +0200, Linus Walleij wrote:
> This is a proposal for how to handle the non-discoverable

> 96boards plug-in expansion boards called "mezzanines" in the

> Linux kernel. It is a working RFC series meant for discussion

> at the moment.

> 

> The RFC was done on the brand new Ultra96 board from Xilinx

> with a Secure96 mezzanine expansion board. The main part

> is in patch 4, the rest is enabling and examples.

> 

> The code can be obtained from here:

> https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator.git/log/?h=ultra96

> 

> You can for example probably augment the DTS file for any

> upstream-supported 96board and get the Secure96 going with

> it with minor efforts.


Like other commenters I'm rather like using C to solve this, and your
comments Big Upfront Design are good backup in term of convincing me.

 
> TODO:

> 

> - Proper device tree bindings for the connector, for now

>   look at the example.

> 

> - Discuss whether to actually do this or just take it all and

>   flush it down the drain because the community doesn't like

>   it. I'm not one of those especially infatuated with my own code,

>   I always stay by the old programming project management mantra

>   to calculate to make one version and throw it away as stepping

>   stone to a good final design.

> 

> - Placement: putting this in drivers/bus is just an example.

>   drivers/platform/96boards-mezzanines is fine too, maybe better?

> 

> - I am especially curious about input from Andy and Mika from

>   the Intel/ACPI camp on what they have seen for non-discoverable

>   plug-in boards. Does this problem even exist in the Intel

>   world, or not...


I'm also interested in the "what about ACPI" question?

Using C makes describing a board in ACPI fairly easy. AFAICT allocating
IDs to a board rather than its included components is fairly natural for
ACPI.

However I'm too ignorant to be able to figure out if the expansion
connector itself could/should be described in the tables (e.g. if
connector is a bus and the board is[1] a device, could the bus driver
be instantiated in a reasonable way).


Daniel.


[1] ... or becomes a device, based on feedback in this thread ;-)
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Mark Brown June 19, 2018, 11:56 a.m. UTC | #5
On Tue, Jun 19, 2018 at 12:10:18PM +0100, Daniel Thompson wrote:
> On Mon, Jun 18, 2018 at 09:45:51AM +0200, Linus Walleij wrote:


> > - I am especially curious about input from Andy and Mika from

> >   the Intel/ACPI camp on what they have seen for non-discoverable

> >   plug-in boards. Does this problem even exist in the Intel

> >   world, or not...


> I'm also interested in the "what about ACPI" question?


> Using C makes describing a board in ACPI fairly easy. AFAICT allocating

> IDs to a board rather than its included components is fairly natural for

> ACPI.


Yes, they have this problem - they have plug in modules on for example
the minnowboard and some of their other reference platforms.  They have
overlays working for ACPI, these have their own problems in that they
don't appear to have the equivalent of DMI data (at least the patches
people are sending indicates that they don't) which is unfortuate as the
idiomatic thing for ACPI is as you say to key huge chunks of data of
quirk tables based on the DMI information for their boards.

They don't to my knowledge have generic connectors or anything like
that, it's just patches to the base ACPI.
Ard Biesheuvel June 19, 2018, 3:25 p.m. UTC | #6
On 19 June 2018 at 17:14, Yang Zhang <yang.zhang@96boards.org> wrote:
>

>

> On 18 June 2018 at 14:22, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:

>>

>> On 18 June 2018 at 14:21, Arnd Bergmann <arnd@arndb.de> wrote:

>> > On Mon, Jun 18, 2018 at 9:45 AM, Linus Walleij

>> > <linus.walleij@linaro.org> wrote:

>> >> This is a proposal for how to handle the non-discoverable

>> >> 96boards plug-in expansion boards called "mezzanines" in the

>> >> Linux kernel. It is a working RFC series meant for discussion

>> >> at the moment.

>> >>

>> >> The RFC was done on the brand new Ultra96 board from Xilinx

>> >> with a Secure96 mezzanine expansion board. The main part

>> >> is in patch 4, the rest is enabling and examples.

>> >>

>> >> The code can be obtained from here:

>> >>

>> >> https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator.git/log/?h=ultra96

>> >>

>> >> You can for example probably augment the DTS file for any

>> >> upstream-supported 96board and get the Secure96 going with

>> >> it with minor efforts.

>> >

>> > Hi Linus,

>> >

>> > Thanks for your work on solving this long-standing problem. I've just

>> > read through your patches briefly and have a few thoughts:

>> >

>> > - I really like the idea of having C code deal with the mezzanine

>> >   connector itself, acting as an intermediate to tie a number of

>> >   boards to a number of add-on cards, this seems much simpler than

>> >   trying to do everything with overlays or one of the other more

>> >   generic mechanisms.

>> >

>> > - I don't like the idea of having the bus driver contain a list of

>> > possible

>> >   add-ons, this seems to go against our usual driver model. What

>> >   I think we want instead is to make the connector itself a proper

>> >   bus_type, to allow drivers to register against it as loadable modules,

>> >   and devices (maybe limited to one device) being created as probed

>> >   from DT or some other method as you describe.

>> >

>> > - You export symbols in the mezzanine_* namespace, which I think

>> >    is a bit too generic and should perhaps contain something related

>> >    to  96boards in its name to make it less ambiguous. I suspect we

>> >    would add a number of further connectors for hats, capes, lures etc,

>> >    which could all be described as mezzanines. One open question

>> >    is how we structure the commonality between the various

>> >    connectors, but we can defer that until we have more than one

>> >    or two of them.

>> >

>>

>> Hello all,

>>

>> We should also consider firmware use of the mezzanines. For instance,

>> the Secure96 has a RNG which UEFI may want to use so the early boot

>> code can access is for KASLR. It also has a TPM, which should not be

>> reset/reinitialized/etc by the OS if we want to make meaningful use of

>> it.

>>

>> Also, given that we can (and do) already describe topologies involving

>> mezzanines by ignoring the connector altogether (which is not entirely

>> unreasonable given the fact that we [as Linaro/96boards] dropped the

>> ball on this one and did not mandate discoverability for mezzanines).

>

>

> The design guideline has been reviewed by many inside/outside linaro through

> the mezzanine@lists.96boards.org and 96b-spec-sig

> <96b-spec-sig@96boards.org> published as recommended/strongly recommended

> item from day one. 'dropping the ball' is a strong conclusion.

>


Apologies for using a term that you seem to take issue with. Are you
saying the spec currently recommends it?
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Ard Biesheuvel June 19, 2018, 3:30 p.m. UTC | #7
On 19 June 2018 at 17:26, Yang Zhang <yang.zhang@96boards.org> wrote:
> Yes.

>

> https://github.com/96boards/documentation/blob/master/mezzanine/files/mezzanine-design-guidelines.pdf

>

> Under Configuration data section

>


OK, fair enough. Do any such mezzanines exist yet? Should we offer
more guidance on how exactly this discovery should be implemented?

> On 19 June 2018 at 16:25, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:

>>

>> On 19 June 2018 at 17:14, Yang Zhang <yang.zhang@96boards.org> wrote:

>> >

>> >

>> > On 18 June 2018 at 14:22, Ard Biesheuvel <ard.biesheuvel@linaro.org>

>> > wrote:

>> >>

>> >> On 18 June 2018 at 14:21, Arnd Bergmann <arnd@arndb.de> wrote:

>> >> > On Mon, Jun 18, 2018 at 9:45 AM, Linus Walleij

>> >> > <linus.walleij@linaro.org> wrote:

>> >> >> This is a proposal for how to handle the non-discoverable

>> >> >> 96boards plug-in expansion boards called "mezzanines" in the

>> >> >> Linux kernel. It is a working RFC series meant for discussion

>> >> >> at the moment.

>> >> >>

>> >> >> The RFC was done on the brand new Ultra96 board from Xilinx

>> >> >> with a Secure96 mezzanine expansion board. The main part

>> >> >> is in patch 4, the rest is enabling and examples.

>> >> >>

>> >> >> The code can be obtained from here:

>> >> >>

>> >> >>

>> >> >> https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator.git/log/?h=ultra96

>> >> >>

>> >> >> You can for example probably augment the DTS file for any

>> >> >> upstream-supported 96board and get the Secure96 going with

>> >> >> it with minor efforts.

>> >> >

>> >> > Hi Linus,

>> >> >

>> >> > Thanks for your work on solving this long-standing problem. I've just

>> >> > read through your patches briefly and have a few thoughts:

>> >> >

>> >> > - I really like the idea of having C code deal with the mezzanine

>> >> >   connector itself, acting as an intermediate to tie a number of

>> >> >   boards to a number of add-on cards, this seems much simpler than

>> >> >   trying to do everything with overlays or one of the other more

>> >> >   generic mechanisms.

>> >> >

>> >> > - I don't like the idea of having the bus driver contain a list of

>> >> > possible

>> >> >   add-ons, this seems to go against our usual driver model. What

>> >> >   I think we want instead is to make the connector itself a proper

>> >> >   bus_type, to allow drivers to register against it as loadable

>> >> > modules,

>> >> >   and devices (maybe limited to one device) being created as probed

>> >> >   from DT or some other method as you describe.

>> >> >

>> >> > - You export symbols in the mezzanine_* namespace, which I think

>> >> >    is a bit too generic and should perhaps contain something related

>> >> >    to  96boards in its name to make it less ambiguous. I suspect we

>> >> >    would add a number of further connectors for hats, capes, lures

>> >> > etc,

>> >> >    which could all be described as mezzanines. One open question

>> >> >    is how we structure the commonality between the various

>> >> >    connectors, but we can defer that until we have more than one

>> >> >    or two of them.

>> >> >

>> >>

>> >> Hello all,

>> >>

>> >> We should also consider firmware use of the mezzanines. For instance,

>> >> the Secure96 has a RNG which UEFI may want to use so the early boot

>> >> code can access is for KASLR. It also has a TPM, which should not be

>> >> reset/reinitialized/etc by the OS if we want to make meaningful use of

>> >> it.

>> >>

>> >> Also, given that we can (and do) already describe topologies involving

>> >> mezzanines by ignoring the connector altogether (which is not entirely

>> >> unreasonable given the fact that we [as Linaro/96boards] dropped the

>> >> ball on this one and did not mandate discoverability for mezzanines).

>> >

>> >

>> > The design guideline has been reviewed by many inside/outside linaro

>> > through

>> > the mezzanine@lists.96boards.org and 96b-spec-sig

>> > <96b-spec-sig@96boards.org> published as recommended/strongly

>> > recommended

>> > item from day one. 'dropping the ball' is a strong conclusion.

>> >

>>

>> Apologies for using a term that you seem to take issue with. Are you

>> saying the spec currently recommends it?

>

>

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Rob Herring June 19, 2018, 3:52 p.m. UTC | #8
On Mon, Jun 18, 2018 at 1:45 AM, Linus Walleij <linus.walleij@linaro.org> wrote:
> This is a proposal for how to handle the non-discoverable

> 96boards plug-in expansion boards called "mezzanines" in the

> Linux kernel. It is a working RFC series meant for discussion

> at the moment.

>

> The RFC was done on the brand new Ultra96 board from Xilinx

> with a Secure96 mezzanine expansion board. The main part

> is in patch 4, the rest is enabling and examples.

>

> The code can be obtained from here:

> https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator.git/log/?h=ultra96

>

> You can for example probably augment the DTS file for any

> upstream-supported 96board and get the Secure96 going with

> it with minor efforts.

>

> TODO:

>

> - Proper device tree bindings for the connector, for now

>   look at the example.

>

> - Discuss whether to actually do this or just take it all and

>   flush it down the drain because the community doesn't like

>   it. I'm not one of those especially infatuated with my own code,

>   I always stay by the old programming project management mantra

>   to calculate to make one version and throw it away as stepping

>   stone to a good final design.

>

> - Placement: putting this in drivers/bus is just an example.

>   drivers/platform/96boards-mezzanines is fine too, maybe better?

>

> - I am especially curious about input from Andy and Mika from

>   the Intel/ACPI camp on what they have seen for non-discoverable

>   plug-in boards. Does this problem even exist in the Intel

>   world, or not...

>

> Background:

>

> - These boards connect on a custom connector on this family

>   of boards. The relationship is many-to-many with the connector

>   as nexus. The electronic standard for the connector is specified:

>   https://github.com/96boards/documentation/blob/master/Specifications/96Boards-CE-Specification.pdf

>   Example mezzanines:

>   https://www.96boards.org/documentation/mezzanine/

>

> - These boards have siblings on other platforms, the problem

>   scope is similar with BeagleBone "capes":

>   https://beagleboard.org/capes

>   Raspberry Pi expansion boards:

>   https://www.abelectronics.co.uk/products/18/raspberry-pi-expansion-boards

>   Intel Edison, Galileo, Joule also have expansion boards.

>

> Idea: add a driver for the connector itself and tie it in to

> the device tree with a compatible string. Since the boards

> are non-discoverable two mechanisms are provided to discover

> them:

>

> - Add a very simple device tree node with just a compatible

>   string for the board in the node. This will be simple to

>   add from e.g. a boot loader or as an overlay from userspace.

>

>   board {

>         compatible = "96boards,secure96";

>   };

>

>

> - Echo 1 > boardname into a sysfs file to populate the

>   board and echo 0 > boardname to depopulate it. This

>   makes it easy to even switch out expansion boards at

>   runtime, if allowed by the electronics.

>

>   > cd /sys/devices/platform/connector

>   > echo 1 > secure96

>   lscon connector: called mezzanine_store on secure96

>   lscon connector: populate secure96

>   at24 1-0050: 2048 byte 24c128 EEPROM, writable, 128 bytes/write

>   atmel-ecc 1-0060: configuration zone is unlocked

>   tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x1B, rev-id 16)

>   (...)

>

> What this patch set does not do:

>

> - It does not use device tree or ACPI DSDT or any other

>   hardware decription language to model the contents of the

>   board per se. Instead the boards buses are populated

>   directly with platform devices.

>

> Predictable complaints about this design:

>

> Q: This is not device tree overlays. Why is it not device

>    tree overlays?

>

> A1: Right tool for the job, overlays are complex and the

>     plan to get it in place seems to be spanning years, this

>     is a few devices on simple busses and it works today.

>     Using this approach I can already work on shaping up

>     drivers for the mezzanine board devices as proved by:

>     https://marc.info/?l=linux-crypto-vger&m=152820660120590&w=2

>     https://marc.info/?l=linux-crypto-vger&m=152820662820595&w=2

>     (...)

>

>     I can work on drivers for the chips on the

>     Secure96 mezzanine board. It's just an example of

>     what the mezzanine community can do.

>     Now they are hacking around in userspace instead of

>     doing/reusing kernel drivers for their stuff:

>     https://github.com/jbech-linaro/secure96

>

>     This way we can bring developers for these components

>     into the kernel community instead of telling them to

>     wait for some big infrastructure that comes later

>     before they can contribute their stuff.

>

> A2: Overlays does not solve the problem if the system runs

>     ACPI, and what about if the same connector[s] appear

>     on a server board, servers use ACPI. Also notice

>     that Intel have development boards with non-discoverable

>     expansion boards as well. They just will not use

>     device tree.

>

> A3: Overlays is Big Upfront Design.

>     https://en.wikipedia.org/wiki/Big_Design_Up_Front

>     This way of designing things is associated with the

>     (pejorative term) "waterfall model" which is out of

>     fashion as a way of doing development. I think I am not

>     the only one slightly annoyed by the fact that device

>     tree overlays is now starting to look like a very

>     big very upfront design. It's just not possible to get

>     something up and running in small iterative steps with

>     device tree overlays. Instead huge efforts are

>     required and it involves major possible showstoppers

>     and uncertain outcome as indicated by Frank's TODO:

>     https://elinux.org/Frank's_Evolving_Overlay_Thoughts


I don't agree. This can be broken down into various smaller mostly
independent problems. Overlay handling is mostly an orthogonal
problem. The exception is that we need to ensure bindings allow a
decoupling of upstream of the connector and downstream of the
connector so the downstream part can be a reusable overlay. Defining
anything while ignoring this known criteria would be a mistake.

The list is roughly like this:

- Connector node binding and probing infrastructure
- GPIO (already done w/ gpio-map binding)
- I2C
- SPI
- Pinmux
- clocks
- OF graph (displays, cameras, etc.)
- USB (re-use the USB connector binding for non-standard connectors)
- Userspace interface

We don't have to support every interface from the start. The bindings
and corresponding kernel support can be designed 1-by-1 for the most
part. Start with something simple like a GPIO LED on a mezzanine. Once
the base is functionality is there, the other parts can be worked on
incrementally. We can punt any overlay handling to the bootloader
initially. That punts all the issues around overlays like designing a
userspace interface, where overlays are located (filesystem, passed
from bootloader, built into the kernel), when they are loaded, and how
to specify which overlays to load. Most of Frank's list is related to
these issues.

Rob
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Frank Rowand June 21, 2018, 12:58 p.m. UTC | #9
On 06/18/18 00:45, Linus Walleij wrote:
> This is a proposal for how to handle the non-discoverable

> 96boards plug-in expansion boards called "mezzanines" in the

> Linux kernel. It is a working RFC series meant for discussion

> at the moment.


< snip >

> So for that reason, or other predictable statements such

> as "you're reinventing board files", I'd like to have an

> open discussion on how to actually support these boards

> with the mainline kernel and work on device drivers common

> with other systems now, and not in 2020 when they are already

> obsolete.

> 

> Yeah it is a bit controversial, but what we are doing right

> now for non-discoverable expansion boards isn't working

> in my opinion, so I have to throw something out there,

> and this is it.


< snip >

why  can't a devicetree description of the devices on the
mezzanine board be used?

I do understand the desire to describe interchangeable mezzanine
boards separately from the base devicetree, such as in an
overlay.  Overlays can be applied today by U-boot before the
Linux kernel is booted, so lack of being able to apply an
overlay after Linux boot completes is not a blocker.

-Frank
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Frank Rowand June 21, 2018, 1:02 p.m. UTC | #10
On 06/19/18 08:52, Rob Herring wrote:
> On Mon, Jun 18, 2018 at 1:45 AM, Linus Walleij <linus.walleij@linaro.org> wrote:

>> This is a proposal for how to handle the non-discoverable

>> 96boards plug-in expansion boards called "mezzanines" in the

>> Linux kernel. It is a working RFC series meant for discussion

>> at the moment.

>>

>> The RFC was done on the brand new Ultra96 board from Xilinx

>> with a Secure96 mezzanine expansion board. The main part

>> is in patch 4, the rest is enabling and examples.

>>

>> The code can be obtained from here:

>> https://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-integrator.git/log/?h=ultra96

>>

>> You can for example probably augment the DTS file for any

>> upstream-supported 96board and get the Secure96 going with

>> it with minor efforts.

>>

>> TODO:

>>

>> - Proper device tree bindings for the connector, for now

>>   look at the example.

>>

>> - Discuss whether to actually do this or just take it all and

>>   flush it down the drain because the community doesn't like

>>   it. I'm not one of those especially infatuated with my own code,

>>   I always stay by the old programming project management mantra

>>   to calculate to make one version and throw it away as stepping

>>   stone to a good final design.

>>

>> - Placement: putting this in drivers/bus is just an example.

>>   drivers/platform/96boards-mezzanines is fine too, maybe better?

>>

>> - I am especially curious about input from Andy and Mika from

>>   the Intel/ACPI camp on what they have seen for non-discoverable

>>   plug-in boards. Does this problem even exist in the Intel

>>   world, or not...

>>

>> Background:

>>

>> - These boards connect on a custom connector on this family

>>   of boards. The relationship is many-to-many with the connector

>>   as nexus. The electronic standard for the connector is specified:

>>   https://github.com/96boards/documentation/blob/master/Specifications/96Boards-CE-Specification.pdf

>>   Example mezzanines:

>>   https://www.96boards.org/documentation/mezzanine/

>>

>> - These boards have siblings on other platforms, the problem

>>   scope is similar with BeagleBone "capes":

>>   https://beagleboard.org/capes

>>   Raspberry Pi expansion boards:

>>   https://www.abelectronics.co.uk/products/18/raspberry-pi-expansion-boards

>>   Intel Edison, Galileo, Joule also have expansion boards.

>>

>> Idea: add a driver for the connector itself and tie it in to

>> the device tree with a compatible string. Since the boards

>> are non-discoverable two mechanisms are provided to discover

>> them:

>>

>> - Add a very simple device tree node with just a compatible

>>   string for the board in the node. This will be simple to

>>   add from e.g. a boot loader or as an overlay from userspace.

>>

>>   board {

>>         compatible = "96boards,secure96";

>>   };

>>

>>

>> - Echo 1 > boardname into a sysfs file to populate the

>>   board and echo 0 > boardname to depopulate it. This

>>   makes it easy to even switch out expansion boards at

>>   runtime, if allowed by the electronics.

>>

>>   > cd /sys/devices/platform/connector

>>   > echo 1 > secure96

>>   lscon connector: called mezzanine_store on secure96

>>   lscon connector: populate secure96

>>   at24 1-0050: 2048 byte 24c128 EEPROM, writable, 128 bytes/write

>>   atmel-ecc 1-0060: configuration zone is unlocked

>>   tpm_tis_spi spi0.0: 2.0 TPM (device-id 0x1B, rev-id 16)

>>   (...)

>>

>> What this patch set does not do:

>>

>> - It does not use device tree or ACPI DSDT or any other

>>   hardware decription language to model the contents of the

>>   board per se. Instead the boards buses are populated

>>   directly with platform devices.

>>

>> Predictable complaints about this design:

>>

>> Q: This is not device tree overlays. Why is it not device

>>    tree overlays?

>>

>> A1: Right tool for the job, overlays are complex and the

>>     plan to get it in place seems to be spanning years, this

>>     is a few devices on simple busses and it works today.

>>     Using this approach I can already work on shaping up

>>     drivers for the mezzanine board devices as proved by:

>>     https://marc.info/?l=linux-crypto-vger&m=152820660120590&w=2

>>     https://marc.info/?l=linux-crypto-vger&m=152820662820595&w=2

>>     (...)

>>

>>     I can work on drivers for the chips on the

>>     Secure96 mezzanine board. It's just an example of

>>     what the mezzanine community can do.

>>     Now they are hacking around in userspace instead of

>>     doing/reusing kernel drivers for their stuff:

>>     https://github.com/jbech-linaro/secure96

>>

>>     This way we can bring developers for these components

>>     into the kernel community instead of telling them to

>>     wait for some big infrastructure that comes later

>>     before they can contribute their stuff.

>>

>> A2: Overlays does not solve the problem if the system runs

>>     ACPI, and what about if the same connector[s] appear

>>     on a server board, servers use ACPI. Also notice

>>     that Intel have development boards with non-discoverable

>>     expansion boards as well. They just will not use

>>     device tree.

>>

>> A3: Overlays is Big Upfront Design.

>>     https://en.wikipedia.org/wiki/Big_Design_Up_Front

>>     This way of designing things is associated with the

>>     (pejorative term) "waterfall model" which is out of

>>     fashion as a way of doing development. I think I am not

>>     the only one slightly annoyed by the fact that device

>>     tree overlays is now starting to look like a very

>>     big very upfront design. It's just not possible to get

>>     something up and running in small iterative steps with

>>     device tree overlays. Instead huge efforts are

>>     required and it involves major possible showstoppers

>>     and uncertain outcome as indicated by Frank's TODO:

>>     https://elinux.org/Frank's_Evolving_Overlay_Thoughts

> 

> I don't agree. This can be broken down into various smaller mostly

> independent problems. Overlay handling is mostly an orthogonal

> problem. The exception is that we need to ensure bindings allow a

> decoupling of upstream of the connector and downstream of the

> connector so the downstream part can be a reusable overlay. Defining

> anything while ignoring this known criteria would be a mistake.

> 

> The list is roughly like this:

> 

> - Connector node binding and probing infrastructure

> - GPIO (already done w/ gpio-map binding)

> - I2C

> - SPI

> - Pinmux

> - clocks

> - OF graph (displays, cameras, etc.)

> - USB (re-use the USB connector binding for non-standard connectors)

> - Userspace interface

> 

> We don't have to support every interface from the start. The bindings

> and corresponding kernel support can be designed 1-by-1 for the most

> part. Start with something simple like a GPIO LED on a mezzanine. Once

> the base is functionality is there, the other parts can be worked on

> incrementally. We can punt any overlay handling to the bootloader

> initially. That punts all the issues around overlays like designing a

> userspace interface, where overlays are located (filesystem, passed

> from bootloader, built into the kernel), when they are loaded, and how

> to specify which overlays to load. Most of Frank's list is related to

> these issues.

> 

> Rob

> 


Agreeing with Rob (despite my other reply asking why the current
devicetree mechanisms can't be used) that we do have a desire to
have the ability to create bindings for connectors - this has been
discussed before.

-Frank
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Michal Simek June 22, 2018, 1:08 p.m. UTC | #11
On 19.6.2018 17:32, Yang Zhang wrote:
> On 19 June 2018 at 16:30, Ard Biesheuvel <ard.biesheuvel@linaro.org> wrote:

> 

>> On 19 June 2018 at 17:26, Yang Zhang <yang.zhang@96boards.org> wrote:

>>> Yes.

>>>

>>> https://github.com/96boards/documentation/blob/master/

>> mezzanine/files/mezzanine-design-guidelines.pdf

>>>

>>> Under Configuration data section

>>>

>>

>> OK, fair enough. Do any such mezzanines exist yet? Should we offer

>> more guidance on how exactly this discovery should be implemented?

>>

>>

> I can't be sure, could look into it - I know there were couple of from

> Arrow and ST were supporting this.

> 

> Yes, more details guidance of "How to" is always welcome :-).


Unfortunately this is not saying i2c address and also how to handle
stacked solution.

I have told to Linus what Xilinx is using for FMC connector present on
the most of xilinx development boards.
These on board FMC eeproms contain information in FRU format.
Also there incomplete support fmc support in the kernel in drivers/fmc
which was added by Alessandro Rubini in 2013.

At least these eeprom could reuse FRU data format.

Thanks,
Michal
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Michal Simek June 22, 2018, 1:36 p.m. UTC | #12
On 18.6.2018 16:15, Arnd Bergmann wrote:
> On Mon, Jun 18, 2018 at 3:22 PM, Ard Biesheuvel

> <ard.biesheuvel@linaro.org> wrote:

>> On 18 June 2018 at 14:21, Arnd Bergmann <arnd@arndb.de> wrote:

>>> On Mon, Jun 18, 2018 at 9:45 AM, Linus Walleij <linus.walleij@linaro.org> wrote:

>>

>> Also, given that we can (and do) already describe topologies involving

>> mezzanines by ignoring the connector altogether (which is not entirely

>> unreasonable given the fact that we [as Linaro/96boards] dropped the

>> ball on this one and did not mandate discoverability for mezzanines).

>> So ideally, DTs can be expressed such that older kernels can still use

>> those peripherals.

> 

> Not sure. Modeling the connector as a device with its own driver does

> seem like a significant advantage, which to me weighs more than backward

> compatibility with old kernels. We can clearly always describe the devices

> behind the connector individually and ignore the connector on old kernels

> and we should still allow running DT files that work with the old kernels

> on new kernels, but I don't see running new DT files on old kernels as

> essential in this case. Many platforms don't actually care about that case

> at all today (but some do of course).


Linus choose Ultra96 board which is showing that "standard" 96boards
connector doesn't need to be standard in all cases.
If you look at board schematics that you will see that loaded
bitstream/configuration is making these connector compatible with
96boards spec.
Almost the whole HS connector is connected to programmable logic and low
speed connector is pretty much flexible too.

Also resource/power saving case should be considered.
I will take uart mezzanine as an example which requires only 6 uart pins
and one gpio. In Ultra96 that means that doesn't make sense to waste
your fpga resources for something what you don't need.
(Truth is that for low speed it is just about wires but with High speed
connector MIPI is in PL part which consume a logic).
And both connectors should also be handled together because some
mezzanine cards require both of them.

Thanks,
Michal
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Linus Walleij June 26, 2018, 8:02 a.m. UTC | #13
On Mon, Jun 18, 2018 at 2:21 PM Arnd Bergmann <arnd@arndb.de> wrote:

> - I really like the idea of having C code deal with the mezzanine

>   connector itself, acting as an intermediate to tie a number of

>   boards to a number of add-on cards, this seems much simpler than

>   trying to do everything with overlays or one of the other more

>   generic mechanisms.


This is my point of view as well.

> - I don't like the idea of having the bus driver contain a list of possible

>   add-ons, this seems to go against our usual driver model. What

>   I think we want instead is to make the connector itself a proper

>   bus_type, to allow drivers to register against it as loadable modules,

>   and devices (maybe limited to one device) being created as probed

>   from DT or some other method as you describe.


OK I think I can do that. It will take some thinking and I would
guess I should also move it to drivers/platform/*

My idea here would be to have a connector bus that some random
add-on (such as a 96board mezzanine) would probe to, so we
make it generic for any connector plug.

> - You export symbols in the mezzanine_* namespace, which I think

>    is a bit too generic and should perhaps contain something related

>    to  96boards in its name to make it less ambiguous. I suspect we

>    would add a number of further connectors for hats, capes, lures etc,

>    which could all be described as mezzanines.


Michal also brings up the (discoverable!) FMC connectors Xilinx are
using. So the idea would be to create something generic to help
probe and populate them all whether partly discoverable or not.

>    One open question

>    is how we structure the commonality between the various

>    connectors, but we can defer that until we have more than one

>    or two of them.


I can clean up the namespace at least so it gets clear where to
add them. I will try to be more generic in the next iteration.

Yours,
Linus Walleij
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Arnd Bergmann June 26, 2018, 8:08 a.m. UTC | #14
On Tue, Jun 26, 2018 at 10:02 AM, Linus Walleij
<linus.walleij@linaro.org> wrote:
> On Mon, Jun 18, 2018 at 2:21 PM Arnd Bergmann <arnd@arndb.de> wrote:

>

>> - I really like the idea of having C code deal with the mezzanine

>>   connector itself, acting as an intermediate to tie a number of

>>   boards to a number of add-on cards, this seems much simpler than

>>   trying to do everything with overlays or one of the other more

>>   generic mechanisms.

>

> This is my point of view as well.

>

>> - I don't like the idea of having the bus driver contain a list of possible

>>   add-ons, this seems to go against our usual driver model. What

>>   I think we want instead is to make the connector itself a proper

>>   bus_type, to allow drivers to register against it as loadable modules,

>>   and devices (maybe limited to one device) being created as probed

>>   from DT or some other method as you describe.

>

> OK I think I can do that. It will take some thinking and I would

> guess I should also move it to drivers/platform/*


I'd probably leave it in drivers/bus/, though this might be one of the
rare cases that drivers/platform makes sense for as well.

> My idea here would be to have a connector bus that some random

> add-on (such as a 96board mezzanine) would probe to, so we

> make it generic for any connector plug.


The question here is whether we want one 'struct bus_type' instance
shared by all connector types, or one for each type. I was actually
leaning towards the latter here.

>> - You export symbols in the mezzanine_* namespace, which I think

>>    is a bit too generic and should perhaps contain something related

>>    to  96boards in its name to make it less ambiguous. I suspect we

>>    would add a number of further connectors for hats, capes, lures etc,

>>    which could all be described as mezzanines.

>

> Michal also brings up the (discoverable!) FMC connectors Xilinx are

> using. So the idea would be to create something generic to help

> probe and populate them all whether partly discoverable or not.


If a bus is fully discoverable, I think it's better to use a separate
bus_type that does not use DT based probing for its children.
However, many buses (even USB and PCI) turn out to be only
mostly discoverable, so we end up having to come up with a way
to represent child devices in DT as well.

     Arnd
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Linus Walleij June 26, 2018, 8:09 a.m. UTC | #15
On Mon, Jun 18, 2018 at 3:22 PM Ard Biesheuvel
<ard.biesheuvel@linaro.org> wrote:

> We should also consider firmware use of the mezzanines. For instance,

> the Secure96 has a RNG which UEFI may want to use so the early boot

> code can access is for KASLR. It also has a TPM, which should not be

> reset/reinitialized/etc by the OS if we want to make meaningful use of

> it.


This problem: sharing or dedicating a piece of hardware to UEFI or
the TrustZone secure world is a generic problem not related to
mezzanines or plug-in boards specifically.

c.f.
arch/arm64/boot/dts/arm/juno-motherboard.dtsi:

flash@0,00000000 {
        /* 2 * 32MiB NOR Flash memory mounted on CS0 */
        compatible = "arm,vexpress-flash", "cfi-flash";
        linux,part-probe = "afs";
        reg = <0 0x00000000 0x04000000>;
        bank-width = <4>;
        /*
         * Unfortunately, accessing the flash disturbs
         * the CPU idle states (suspend) and CPU
         * hotplug of the platform. For this reason,
         * flash hardware access is disabled by default.
         */
        status = "disabled";
};

What we need for this is something like

status = "secure-world-exclusive";
status = "UEFI-exclusive";

Or something like the same when using device tree.

If people probe this from sysfs (as in my example) they are
obviously not novice users and they know what they are
doing. For a simple user experience, I suspect device tree
is what we want to use to populate defaults.

> So ideally, DTs can be expressed such that older kernels can still use

> those peripherals.


That kind of expressions are possible already, such as
putting the TPM DT node inside a SoC-specific I2C bus
node. The boot loader can do that for example.

Then they can't also probe the same board from userspace,
obviously. No matter whether they use the idea I present
here or device tree overlays or anything else.

Yours,
Linus Walleij
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Ard Biesheuvel June 26, 2018, 8:19 a.m. UTC | #16
On 26 June 2018 at 10:09, Linus Walleij <linus.walleij@linaro.org> wrote:
> On Mon, Jun 18, 2018 at 3:22 PM Ard Biesheuvel

> <ard.biesheuvel@linaro.org> wrote:

>

>> We should also consider firmware use of the mezzanines. For instance,

>> the Secure96 has a RNG which UEFI may want to use so the early boot

>> code can access is for KASLR. It also has a TPM, which should not be

>> reset/reinitialized/etc by the OS if we want to make meaningful use of

>> it.

>

> This problem: sharing or dedicating a piece of hardware to UEFI or

> the TrustZone secure world is a generic problem not related to

> mezzanines or plug-in boards specifically.

>

> c.f.

> arch/arm64/boot/dts/arm/juno-motherboard.dtsi:

>

> flash@0,00000000 {

>         /* 2 * 32MiB NOR Flash memory mounted on CS0 */

>         compatible = "arm,vexpress-flash", "cfi-flash";

>         linux,part-probe = "afs";

>         reg = <0 0x00000000 0x04000000>;

>         bank-width = <4>;

>         /*

>          * Unfortunately, accessing the flash disturbs

>          * the CPU idle states (suspend) and CPU

>          * hotplug of the platform. For this reason,

>          * flash hardware access is disabled by default.

>          */

>         status = "disabled";

> };

>

> What we need for this is something like

>

> status = "secure-world-exclusive";

> status = "UEFI-exclusive";

>

> Or something like the same when using device tree.

>


I agree that this is *also* a problem. But it is not what I was talking about.

My example is about peripherals that firmware and OS should both drive
natively, and in the TPM case, the OS should be mindful of the fact
that the measured state should be preserved. Also, it means that we
may be duplicating functionality between the OS and firmware [as
usual] so it might make sense to come up with something that takes
both use cases into account.

> If people probe this from sysfs (as in my example) they are

> obviously not novice users and they know what they are

> doing. For a simple user experience, I suspect device tree

> is what we want to use to populate defaults.

>

>> So ideally, DTs can be expressed such that older kernels can still use

>> those peripherals.

>

> That kind of expressions are possible already, such as

> putting the TPM DT node inside a SoC-specific I2C bus

> node. The boot loader can do that for example.

>

> Then they can't also probe the same board from userspace,

> obviously. No matter whether they use the idea I present

> here or device tree overlays or anything else.

>


OK.
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Linus Walleij June 26, 2018, 8:36 a.m. UTC | #17
On Tue, Jun 26, 2018 at 10:19 AM Ard Biesheuvel
<ard.biesheuvel@linaro.org> wrote:
> On 26 June 2018 at 10:09, Linus Walleij <linus.walleij@linaro.org> wrote:

> > On Mon, Jun 18, 2018 at 3:22 PM Ard Biesheuvel

> > <ard.biesheuvel@linaro.org> wrote:

> >

> >> We should also consider firmware use of the mezzanines. For instance,

> >> the Secure96 has a RNG which UEFI may want to use so the early boot

> >> code can access is for KASLR. It also has a TPM, which should not be

> >> reset/reinitialized/etc by the OS if we want to make meaningful use of

> >> it.

> >

> > This problem: sharing or dedicating a piece of hardware to UEFI or

> > the TrustZone secure world is a generic problem not related to

> > mezzanines or plug-in boards specifically.

(...)
> I agree that this is *also* a problem. But it is not what I was talking about.

>

> My example is about peripherals that firmware and OS should both drive

> natively, and in the TPM case, the OS should be mindful of the fact

> that the measured state should be preserved.


Ah I see.

In that case this is something the TPM driver should be doing
I guess? I mean it is a "firmware plus OS TPM driver"-specific
problem.

I guess that would be hard to duct-tape on if the peripheral
is context-unaware and easy to do if the designer of the
peripheral HW took multiple call-context into account.
Whether TPM does this I don't know...

> Also, it means that we

> may be duplicating functionality between the OS and firmware [as

> usual] so it might make sense to come up with something that takes

> both use cases into account.


What we are doing now with Atmel's ECC chip is even worse:
duplicating functionality between OS and userspace. So I'm
trying to solve that first.

Yours,
Linus Walleij
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Linus Walleij June 26, 2018, 9 a.m. UTC | #18
On Tue, Jun 19, 2018 at 5:52 PM Rob Herring <robh+dt@kernel.org> wrote:
> On Mon, Jun 18, 2018 at 1:45 AM, Linus Walleij <linus.walleij@linaro.org> wrote:


> > A3: Overlays is Big Upfront Design.

(...)
> I don't agree. This can be broken down into various smaller mostly

> independent problems. Overlay handling is mostly an orthogonal

> problem. The exception is that we need to ensure bindings allow a

> decoupling of upstream of the connector and downstream of the

> connector so the downstream part can be a reusable overlay. Defining

> anything while ignoring this known criteria would be a mistake.


Hopefully we can make a connector binding that can
be used in any way by the OS: either probe a board
populating driver (such as in this patch set) or allow
an overlay to be inserted (the aforementioned driver
compiled out or inactive) further down the road. I would
like to believe the board population problem is a
both/and thing, not an either/or thing here.

Could be a simple as a compatible-string for the
connector(s). We just keep it dirt simple.

> The list is roughly like this:

>

> - Connector node binding and probing infrastructure

> - GPIO (already done w/ gpio-map binding)


I tested that actually, using the connector as nexus. It works
fine. The problem I ran into was more practical
(see below).

> - I2C

> - SPI

> - Pinmux

> - clocks

> - OF graph (displays, cameras, etc.)

> - USB (re-use the USB connector binding for non-standard connectors)

> - Userspace interface

>

> We don't have to support every interface from the start. The bindings

> and corresponding kernel support can be designed 1-by-1 for the most

> part. Start with something simple like a GPIO LED on a mezzanine.


I have that working today, I just didn't go beyond that.

It's because of usability issues. (Described below.)

> Once

> the base is functionality is there, the other parts can be worked on

> incrementally. We can punt any overlay handling to the bootloader

> initially.


I didn't even do that. I just patched the DTS with a connector
and booted it.

From a user point of view whether having a
patched up DTS or a boot loader modifying the DTB at
run-time does not really matter as these boards are
non-discoverable anyway. The boot loader will now know
if they are there or not. What should the user do? Should
they send command line arguments to U-Boot to say that
we have the secure96 board? Flash different boot loaders
depending on what board(s) are connected? That is even
more awkward (IMO) than just modifying and redeploying
the DTB.

The bright side of this patch set is that the user boots
and the kernel is aware of there being a connector
and presents sysfs files to populate the boards.

User goes "hm OK I have a secure96":
cd /sys/bus/platform/devices/connector
echo 1 > secure96

And there it populates.

No special boot loaders. No special tools.

> That punts all the issues around overlays like designing a

> userspace interface, where overlays are located (filesystem, passed

> from bootloader, built into the kernel), when they are loaded, and how

> to specify which overlays to load. Most of Frank's list is related to

> these issues.


And that is where the user (also me) stops short.

Now I want to plug this board. OK download device tree
compiler, author a fragment, compile it, compile a
special userspace for inserting it into the right node,
flash filesystem with that new userpace tool, also
do not forget the DTB fragment, parameterize that
tool to load the fragment into the connector node.
Maybe the user need to change stuff on the fly?
Hm then they need a text editor and a DT compiler
on the target too, OK things like that can be done.

Admittedly the above is more versatile. Probably
awesome when you need to populate a device forest
on an FPGA.

But is that even a realistic usecase? And what about
the average plug-in board user? If they can do the
population by compiling a kernel driver for their
board and say it's there and populate it with a simple
echo into a sysfs file they will be happy.

It doesn't exclude (IMHO if done right) the possibility for a
more complex device tree fragment approach to
be substituted for this later, if it is better for the user.
They just stop to compile in that kernel module for
populating the board, or do not use the sysfs file.

IMO it is way better than "stop everything and fix
fragments first". It's a stopgap thing, if overlays
materialize later.

Yours,
Linus Walleij
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Linus Walleij June 26, 2018, 9:03 a.m. UTC | #19
On Thu, Jun 21, 2018 at 3:02 PM Frank Rowand <frowand.list@gmail.com> wrote:

> Agreeing with Rob (despite my other reply asking why the current

> devicetree mechanisms can't be used)


I think I answer also your comments in my reply to Rob,
please check!

> that we do have a desire to

> have the ability to create bindings for connectors - this has been

> discussed before.


Let's create bindings for connectors.

But I have this caveat: let's create a binding for connectors
that does not stipulate that its children must be populated
using overlays, but could optionally be bound to driver that
populate the children any way the OS want to do this.

Yours,
Linus Walleij
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Linus Walleij June 26, 2018, 9:10 a.m. UTC | #20
On Fri, Jun 22, 2018 at 3:09 PM Michal Simek <michal.simek@xilinx.com> wrote:

> I have told to Linus what Xilinx is using for FMC connector present on

> the most of xilinx development boards.

> These on board FMC eeproms contain information in FRU format.

> Also there incomplete support fmc support in the kernel in drivers/fmc

> which was added by Alessandro Rubini in 2013.

>

> At least these eeprom could reuse FRU data format.


The FRU is a very tasteful design IMO and since it is a discoverable
(plug and play!) bus I think we should have a clean FRU bus
driver along Alessandro's suggestion to support them and spawn
devices much like I do, as long as there is interest and
some person who spends time writing the bus driver for it.

Yours,
Linus Walleij
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Mark Brown June 26, 2018, 12:12 p.m. UTC | #21
On Tue, Jun 26, 2018 at 10:02:20AM +0200, Linus Walleij wrote:
> On Mon, Jun 18, 2018 at 2:21 PM Arnd Bergmann <arnd@arndb.de> wrote:


> > - You export symbols in the mezzanine_* namespace, which I think

> >    is a bit too generic and should perhaps contain something related

> >    to  96boards in its name to make it less ambiguous. I suspect we

> >    would add a number of further connectors for hats, capes, lures etc,

> >    which could all be described as mezzanines.


> Michal also brings up the (discoverable!) FMC connectors Xilinx are

> using. So the idea would be to create something generic to help

> probe and populate them all whether partly discoverable or not.


There's also the plug in modules in the Wolfson Cragganmore, there's
enumeration support for that in mainline.
Rob Herring June 27, 2018, 3:23 p.m. UTC | #22
On Tue, Jun 26, 2018 at 8:36 AM Linus Walleij <linus.walleij@linaro.org> wrote:
>

> On Tue, Jun 19, 2018 at 5:52 PM Rob Herring <robh+dt@kernel.org> wrote:

> > On Mon, Jun 18, 2018 at 1:45 AM, Linus Walleij <linus.walleij@linaro.org> wrote:

>

> > > A3: Overlays is Big Upfront Design.

> (...)

> > I don't agree. This can be broken down into various smaller mostly

> > independent problems. Overlay handling is mostly an orthogonal

> > problem. The exception is that we need to ensure bindings allow a

> > decoupling of upstream of the connector and downstream of the

> > connector so the downstream part can be a reusable overlay. Defining

> > anything while ignoring this known criteria would be a mistake.

>

> Hopefully we can make a connector binding that can

> be used in any way by the OS: either probe a board

> populating driver (such as in this patch set) or allow

> an overlay to be inserted (the aforementioned driver

> compiled out or inactive) further down the road. I would

> like to believe the board population problem is a

> both/and thing, not an either/or thing here.


Certainly both can be supported. The base DT should be the same. I
don't think populating via DT needs to be a further down the road
thing. We're already further down the road...

> Could be a simple as a compatible-string for the

> connector(s). We just keep it dirt simple.


Yes, that would be the most simple case. Not really any work to do
there, so what's the point? Soon enough, we'll need to support all the
things listed below and what we certainly don't need is each connector
doing things their own way.

> > The list is roughly like this:

> >

> > - Connector node binding and probing infrastructure

> > - GPIO (already done w/ gpio-map binding)

>

> I tested that actually, using the connector as nexus. It works

> fine. The problem I ran into was more practical

> (see below).

>

> > - I2C

> > - SPI

> > - Pinmux

> > - clocks

> > - OF graph (displays, cameras, etc.)

> > - USB (re-use the USB connector binding for non-standard connectors)

> > - Userspace interface

> >

> > We don't have to support every interface from the start. The bindings

> > and corresponding kernel support can be designed 1-by-1 for the most

> > part. Start with something simple like a GPIO LED on a mezzanine.

>

> I have that working today, I just didn't go beyond that.

>

> It's because of usability issues. (Described below.)

>

> > Once

> > the base is functionality is there, the other parts can be worked on

> > incrementally. We can punt any overlay handling to the bootloader

> > initially.

>

> I didn't even do that. I just patched the DTS with a connector

> and booted it.


Yes, or just do that. In any case, don't blame overlays for avoiding
more fully defining connector bindings.

> From a user point of view whether having a

> patched up DTS or a boot loader modifying the DTB at

> run-time does not really matter as these boards are

> non-discoverable anyway. The boot loader will now know

> if they are there or not. What should the user do? Should

> they send command line arguments to U-Boot to say that

> we have the secure96 board? Flash different boot loaders

> depending on what board(s) are connected? That is even

> more awkward (IMO) than just modifying and redeploying

> the DTB.


Ideally, it would be as simple as editing a syslinux style menu text
file or setting an EFI variable. But yes, we do need to define exactly
how that is done. It's something on the todo list for EBBR, but not
going to happen until after the 1st release.

> The bright side of this patch set is that the user boots

> and the kernel is aware of there being a connector

> and presents sysfs files to populate the boards.

>

> User goes "hm OK I have a secure96":

> cd /sys/bus/platform/devices/connector

> echo 1 > secure96

>

> And there it populates.

>

> No special boot loaders. No special tools.

>

> > That punts all the issues around overlays like designing a

> > userspace interface, where overlays are located (filesystem, passed

> > from bootloader, built into the kernel), when they are loaded, and how

> > to specify which overlays to load. Most of Frank's list is related to

> > these issues.

>

> And that is where the user (also me) stops short.

>

> Now I want to plug this board. OK download device tree

> compiler, author a fragment, compile it, compile a

> special userspace for inserting it into the right node,

> flash filesystem with that new userpace tool, also

> do not forget the DTB fragment, parameterize that

> tool to load the fragment into the connector node.

> Maybe the user need to change stuff on the fly?

> Hm then they need a text editor and a DT compiler

> on the target too, OK things like that can be done.


With your series, they'd just have to edit and rebuild the kernel...

> Admittedly the above is more versatile. Probably

> awesome when you need to populate a device forest

> on an FPGA.

>

> But is that even a realistic usecase? And what about

> the average plug-in board user? If they can do the

> population by compiling a kernel driver for their

> board and say it's there and populate it with a simple

> echo into a sysfs file they will be happy.


Only a kernel developer would think compiling a kernel driver makes
for a good usecase.

For users, I think all the board dtbs have to be on the filesystem and
the user only has to set which ones to apply (when there is no eeprom
to allow doing that automatically). That's essentially what you have
on RPi today (though I've got issues with some of their overlays, but
that's a whole other can of worms).

The other user usecase I think is custom or prototyping boards. For
those cases, we probably do want some run-time interface which could
be a kernel driver (as you have) or configfs overlay interface. But
I'd start with the first usecase and worry about this one later.

Rob
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Michal Simek June 28, 2018, 6:10 a.m. UTC | #23
+Pantelis

On 27.6.2018 17:23, Rob Herring wrote:
> On Tue, Jun 26, 2018 at 8:36 AM Linus Walleij <linus.walleij@linaro.org> wrote:

>>

>> On Tue, Jun 19, 2018 at 5:52 PM Rob Herring <robh+dt@kernel.org> wrote:

>>> On Mon, Jun 18, 2018 at 1:45 AM, Linus Walleij <linus.walleij@linaro.org> wrote:

>>

>>>> A3: Overlays is Big Upfront Design.

>> (...)

>>> I don't agree. This can be broken down into various smaller mostly

>>> independent problems. Overlay handling is mostly an orthogonal

>>> problem. The exception is that we need to ensure bindings allow a

>>> decoupling of upstream of the connector and downstream of the

>>> connector so the downstream part can be a reusable overlay. Defining

>>> anything while ignoring this known criteria would be a mistake.

>>

>> Hopefully we can make a connector binding that can

>> be used in any way by the OS: either probe a board

>> populating driver (such as in this patch set) or allow

>> an overlay to be inserted (the aforementioned driver

>> compiled out or inactive) further down the road. I would

>> like to believe the board population problem is a

>> both/and thing, not an either/or thing here.

> 

> Certainly both can be supported. The base DT should be the same. I

> don't think populating via DT needs to be a further down the road

> thing. We're already further down the road...

> 

>> Could be a simple as a compatible-string for the

>> connector(s). We just keep it dirt simple.

> 

> Yes, that would be the most simple case. Not really any work to do

> there, so what's the point? Soon enough, we'll need to support all the

> things listed below and what we certainly don't need is each connector

> doing things their own way.

> 

>>> The list is roughly like this:

>>>

>>> - Connector node binding and probing infrastructure

>>> - GPIO (already done w/ gpio-map binding)

>>

>> I tested that actually, using the connector as nexus. It works

>> fine. The problem I ran into was more practical

>> (see below).

>>

>>> - I2C

>>> - SPI

>>> - Pinmux

>>> - clocks

>>> - OF graph (displays, cameras, etc.)

>>> - USB (re-use the USB connector binding for non-standard connectors)

>>> - Userspace interface

>>>

>>> We don't have to support every interface from the start. The bindings

>>> and corresponding kernel support can be designed 1-by-1 for the most

>>> part. Start with something simple like a GPIO LED on a mezzanine.

>>

>> I have that working today, I just didn't go beyond that.

>>

>> It's because of usability issues. (Described below.)

>>

>>> Once

>>> the base is functionality is there, the other parts can be worked on

>>> incrementally. We can punt any overlay handling to the bootloader

>>> initially.

>>

>> I didn't even do that. I just patched the DTS with a connector

>> and booted it.

> 

> Yes, or just do that. In any case, don't blame overlays for avoiding

> more fully defining connector bindings.

> 

>> From a user point of view whether having a

>> patched up DTS or a boot loader modifying the DTB at

>> run-time does not really matter as these boards are

>> non-discoverable anyway. The boot loader will now know

>> if they are there or not. What should the user do? Should

>> they send command line arguments to U-Boot to say that

>> we have the secure96 board? Flash different boot loaders

>> depending on what board(s) are connected? That is even

>> more awkward (IMO) than just modifying and redeploying

>> the DTB.

> 

> Ideally, it would be as simple as editing a syslinux style menu text

> file or setting an EFI variable. But yes, we do need to define exactly

> how that is done. It's something on the todo list for EBBR, but not

> going to happen until after the 1st release.

> 

>> The bright side of this patch set is that the user boots

>> and the kernel is aware of there being a connector

>> and presents sysfs files to populate the boards.

>>

>> User goes "hm OK I have a secure96":

>> cd /sys/bus/platform/devices/connector

>> echo 1 > secure96

>>

>> And there it populates.

>>

>> No special boot loaders. No special tools.

>>

>>> That punts all the issues around overlays like designing a

>>> userspace interface, where overlays are located (filesystem, passed

>>> from bootloader, built into the kernel), when they are loaded, and how

>>> to specify which overlays to load. Most of Frank's list is related to

>>> these issues.

>>

>> And that is where the user (also me) stops short.

>>

>> Now I want to plug this board. OK download device tree

>> compiler, author a fragment, compile it, compile a

>> special userspace for inserting it into the right node,

>> flash filesystem with that new userpace tool, also

>> do not forget the DTB fragment, parameterize that

>> tool to load the fragment into the connector node.

>> Maybe the user need to change stuff on the fly?

>> Hm then they need a text editor and a DT compiler

>> on the target too, OK things like that can be done.

> 

> With your series, they'd just have to edit and rebuild the kernel...

> 

>> Admittedly the above is more versatile. Probably

>> awesome when you need to populate a device forest

>> on an FPGA.

>>

>> But is that even a realistic usecase? And what about

>> the average plug-in board user? If they can do the

>> population by compiling a kernel driver for their

>> board and say it's there and populate it with a simple

>> echo into a sysfs file they will be happy.

> 

> Only a kernel developer would think compiling a kernel driver makes

> for a good usecase.

> 

> For users, I think all the board dtbs have to be on the filesystem and

> the user only has to set which ones to apply (when there is no eeprom

> to allow doing that automatically). That's essentially what you have

> on RPi today (though I've got issues with some of their overlays, but

> that's a whole other can of worms).

> 

> The other user usecase I think is custom or prototyping boards. For

> those cases, we probably do want some run-time interface which could

> be a kernel driver (as you have) or configfs overlay interface. But

> I'd start with the first usecase and worry about this one later.


Pantelis had (I believe still have) configs overlay interface already.
At least we are keep having it in xilinx soc tree.

Thanks,
Michal


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