[v4,00/15] Add initial RDA8810PL SoC and Orange Pi boards support

Message ID 20181210173550.29643-1-manivannan.sadhasivam@linaro.org
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  • Add initial RDA8810PL SoC and Orange Pi boards support
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Message

Manivannan Sadhasivam Dec. 10, 2018, 5:35 p.m.
Hello,

This patchset adds initial RDA8810PL SoC and Orange Pi boards (2G IoT and
i96) support. RDA8810PL is an ARM Cortex A5 based SoC with Vivante's GC860
GPU. The SoC has been added as a new ARM sub architecture with myself
and Andreas as the maintainers.

More information about the boards can be found in below links:

1. Orange Pi 2G-IoT - http://www.orangepi.org/OrangePi2GIOT/
2. Orange Pi i96 - https://www.96boards.org/product/orangepi-i96/

This patchset is based on the initial revision sent out by Andreas long
back (http://lists.infradead.org/pipermail/linux-arm-kernel/2017-June/515951.html).

I have extended his patchset with proper irqchip and UART drivers. Now,
boards can boot into initramfs with console at UART2.

Thanks,
Mani

Changes in v4:

* Added Rob's Reviewed-by tags for vendor and SoC patches.
* Moved platform Kconfig changes from timer and irqchip drivers to
  SoC support patch.
* Added Marc's Reviewed-by tag for irqchip driver.
* Addressed Rob's review comments for bindings patches.
* Added the newly created linux-unisoc mailing list to MAINTAINERS
  entry.
* Dropped overseas.sales@unisoc.com mail address as it is bouncing back.
* Modified the DTS subject prefix to ARM: from arm:

Changes in v3:

As per Marc's review:

* Removed unused header and defines from irqchip driver.
* Removed setting flow handlers from set_type callback.
* Minor code cleanups.

As per Arnd's review:

* Modified the UART indexes to start from 1 to match the SoC numbering
* Enabled exposed UARTs (all 3 on both boards)
* Modified the serial aliases as per board numbering

* Added Greg's Reviewed-by tag for serial driver.

Changes in v2:

* Used readl/writel_relaxed calls for both irqchip and timer drivers as
  per Marc's review.
* Implemented the logic to prevent counter wrapping during read as
  suggested by Marc.
* Used the timer-of API as per Daniel's suggestion.
* Added description about the timer in both commit log and driver.
* Changed the Vendor name for RDA to Unisoc Communications Inc.
* Removed the soc node level and cleaned up devicetrees as per Rob's
  review.
* Merged interrupt controller DT patch to SoC.
* Moved aliases to board dts as per Arnd's suggestion.
* Removed RDA Micro support mail address and used Unisoc one and added
  my missing signed off by tag as per Andreas's comments.

Andreas Färber (4):
  dt-bindings: Add RDA Micro vendor prefix
  dt-bindings: arm: Document RDA8810PL and reference boards
  ARM: Prepare RDA8810PL SoC
  dt-bindings: serial: Document RDA Micro UART

Manivannan Sadhasivam (11):
  dt-bindings: interrupt-controller: Document RDA8810PL intc
  ARM: dts: Add devicetree for RDA8810PL SoC
  ARM: dts: Add devicetree for OrangePi 2G IoT board
  ARM: dts: Add devicetree for OrangePi i96 board
  irqchip: Add RDA8810PL interrupt driver
  dt-bindings: timer: Document RDA8810PL SoC timer
  ARM: dts: rda8810pl: Add timer support
  clocksource: Add clock driver for RDA8810PL SoC
  ARM: dts: rda8810pl: Add interrupt support for UART
  tty: serial: Add RDA8810PL UART driver
  MAINTAINERS: Add entry for RDA Micro SoC architecture

 .../admin-guide/kernel-parameters.txt         |   6 +
 Documentation/devicetree/bindings/arm/rda.txt |  17 +
 .../interrupt-controller/rda,8810pl-intc.txt  |  61 ++
 .../bindings/serial/rda,8810pl-uart.txt       |  17 +
 .../bindings/timer/rda,8810pl-timer.txt       |  20 +
 .../devicetree/bindings/vendor-prefixes.txt   |   1 +
 MAINTAINERS                                   |  15 +
 arch/arm/Kconfig                              |   2 +
 arch/arm/Makefile                             |   1 +
 arch/arm/boot/dts/Makefile                    |   3 +
 .../boot/dts/rda8810pl-orangepi-2g-iot.dts    |  50 ++
 arch/arm/boot/dts/rda8810pl-orangepi-i96.dts  |  50 ++
 arch/arm/boot/dts/rda8810pl.dtsi              |  99 +++
 arch/arm/mach-rda/Kconfig                     |   9 +
 arch/arm/mach-rda/Makefile                    |   1 +
 drivers/clocksource/Kconfig                   |   8 +
 drivers/clocksource/Makefile                  |   1 +
 drivers/clocksource/timer-rda.c               | 195 ++++
 drivers/irqchip/Kconfig                       |   4 +
 drivers/irqchip/Makefile                      |   1 +
 drivers/irqchip/irq-rda-intc.c                | 107 +++
 drivers/tty/serial/Kconfig                    |  19 +
 drivers/tty/serial/Makefile                   |   1 +
 drivers/tty/serial/rda-uart.c                 | 831 ++++++++++++++++++
 include/uapi/linux/serial_core.h              |   3 +
 25 files changed, 1522 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/arm/rda.txt
 create mode 100644 Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.txt
 create mode 100644 Documentation/devicetree/bindings/serial/rda,8810pl-uart.txt
 create mode 100644 Documentation/devicetree/bindings/timer/rda,8810pl-timer.txt
 create mode 100644 arch/arm/boot/dts/rda8810pl-orangepi-2g-iot.dts
 create mode 100644 arch/arm/boot/dts/rda8810pl-orangepi-i96.dts
 create mode 100644 arch/arm/boot/dts/rda8810pl.dtsi
 create mode 100644 arch/arm/mach-rda/Kconfig
 create mode 100644 arch/arm/mach-rda/Makefile
 create mode 100644 drivers/clocksource/timer-rda.c
 create mode 100644 drivers/irqchip/irq-rda-intc.c
 create mode 100644 drivers/tty/serial/rda-uart.c

-- 
2.17.1

Comments

Manivannan Sadhasivam Dec. 12, 2018, 3:47 p.m. | #1
Hi Daniel,

On Wed, Dec 12, 2018 at 04:07:53PM +0100, Daniel Lezcano wrote:
> On 10/12/2018 18:35, Manivannan Sadhasivam wrote:

> > Add clock driver for RDA Micro RDA8810PL SoC supporting OSTIMER

> > and HWTIMER.

> > 

> > RDA8810PL has two independent timers: OSTIMER (56 bit) and HWTIMER

> > (64 bit). Each timer provides optional interrupt support. In this

> > driver, OSTIMER is used for clockevents and HWTIMER is used for

> > clocksource.

> > 

> > Signed-off-by: Andreas Färber <afaerber@suse.de>

> > Signed-off-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>

> 

> The driver looks good to me. Do you want me to pick it up via my tree?

> 


Yes, please do. Marc is going to pick up the irqchip driver but I'm not
sure about the serial driver. The rest of the patches can be picked up
by the ARM maintainers (I need to send another version for dropping
Andreas from MAINTAINERS).

Thanks,
Mani

> > ---

> >  drivers/clocksource/Kconfig     |   8 ++

> >  drivers/clocksource/Makefile    |   1 +

> >  drivers/clocksource/timer-rda.c | 195 ++++++++++++++++++++++++++++++++

> >  3 files changed, 204 insertions(+)

> >  create mode 100644 drivers/clocksource/timer-rda.c

> > 

> > diff --git a/drivers/clocksource/Kconfig b/drivers/clocksource/Kconfig

> > index 55c77e44bb2d..598b592e03d7 100644

> > --- a/drivers/clocksource/Kconfig

> > +++ b/drivers/clocksource/Kconfig

> > @@ -105,6 +105,14 @@ config OWL_TIMER

> >  	help

> >  	  Enables the support for the Actions Semi Owl timer driver.

> >  

> > +config RDA_TIMER

> > +	bool "RDA timer driver" if COMPILE_TEST

> > +	depends on GENERIC_CLOCKEVENTS

> > +	select CLKSRC_MMIO

> > +	select TIMER_OF

> > +	help

> > +	  Enables the support for the RDA Micro timer driver.

> > +

> >  config SUN4I_TIMER

> >  	bool "Sun4i timer driver" if COMPILE_TEST

> >  	depends on HAS_IOMEM

> > diff --git a/drivers/clocksource/Makefile b/drivers/clocksource/Makefile

> > index dd9138104568..150020a90707 100644

> > --- a/drivers/clocksource/Makefile

> > +++ b/drivers/clocksource/Makefile

> > @@ -57,6 +57,7 @@ obj-$(CONFIG_OXNAS_RPS_TIMER)	+= timer-oxnas-rps.o

> >  obj-$(CONFIG_OWL_TIMER)		+= timer-owl.o

> >  obj-$(CONFIG_SPRD_TIMER)	+= timer-sprd.o

> >  obj-$(CONFIG_NPCM7XX_TIMER)	+= timer-npcm7xx.o

> > +obj-$(CONFIG_RDA_TIMER)		+= timer-rda.o

> >  

> >  obj-$(CONFIG_ARC_TIMERS)		+= arc_timer.o

> >  obj-$(CONFIG_ARM_ARCH_TIMER)		+= arm_arch_timer.o

> > diff --git a/drivers/clocksource/timer-rda.c b/drivers/clocksource/timer-rda.c

> > new file mode 100644

> > index 000000000000..fd1199c189bf

> > --- /dev/null

> > +++ b/drivers/clocksource/timer-rda.c

> > @@ -0,0 +1,195 @@

> > +// SPDX-License-Identifier: GPL-2.0+

> > +/*

> > + * RDA8810PL SoC timer driver

> > + *

> > + * Copyright RDA Microelectronics Company Limited

> > + * Copyright (c) 2017 Andreas Färber

> > + * Copyright (c) 2018 Manivannan Sadhasivam

> > + *

> > + * RDA8810PL has two independent timers: OSTIMER (56 bit) and HWTIMER (64 bit).

> > + * Each timer provides optional interrupt support. In this driver, OSTIMER is

> > + * used for clockevents and HWTIMER is used for clocksource.

> > + */

> > +

> > +#include <linux/init.h>

> > +#include <linux/interrupt.h>

> > +

> > +#include "timer-of.h"

> > +

> > +#define RDA_OSTIMER_LOADVAL_L	0x000

> > +#define RDA_OSTIMER_CTRL	0x004

> > +#define RDA_HWTIMER_LOCKVAL_L	0x024

> > +#define RDA_HWTIMER_LOCKVAL_H	0x028

> > +#define RDA_TIMER_IRQ_MASK_SET	0x02c

> > +#define RDA_TIMER_IRQ_MASK_CLR	0x030

> > +#define RDA_TIMER_IRQ_CLR	0x034

> > +

> > +#define RDA_OSTIMER_CTRL_ENABLE		BIT(24)

> > +#define RDA_OSTIMER_CTRL_REPEAT		BIT(28)

> > +#define RDA_OSTIMER_CTRL_LOAD		BIT(30)

> > +

> > +#define RDA_TIMER_IRQ_MASK_OSTIMER	BIT(0)

> > +

> > +#define RDA_TIMER_IRQ_CLR_OSTIMER	BIT(0)

> > +

> > +static int rda_ostimer_start(void __iomem *base, bool periodic, u64 cycles)

> > +{

> > +	u32 ctrl, load_l;

> > +

> > +	load_l = (u32)cycles;

> > +	ctrl = ((cycles >> 32) & 0xffffff);

> > +	ctrl |= RDA_OSTIMER_CTRL_LOAD | RDA_OSTIMER_CTRL_ENABLE;

> > +	if (periodic)

> > +		ctrl |= RDA_OSTIMER_CTRL_REPEAT;

> > +	/* Enable ostimer interrupt first */

> > +	writel_relaxed(RDA_TIMER_IRQ_MASK_OSTIMER,

> > +		       base + RDA_TIMER_IRQ_MASK_SET);

> > +

> > +	/* Write low 32 bits first, high 24 bits are with ctrl */

> > +	writel_relaxed(load_l, base + RDA_OSTIMER_LOADVAL_L);

> > +	writel_relaxed(ctrl, base + RDA_OSTIMER_CTRL);

> > +

> > +	return 0;

> > +}

> > +

> > +static int rda_ostimer_stop(void __iomem *base)

> > +{

> > +	/* Disable ostimer interrupt first */

> > +	writel_relaxed(RDA_TIMER_IRQ_MASK_OSTIMER,

> > +		       base + RDA_TIMER_IRQ_MASK_CLR);

> > +

> > +	writel_relaxed(0, base + RDA_OSTIMER_CTRL);

> > +

> > +	return 0;

> > +}

> > +

> > +static int rda_ostimer_set_state_shutdown(struct clock_event_device *evt)

> > +{

> > +	struct timer_of *to = to_timer_of(evt);

> > +

> > +	rda_ostimer_stop(timer_of_base(to));

> > +

> > +	return 0;

> > +}

> > +

> > +static int rda_ostimer_set_state_oneshot(struct clock_event_device *evt)

> > +{

> > +	struct timer_of *to = to_timer_of(evt);

> > +

> > +	rda_ostimer_stop(timer_of_base(to));

> > +

> > +	return 0;

> > +}

> > +

> > +static int rda_ostimer_set_state_periodic(struct clock_event_device *evt)

> > +{

> > +	struct timer_of *to = to_timer_of(evt);

> > +	unsigned long cycles_per_jiffy;

> > +

> > +	rda_ostimer_stop(timer_of_base(to));

> > +

> > +	cycles_per_jiffy = ((unsigned long long)NSEC_PER_SEC / HZ *

> > +			     evt->mult) >> evt->shift;

> > +	rda_ostimer_start(timer_of_base(to), true, cycles_per_jiffy);

> > +

> > +	return 0;

> > +}

> > +

> > +static int rda_ostimer_tick_resume(struct clock_event_device *evt)

> > +{

> > +	return 0;

> > +}

> > +

> > +static int rda_ostimer_set_next_event(unsigned long evt,

> > +				      struct clock_event_device *ev)

> > +{

> > +	struct timer_of *to = to_timer_of(ev);

> > +

> > +	rda_ostimer_start(timer_of_base(to), false, evt);

> > +

> > +	return 0;

> > +}

> > +

> > +static irqreturn_t rda_ostimer_interrupt(int irq, void *dev_id)

> > +{

> > +	struct clock_event_device *evt = dev_id;

> > +	struct timer_of *to = to_timer_of(evt);

> > +

> > +	/* clear timer int */

> > +	writel_relaxed(RDA_TIMER_IRQ_CLR_OSTIMER,

> > +		       timer_of_base(to) + RDA_TIMER_IRQ_CLR);

> > +

> > +	if (evt->event_handler)

> > +		evt->event_handler(evt);

> > +

> > +	return IRQ_HANDLED;

> > +}

> > +

> > +static struct timer_of rda_ostimer_of = {

> > +	.flags = TIMER_OF_IRQ | TIMER_OF_BASE,

> > +

> > +	.clkevt = {

> > +		.name = "rda-ostimer",

> > +		.rating = 250,

> > +		.features = CLOCK_EVT_FEAT_PERIODIC | CLOCK_EVT_FEAT_ONESHOT |

> > +			    CLOCK_EVT_FEAT_DYNIRQ,

> > +		.set_state_shutdown = rda_ostimer_set_state_shutdown,

> > +		.set_state_oneshot = rda_ostimer_set_state_oneshot,

> > +		.set_state_periodic = rda_ostimer_set_state_periodic,

> > +		.tick_resume = rda_ostimer_tick_resume,

> > +		.set_next_event	= rda_ostimer_set_next_event,

> > +	},

> > +

> > +	.of_base = {

> > +		.name = "rda-timer",

> > +		.index = 0,

> > +	},

> > +

> > +	.of_irq = {

> > +		.name = "ostimer",

> > +		.handler = rda_ostimer_interrupt,

> > +		.flags = IRQF_TIMER,

> > +	},

> > +};

> > +

> > +static u64 rda_hwtimer_read(struct clocksource *cs)

> > +{

> > +	void __iomem *base = timer_of_base(&rda_ostimer_of);

> > +	u32 lo, hi;

> > +

> > +	/* Always read low 32 bits first */

> > +	do {

> > +		lo = readl_relaxed(base + RDA_HWTIMER_LOCKVAL_L);

> > +		hi = readl_relaxed(base + RDA_HWTIMER_LOCKVAL_H);

> > +	} while (hi != readl_relaxed(base + RDA_HWTIMER_LOCKVAL_H));

> > +

> > +	return ((u64)hi << 32) | lo;

> > +}

> > +

> > +static struct clocksource rda_hwtimer_clocksource = {

> > +	.name           = "rda-timer",

> > +	.rating         = 400,

> > +	.read           = rda_hwtimer_read,

> > +	.mask           = CLOCKSOURCE_MASK(64),

> > +	.flags          = CLOCK_SOURCE_IS_CONTINUOUS,

> > +};

> > +

> > +static int __init rda_timer_init(struct device_node *np)

> > +{

> > +	unsigned long rate = 2000000;

> > +	int ret;

> > +

> > +	ret = timer_of_init(np, &rda_ostimer_of);

> > +	if (ret)

> > +		return ret;

> > +

> > +	clocksource_register_hz(&rda_hwtimer_clocksource, rate);

> > +

> > +	clockevents_config_and_register(&rda_ostimer_of.clkevt, rate,

> > +					0x2, UINT_MAX);

> > +

> > +	return 0;

> > +}

> > +

> > +TIMER_OF_DECLARE(rda8810pl, "rda,8810pl-timer", rda_timer_init);

> > 

> 

> 

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