From patchwork Mon Dec 10 17:35:35 2018 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 8bit X-Patchwork-Submitter: Manivannan Sadhasivam X-Patchwork-Id: 153315 Delivered-To: patch@linaro.org Received: by 2002:a2e:299d:0:0:0:0:0 with SMTP id p29-v6csp3819005ljp; Mon, 10 Dec 2018 09:36:06 -0800 (PST) X-Google-Smtp-Source: AFSGD/X1JozEg8QKylxfP2TETo+d4rtZBCl9MSuwz0hRq2FOgsgOKTqlcTkFeOiV5T8ZtlbjTAqs X-Received: by 2002:a17:902:bb98:: with SMTP id m24mr12531359pls.71.1544463366519; Mon, 10 Dec 2018 09:36:06 -0800 (PST) ARC-Seal: i=1; a=rsa-sha256; t=1544463366; cv=none; d=google.com; s=arc-20160816; b=QYAfO5fUY4nQMaEyvNwLUWq5cCndh84lB+x9306RG1FQc/W3kf6wFQVqF4hYA5vOE/ VctPQdG/ZMbhEnfPBQm8Me0PUCQVikjPUUqNAfgBFO1eKgnGq9kQOgOmt6k8Oq/qch/3 ONP+LpRoRulnybkI1NmBiYo/x+RtJpul5F9VEU1zFPjojZHiM1MCnANXDlvr8znpTGxW LpzWmPGIlBQVQg+OQenWuwJ6e/bc9Qo1swfjL5MMcNLJkTLTGHioN+KwxHocaKvjW6Wm 4YwFOTgh+eYCK0c/r3VcuYTQ08UGTYuv+LR4NXs69JpXnnw1BSagguBYNrHj+nipuLoD 38lA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:content-transfer-encoding:mime-version :message-id:date:subject:cc:to:from:dkim-signature; bh=oVFI+a5VxncvrDx3DKy4gV2ZPQGt8Io6Cyg8FauMb9Q=; b=SynjDdo/K5vmkTqgoHqiQzhdanlBJH0xLkCK99B59uw4G2vfAxWyaEdTQRktoqQ7ye TGRdAu+wRDBTTqBpzpPB2zLgWT8bx6wLLOnmu2Bd7H9gdTnnj99l+iuWhYkdMR5ymQ/Q J5d87aZEhjeWe98W7gjapyT5zeE/R/M/RX2tpRPpDon3QYQH5ufueKpKlQCgA7KNc+3s mRntOqSbi5KDRtwg9c+eVIlHkqrdKDoc5wPudTsZRCk2YPQV7tHbxO9+bULOwsfenDBV ZFr5klQ3EReXR2obQPMdTRROpL9jh49iRoXVKiHj8GycLQC4XnTw6YB2haQ4WnW4pbUL kBEg== ARC-Authentication-Results: i=1; mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XnhEqIi3; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id f34si10249404pgm.318.2018.12.10.09.36.06; Mon, 10 Dec 2018 09:36:06 -0800 (PST) Received-SPF: pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.s=google header.b=XnhEqIi3; spf=pass (google.com: best guess record for domain of linux-serial-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-serial-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1727265AbeLJRgF (ORCPT + 2 others); Mon, 10 Dec 2018 12:36:05 -0500 Received: from mail-pf1-f195.google.com ([209.85.210.195]:35506 "EHLO mail-pf1-f195.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1726649AbeLJRgF (ORCPT ); Mon, 10 Dec 2018 12:36:05 -0500 Received: by mail-pf1-f195.google.com with SMTP id z9so5733539pfi.2 for ; Mon, 10 Dec 2018 09:36:04 -0800 (PST) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=oVFI+a5VxncvrDx3DKy4gV2ZPQGt8Io6Cyg8FauMb9Q=; b=XnhEqIi3dTHQRieAwJ648DoBXJ3tZyzncVEexwZ/6j/ik3oOZm9f1K8I0u6LBraqGe HVFZLyDIQ89GPRZvMmX5F8hixHLsBLgestq0+SbQzzKWLDkVm1lCQamndgZEIIxSwMGu KWV88/ir+02arZt0i60RWdWhiseCurJYB35bY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:mime-version :content-transfer-encoding; bh=oVFI+a5VxncvrDx3DKy4gV2ZPQGt8Io6Cyg8FauMb9Q=; b=ryr/J22NN70T+3pPLYv5Jk+OnEvt2GGp+ysGKQ8URm53F52dscfGzC5tOr7u4QS4OP NMMkt7mNH6YIgks/HRmnHrF9ZNn6Fne55e+kpSMeGnA7CexGbq3NVr1OELu+YHY4KkEf fO67Ra28xowUaC0XmiW0cjrZwf9PKp5Ey/meJhxY+YzpdWI+VfKccYgzphvK0XCWX3rV pH2rbDdCEnqiwfyyTdXpxbWI+1p1stea7UDAyFoHL+PnZO7I+JfxfDfIfLerQz7r/8FG LlT08Y0K21Hk25QpgsfuCTa/+qHfSQyyHY7r+FfuTTGoKXtK/nuPfelDLeVtU7TiEwVq A09Q== X-Gm-Message-State: AA+aEWYLa0QC8ZYarr2xFYzPYC9I6TLdukurwj+gSRce7PrVFe3hD1ti Chs7eUKNWgVasu7pMKYS4jVR X-Received: by 2002:a62:e201:: with SMTP id a1mr12874637pfi.75.1544463364297; Mon, 10 Dec 2018 09:36:04 -0800 (PST) Received: from localhost.localdomain ([2409:4072:91e:2c01:40e1:a028:b090:9e12]) by smtp.gmail.com with ESMTPSA id q1sm15998396pfb.96.2018.12.10.09.35.55 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Mon, 10 Dec 2018 09:36:03 -0800 (PST) From: Manivannan Sadhasivam To: olof@lixom.net, arnd@arndb.de, robh+dt@kernel.org, tglx@linutronix.de, jason@lakedaemon.net, marc.zyngier@arm.com, daniel.lezcano@linaro.org, gregkh@linuxfoundation.org, jslaby@suse.com Cc: linux-unisoc@lists.infradead.org, afaerber@suse.de, linux-arm-kernel@lists.infradead.org, linux-kernel@vger.kernel.org, devicetree@vger.kernel.org, linux-serial@vger.kernel.org, amit.kucheria@linaro.org, linus.walleij@linaro.org, zhao_steven@263.net, Manivannan Sadhasivam Subject: [PATCH v4 00/15] Add initial RDA8810PL SoC and Orange Pi boards support Date: Mon, 10 Dec 2018 23:05:35 +0530 Message-Id: <20181210173550.29643-1-manivannan.sadhasivam@linaro.org> X-Mailer: git-send-email 2.17.1 MIME-Version: 1.0 Sender: linux-serial-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-serial@vger.kernel.org Hello, This patchset adds initial RDA8810PL SoC and Orange Pi boards (2G IoT and i96) support. RDA8810PL is an ARM Cortex A5 based SoC with Vivante's GC860 GPU. The SoC has been added as a new ARM sub architecture with myself and Andreas as the maintainers. More information about the boards can be found in below links: 1. Orange Pi 2G-IoT - http://www.orangepi.org/OrangePi2GIOT/ 2. Orange Pi i96 - https://www.96boards.org/product/orangepi-i96/ This patchset is based on the initial revision sent out by Andreas long back (http://lists.infradead.org/pipermail/linux-arm-kernel/2017-June/515951.html). I have extended his patchset with proper irqchip and UART drivers. Now, boards can boot into initramfs with console at UART2. Thanks, Mani Changes in v4: * Added Rob's Reviewed-by tags for vendor and SoC patches. * Moved platform Kconfig changes from timer and irqchip drivers to SoC support patch. * Added Marc's Reviewed-by tag for irqchip driver. * Addressed Rob's review comments for bindings patches. * Added the newly created linux-unisoc mailing list to MAINTAINERS entry. * Dropped overseas.sales@unisoc.com mail address as it is bouncing back. * Modified the DTS subject prefix to ARM: from arm: Changes in v3: As per Marc's review: * Removed unused header and defines from irqchip driver. * Removed setting flow handlers from set_type callback. * Minor code cleanups. As per Arnd's review: * Modified the UART indexes to start from 1 to match the SoC numbering * Enabled exposed UARTs (all 3 on both boards) * Modified the serial aliases as per board numbering * Added Greg's Reviewed-by tag for serial driver. Changes in v2: * Used readl/writel_relaxed calls for both irqchip and timer drivers as per Marc's review. * Implemented the logic to prevent counter wrapping during read as suggested by Marc. * Used the timer-of API as per Daniel's suggestion. * Added description about the timer in both commit log and driver. * Changed the Vendor name for RDA to Unisoc Communications Inc. * Removed the soc node level and cleaned up devicetrees as per Rob's review. * Merged interrupt controller DT patch to SoC. * Moved aliases to board dts as per Arnd's suggestion. * Removed RDA Micro support mail address and used Unisoc one and added my missing signed off by tag as per Andreas's comments. Andreas Färber (4): dt-bindings: Add RDA Micro vendor prefix dt-bindings: arm: Document RDA8810PL and reference boards ARM: Prepare RDA8810PL SoC dt-bindings: serial: Document RDA Micro UART Manivannan Sadhasivam (11): dt-bindings: interrupt-controller: Document RDA8810PL intc ARM: dts: Add devicetree for RDA8810PL SoC ARM: dts: Add devicetree for OrangePi 2G IoT board ARM: dts: Add devicetree for OrangePi i96 board irqchip: Add RDA8810PL interrupt driver dt-bindings: timer: Document RDA8810PL SoC timer ARM: dts: rda8810pl: Add timer support clocksource: Add clock driver for RDA8810PL SoC ARM: dts: rda8810pl: Add interrupt support for UART tty: serial: Add RDA8810PL UART driver MAINTAINERS: Add entry for RDA Micro SoC architecture .../admin-guide/kernel-parameters.txt | 6 + Documentation/devicetree/bindings/arm/rda.txt | 17 + .../interrupt-controller/rda,8810pl-intc.txt | 61 ++ .../bindings/serial/rda,8810pl-uart.txt | 17 + .../bindings/timer/rda,8810pl-timer.txt | 20 + .../devicetree/bindings/vendor-prefixes.txt | 1 + MAINTAINERS | 15 + arch/arm/Kconfig | 2 + arch/arm/Makefile | 1 + arch/arm/boot/dts/Makefile | 3 + .../boot/dts/rda8810pl-orangepi-2g-iot.dts | 50 ++ arch/arm/boot/dts/rda8810pl-orangepi-i96.dts | 50 ++ arch/arm/boot/dts/rda8810pl.dtsi | 99 +++ arch/arm/mach-rda/Kconfig | 9 + arch/arm/mach-rda/Makefile | 1 + drivers/clocksource/Kconfig | 8 + drivers/clocksource/Makefile | 1 + drivers/clocksource/timer-rda.c | 195 ++++ drivers/irqchip/Kconfig | 4 + drivers/irqchip/Makefile | 1 + drivers/irqchip/irq-rda-intc.c | 107 +++ drivers/tty/serial/Kconfig | 19 + drivers/tty/serial/Makefile | 1 + drivers/tty/serial/rda-uart.c | 831 ++++++++++++++++++ include/uapi/linux/serial_core.h | 3 + 25 files changed, 1522 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/rda.txt create mode 100644 Documentation/devicetree/bindings/interrupt-controller/rda,8810pl-intc.txt create mode 100644 Documentation/devicetree/bindings/serial/rda,8810pl-uart.txt create mode 100644 Documentation/devicetree/bindings/timer/rda,8810pl-timer.txt create mode 100644 arch/arm/boot/dts/rda8810pl-orangepi-2g-iot.dts create mode 100644 arch/arm/boot/dts/rda8810pl-orangepi-i96.dts create mode 100644 arch/arm/boot/dts/rda8810pl.dtsi create mode 100644 arch/arm/mach-rda/Kconfig create mode 100644 arch/arm/mach-rda/Makefile create mode 100644 drivers/clocksource/timer-rda.c create mode 100644 drivers/irqchip/irq-rda-intc.c create mode 100644 drivers/tty/serial/rda-uart.c -- 2.17.1