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[92.154.90.120]) by smtp.gmail.com with ESMTPSA id z17sm22268820wrv.2.2018.12.26.05.25.35 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Wed, 26 Dec 2018 05:25:35 -0800 (PST) From: Ard Biesheuvel To: edk2-devel@lists.01.org Date: Wed, 26 Dec 2018 14:25:27 +0100 Message-Id: <20181226132530.8445-1-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.19.2 MIME-Version: 1.0 Subject: [edk2] [PATCH edk2-platforms 0/3] synquacer multi-uart support X-BeenThere: edk2-devel@lists.01.org X-Mailman-Version: 2.1.29 Precedence: list List-Id: EDK II Development List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Errors-To: edk2-devel-bounces@lists.01.org Sender: "edk2-devel" Expose the secondary UART also via the ACPI tables (not just via the DT), and add conditional support for using it for DEBUG output in UEFI. Ard Biesheuvel (3): Silicon/SynQuacer/AcpiTables: don't use PCD for PL011 base Silicon/SynQuacer/AcpiTables: expose second UART to the OS Silicon/SynQuacer: add support for DEBUG output on second UART .../Socionext/DeveloperBox/DeveloperBox.dsc | 42 ++++++++++++++++--- .../SynQuacer/AcpiTables/AcpiTables.inf | 1 - .../SynQuacer/Include/Platform/MemoryMap.h | 8 ++++ .../SynQuacerMemoryInitPeiLib.c | 3 ++ .../Socionext/SynQuacer/AcpiTables/Dsdt.asl | 21 +++++++++- .../Socionext/SynQuacer/AcpiTables/Spcr.aslc | 3 +- 6 files changed, 70 insertions(+), 8 deletions(-) -- 2.19.2 _______________________________________________ edk2-devel mailing list edk2-devel@lists.01.org https://lists.01.org/mailman/listinfo/edk2-devel