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[209.132.180.131]) by mx.google.com with ESMTPS id e125si1879114pgc.201.2019.03.29.06.36.34 for (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 29 Mar 2019 06:36:34 -0700 (PDT) Received-SPF: pass (google.com: domain of libc-alpha-return-100995-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) client-ip=209.132.180.131; Authentication-Results: mx.google.com; dkim=pass header.i=@sourceware.org header.s=default header.b=DDKQCMp4; dkim=pass header.i=@linaro.org header.s=google header.b=T5cU940x; spf=pass (google.com: domain of libc-alpha-return-100995-patch=linaro.org@sourceware.org designates 209.132.180.131 as permitted sender) smtp.mailfrom="libc-alpha-return-100995-patch=linaro.org@sourceware.org"; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org DomainKey-Signature: a=rsa-sha1; c=nofws; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id; q=dns; s= default; b=UE1DmqtnW9DqxyUJZjTHvWnzre2jIvNYNm2xzncimr04gmS3Y5Zcv kwUZJN9NbcITDUx0Hrigyx2NL7GqKrb+6FKN3+SoEqfA5va8VmdcwhjHoYBhJWIW DObPrTMKNKxaJqYRzY3j9BOYidAoYVSvH3Xw/D/4XDFW4D4beYCGDg= DKIM-Signature: v=1; a=rsa-sha1; c=relaxed; d=sourceware.org; h=list-id :list-unsubscribe:list-subscribe:list-archive:list-post :list-help:sender:from:to:subject:date:message-id; s=default; bh=2j7pm7JyIhC7P3r7Ptej9nElp0g=; b=DDKQCMp4RJWVCrak+6xHCzSAHXSR yI4V1PiygB8HlDjI32ZzkdYTuIDQutdA++voa/gdh6XlkDvlBzZohw+MXMzbepg0 OVtjyeYonY0zybXhxY6Dnz/5WnrSCUT+sDOBwdVyzZ8u9TtyuI3RTBYNT2gJT2Aa hUCCfSDbtSKoNVs= Received: (qmail 118390 invoked by alias); 29 Mar 2019 13:35:44 -0000 Mailing-List: contact libc-alpha-help@sourceware.org; run by ezmlm Precedence: bulk List-Id: List-Unsubscribe: List-Subscribe: List-Archive: List-Post: List-Help: , Sender: libc-alpha-owner@sourceware.org Delivered-To: mailing list libc-alpha@sourceware.org Received: (qmail 118294 invoked by uid 89); 29 Mar 2019 13:35:43 -0000 Authentication-Results: sourceware.org; auth=none X-Spam-SWARE-Status: No, score=-15.2 required=5.0 tests=AWL, BAYES_00, GIT_PATCH_2, GIT_PATCH_3, RCVD_IN_DNSWL_NONE, SPF_PASS autolearn=ham version=3.3.1 spammy=UD:S, consolidate, fl, HX-HELO:sk:mail-vk X-HELO: mail-vk1-f193.google.com DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:subject:date:message-id; bh=3OFhLLlHQD0M7bbD3YOAWfdoWNZ8HxN8Zw6CJ89yFzM=; b=T5cU940xwjMYhdLd5j9UCXP30nN0qg3JBgVyS2U9jSM1Ft4uByteZD1kOrduc1Xreg Dt4V/5mWWjhvrjLDefDHQ/pse2jCigvaV3QzSctGiDJ6MGqWrNN3Y4mEBkqttd5i1iGx jPtSoClYxha2OqJKt64zsosJMmJ/tBIT9ZbMc8uVlcxT4sBvl0EWa8bQI3EAP18gO0PU oXlmM/qWJbd94CciYyWuemZ5MWbTM1RAnAreRISZy+7TiIey5AxoCJfPMiZIEMFewHMg SuXSfaTAxcTMoVdXgjKdarul2XLFgABLh8chlDLBXpOTB0238WrSN6nL/MqD9a1u6n40 84eA== Return-Path: From: Adhemerval Zanella To: libc-alpha@sourceware.org Subject: [PATCH 00/28] powerpc floating-point optimization refactor Date: Fri, 29 Mar 2019 10:35:01 -0300 Message-Id: <20190329133529.22523-1-adhemerval.zanella@linaro.org> This is a powerpc fpu refactor and simplification which consolidate some assembly optimization in C implementation (which similar performance result), remove some bloat optimizations which only add code complexity, refactor IFUNC selection to disable unnecessary selection on powercpc64le, and also optimize some symbols for powerpc64le ISA 2.07+. The idea is also to remove some build variation with different --with-cpu selection, more especially in implementation selection. The powerpc sysdeps selection is currently quite convoluted and complex, with many variations due --with-cpu, and with the three main ABIs sharing some rules. Worse, new chips/ISA only tend to make it worse and some chip-specific optimizations might not be beneficial for a newer version. My idea is to move powerpc64, or at least powerpc64le, more in the direction of x86_64 and s390x are moving: a baseline build without --with-cpu selection and IFUNC variation enable/disable based on compiler flags (indicate through pre-processor defines). This will simplify new chips addition (no more the need to add multiple implies folders), build baseline will have fewer sysdeps folder, and less possible variations that might be tested. Although I focused on optimizing it for powerpc64le, both powerpc and powerpc64 baselines builds results simplified code with optimized results. It also results in some binary size reduction for libm: $ size powerpc64-linux-gnu-master/math/libm.so text data bss dec hex filename 803010 18044 576 821630 c897e powerpc64-linux-gnu-master/math/libm.so $ size powerpc64-linux-gnu/math/libm.so text data bss dec hex filename 796094 17284 504 813882 c6b3a powerpc64-linux-gnu/math/libm.so $ size powerpc64le-linux-gnu-master/math/libm.so text data bss dec hex filename 1061284 2904 288 1064476 103e1c powerpc64le-linux-gnu-master/math/libm.so $ size powerpc64le-linux-gnu/math/libm.so text data bss dec hex filename 1048772 2512 264 1051548 100b9c powerpc64le-linux-gnu/math/libm.so For testing I tried to cover to different build option and optimization which the code might result in different code generation: - powerpc-linux-gnu - powerpc-linux-gnu and --with-cpu=power4 - powerpc-linux-gnu and --with-cpu=power5+ - powerpc-linux-gnu and --with-cpu=power7 - powerpc-linux-gnu and --with-cpu=power4 and --disable-arch - powerpc-linux-gnu and --with-cpu=power5+ and --disable-arch - powerpc-linux-gnu and --with-cpu=power7 and --disable-arch - powerpc64-linux-gnu - powerpc64le-linux-gnu - powerpc64le-linux-gnu and --disable-arch - powerpc64le-linux-gnu --with-cpu=power8 The compilers used are the one resulted from build-many-glibcs, which optimizes for default minumum cpus. Adhemerval Zanella (28): powerpc: Use generic fabs{f} implementations powerpc: fma using builtins powerpc: Remove power4 mpa optimization powerpc: ceil/ceilf refactor powerpc: floor/floorf refactor powerpc: round/roundf refactor powerpc: trunc/truncf refactor powerpc: generic nearbyint/nearbyintf powerpc: consolidate rint powerpc: copysign cleanup benchtests: Add isnan/isinf/isfinite benchmark math: Use wordsize-64 version for isnan powerpc: Remove optimized isnan math: Use wordsize-64 version for isinf powerpc: Remove optimized isinf math: Use wordsize-64 version for finite powerpc: Remove optimized finite powerpc: refactor powerpc64 lrint/lrintf/llrint/llrintf powerpc: Refactor powerpc32 lrint/lrintf/llrint/llrintf powerpc: Refactor powerpc64 lround/lroundf/llround/llroundf powerpc: Refactor powerpc32 lround/lroundf/llround/llroundf powerpc: Use generic e_expf benchtests: hypot benchmark powerpc: hypot refactor and optimization powerpc: Refactor modf{f} benchtests: Add logb{f} benchmark math: Use wordsize-64 version for s_logb powerpc: refactor logb{f,l} benchtests/Makefile | 5 +- benchtests/hypot-inputs | 16 + benchtests/isfinite-inputs | 21 ++ benchtests/isinf-inputs | 21 ++ benchtests/isnan-inputs | 21 ++ benchtests/logb-inputs | 11 + benchtests/logbf-inputs | 11 + sysdeps/ieee754/dbl-64/s_finite.c | 22 +- sysdeps/ieee754/dbl-64/s_isinf.c | 15 +- sysdeps/ieee754/dbl-64/s_isnan.c | 17 +- sysdeps/ieee754/dbl-64/s_logb.c | 61 ++-- sysdeps/ieee754/dbl-64/wordsize-64/s_finite.c | 43 --- sysdeps/ieee754/dbl-64/wordsize-64/s_isinf.c | 34 -- sysdeps/ieee754/dbl-64/wordsize-64/s_isnan.c | 40 --- sysdeps/ieee754/dbl-64/wordsize-64/s_logb.c | 47 --- sysdeps/powerpc/fpu/e_hypot.c | 96 ++---- sysdeps/powerpc/fpu/fenv_libc.h | 8 + sysdeps/powerpc/fpu/round_to_integer.h | 154 +++++++++ sysdeps/powerpc/fpu/s_ceil.c | 35 ++ sysdeps/powerpc/fpu/s_ceilf.c | 35 ++ sysdeps/powerpc/fpu/s_copysign.c | 32 ++ sysdeps/powerpc/fpu/s_copysignf.c | 28 ++ sysdeps/powerpc/fpu/s_fabs.S | 33 -- sysdeps/powerpc/fpu/s_fabsf.S | 1 - sysdeps/powerpc/fpu/s_floor.c | 35 ++ sysdeps/powerpc/fpu/s_floorf.c | 35 ++ sysdeps/powerpc/fpu/{s_fma.S => s_fma.c} | 12 +- sysdeps/powerpc/fpu/{s_fmaf.S => s_fmaf.c} | 12 +- sysdeps/powerpc/fpu/s_isnan.c | 62 ---- sysdeps/powerpc/fpu/s_isnanf.S | 1 - sysdeps/powerpc/{power7 => }/fpu/s_logb.c | 64 ++-- sysdeps/powerpc/{power7 => }/fpu/s_logbf.c | 44 ++- sysdeps/powerpc/{power7 => }/fpu/s_logbl.c | 47 ++- sysdeps/powerpc/fpu/s_lrintf.S | 1 - sysdeps/powerpc/fpu/s_lrintf.c | 1 + sysdeps/powerpc/{power5+ => }/fpu/s_modf.c | 17 +- sysdeps/powerpc/{power5+ => }/fpu/s_modff.c | 13 +- sysdeps/powerpc/fpu/s_nearbyint.c | 30 ++ sysdeps/powerpc/fpu/s_nearbyintf.c | 30 ++ sysdeps/powerpc/fpu/s_rint.c | 19 +- sysdeps/powerpc/fpu/s_rintf.c | 19 +- sysdeps/powerpc/fpu/s_round.c | 35 ++ sysdeps/powerpc/fpu/s_roundf.c | 35 ++ sysdeps/powerpc/fpu/s_trunc.c | 35 ++ sysdeps/powerpc/fpu/s_truncf.c | 35 ++ sysdeps/powerpc/power4/fpu/Makefile | 5 - sysdeps/powerpc/power4/fpu/mpa-arch.h | 56 ---- sysdeps/powerpc/power4/fpu/mpa.c | 214 ------------- sysdeps/powerpc/powerpc32/fpu/Makefile | 7 + sysdeps/powerpc/powerpc32/fpu/s_ceil.S | 76 ----- sysdeps/powerpc/powerpc32/fpu/s_ceilf.S | 76 ----- sysdeps/powerpc/powerpc32/fpu/s_copysign.S | 53 --- sysdeps/powerpc/powerpc32/fpu/s_copysignf.S | 1 - sysdeps/powerpc/powerpc32/fpu/s_floor.S | 76 ----- sysdeps/powerpc/powerpc32/fpu/s_floorf.S | 76 ----- sysdeps/powerpc/powerpc32/fpu/s_isnan.S | 57 ---- sysdeps/powerpc/powerpc32/fpu/s_llrint.c | 9 + sysdeps/powerpc/powerpc32/fpu/s_llrintf.c | 7 + sysdeps/powerpc/powerpc32/fpu/s_llround.c | 51 ++- sysdeps/powerpc/powerpc32/fpu/s_lrint.S | 40 --- sysdeps/powerpc/powerpc32/fpu/s_lrint.c | 40 +++ sysdeps/powerpc/powerpc32/fpu/s_lround.S | 123 ------- sysdeps/powerpc/powerpc32/fpu/s_lround.c | 77 +++++ sysdeps/powerpc/powerpc32/fpu/s_nearbyint.S | 80 ----- sysdeps/powerpc/powerpc32/fpu/s_nearbyintf.S | 79 ----- sysdeps/powerpc/powerpc32/fpu/s_rint.S | 69 ---- sysdeps/powerpc/powerpc32/fpu/s_rintf.S | 66 ---- sysdeps/powerpc/powerpc32/fpu/s_round.S | 97 ------ sysdeps/powerpc/powerpc32/fpu/s_roundf.S | 96 ------ sysdeps/powerpc/powerpc32/fpu/s_trunc.S | 83 ----- sysdeps/powerpc/powerpc32/fpu/s_truncf.S | 83 ----- .../powerpc32/power4/fpu/multiarch/Makefile | 26 +- .../power4/fpu/multiarch/s_ceil-power5+.S | 33 -- .../power4/fpu/multiarch/s_ceil-power5+.c | 3 + .../power4/fpu/multiarch/s_ceil-ppc32.S | 31 -- .../power4/fpu/multiarch/s_ceil-ppc32.c | 3 + .../power4/fpu/multiarch/s_ceilf-power5+.S | 26 -- .../power4/fpu/multiarch/s_ceilf-power5+.c | 3 + .../power4/fpu/multiarch/s_ceilf-ppc32.S | 27 -- .../power4/fpu/multiarch/s_ceilf-ppc32.c | 3 + .../power4/fpu/multiarch/s_copysign-power6.S | 33 -- .../power4/fpu/multiarch/s_copysign-ppc32.S | 34 -- .../power4/fpu/multiarch/s_copysign.c | 45 --- .../power4/fpu/multiarch/s_copysignf.c | 34 -- .../power4/fpu/multiarch/s_finite-power7.S | 33 -- .../power4/fpu/multiarch/s_finite-ppc32.c | 33 -- .../powerpc32/power4/fpu/multiarch/s_finite.c | 57 ---- .../power4/fpu/multiarch/s_finitef-ppc32.c | 31 -- .../power4/fpu/multiarch/s_finitef.c | 34 -- .../power4/fpu/multiarch/s_floor-power5+.S | 33 -- .../power4/fpu/multiarch/s_floor-power5+.c | 3 + .../power4/fpu/multiarch/s_floor-ppc32.S | 31 -- .../power4/fpu/multiarch/s_floor-ppc32.c | 3 + .../power4/fpu/multiarch/s_floorf-power5+.S | 26 -- .../power4/fpu/multiarch/s_floorf-power5+.c | 3 + .../power4/fpu/multiarch/s_floorf-ppc32.S | 27 -- .../power4/fpu/multiarch/s_floorf-ppc32.c | 3 + .../power4/fpu/multiarch/s_isinf-power7.S | 33 -- .../power4/fpu/multiarch/s_isinf-ppc32.c | 33 -- .../powerpc32/power4/fpu/multiarch/s_isinf.c | 50 --- .../power4/fpu/multiarch/s_isinff-ppc32.c | 31 -- .../powerpc32/power4/fpu/multiarch/s_isinff.c | 35 -- .../power4/fpu/multiarch/s_isnan-power5.S | 33 -- .../power4/fpu/multiarch/s_isnan-power6.S | 33 -- .../power4/fpu/multiarch/s_isnan-power7.S | 33 -- .../power4/fpu/multiarch/s_isnan-ppc32.S | 32 -- .../powerpc32/power4/fpu/multiarch/s_isnan.c | 56 ---- .../power4/fpu/multiarch/s_isnanf-power5.S | 28 -- .../power4/fpu/multiarch/s_isnanf-power6.S | 28 -- .../powerpc32/power4/fpu/multiarch/s_isnanf.c | 39 --- .../power4/fpu/multiarch/s_llrint-power6.S | 31 -- .../power4/fpu/multiarch/s_llrint-power6.c | 2 + .../power4/fpu/multiarch/s_llrint-ppc32.S | 31 -- .../power4/fpu/multiarch/s_llrint-ppc32.c | 2 + .../power4/fpu/multiarch/s_llrintf-power6.S | 26 -- .../power4/fpu/multiarch/s_llrintf-power6.c | 2 + .../power4/fpu/multiarch/s_llrintf-ppc32.S | 26 -- .../power4/fpu/multiarch/s_llrintf-ppc32.c | 2 + .../power4/fpu/multiarch/s_llround-power5+.S | 31 -- .../power4/fpu/multiarch/s_llround-power5+.c | 2 + .../power4/fpu/multiarch/s_llround-power6.S | 31 -- .../power4/fpu/multiarch/s_llround-power6.c | 2 + .../power4/fpu/multiarch/s_llround-ppc32.S | 31 -- .../power4/fpu/multiarch/s_llround-ppc32.c | 2 + .../power4/fpu/multiarch/s_logb-power7.c | 13 +- .../power4/fpu/multiarch/s_logbf-power7.c | 8 +- .../power4/fpu/multiarch/s_logbl-power7.c | 3 +- .../power4/fpu/multiarch/s_lrint-ppc32.S | 31 -- .../power4/fpu/multiarch/s_lrint-ppc32.c | 2 + .../power4/fpu/multiarch/s_lround-power5+.S | 33 -- .../power4/fpu/multiarch/s_lround-power5+.c | 2 + .../power4/fpu/multiarch/s_lround-ppc32.S | 31 -- .../power4/fpu/multiarch/s_lround-ppc32.c | 2 + .../power4/fpu/multiarch/s_modf-power5+.c | 13 +- .../power4/fpu/multiarch/s_modff-power5+.c | 9 +- .../power4/fpu/multiarch/s_round-power5+.S | 33 -- .../power4/fpu/multiarch/s_round-power5+.c | 3 + .../power4/fpu/multiarch/s_round-ppc32.S | 31 -- .../power4/fpu/multiarch/s_round-ppc32.c | 3 + .../power4/fpu/multiarch/s_roundf-power5+.S | 26 -- .../power4/fpu/multiarch/s_roundf-power5+.c | 3 + .../power4/fpu/multiarch/s_roundf-ppc32.S | 27 -- .../power4/fpu/multiarch/s_roundf-ppc32.c | 3 + .../power4/fpu/multiarch/s_trunc-power5+.S | 33 -- .../power4/fpu/multiarch/s_trunc-power5+.c | 3 + .../power4/fpu/multiarch/s_trunc-ppc32.S | 31 -- .../power4/fpu/multiarch/s_trunc-ppc32.c | 3 + .../power4/fpu/multiarch/s_truncf-power5+.S | 26 -- .../power4/fpu/multiarch/s_truncf-power5+.c | 3 + .../power4/fpu/multiarch/s_truncf-ppc32.S | 27 -- .../power4/fpu/multiarch/s_truncf-ppc32.c | 3 + .../powerpc/powerpc32/power4/fpu/s_llrint.S | 39 --- .../powerpc/powerpc32/power4/fpu/s_llrintf.S | 39 --- .../powerpc/powerpc32/power4/fpu/s_llround.S | 105 ------ .../powerpc/powerpc32/power4/fpu/s_llroundf.S | 1 - .../powerpc/powerpc32/power5+/fpu/s_ceil.S | 29 -- .../powerpc/powerpc32/power5+/fpu/s_ceilf.S | 30 -- .../powerpc/powerpc32/power5+/fpu/s_floor.S | 29 -- .../powerpc/powerpc32/power5+/fpu/s_floorf.S | 30 -- .../powerpc/powerpc32/power5+/fpu/s_llround.S | 53 --- .../powerpc32/power5+/fpu/s_llroundf.S | 1 - .../powerpc/powerpc32/power5+/fpu/s_lround.S | 51 --- .../powerpc/powerpc32/power5+/fpu/s_round.S | 29 -- .../powerpc/powerpc32/power5+/fpu/s_roundf.S | 30 -- .../powerpc/powerpc32/power5+/fpu/s_trunc.S | 29 -- .../powerpc/powerpc32/power5+/fpu/s_truncf.S | 30 -- .../powerpc/powerpc32/power5/fpu/s_isnan.S | 61 ---- .../powerpc/powerpc32/power5/fpu/s_isnanf.S | 45 --- .../powerpc/powerpc32/power6/fpu/s_copysign.S | 49 --- .../powerpc32/power6/fpu/s_copysignf.S | 1 - .../powerpc/powerpc32/power6/fpu/s_isnan.S | 61 ---- .../powerpc/powerpc32/power6/fpu/s_isnanf.S | 44 --- .../powerpc/powerpc32/power6/fpu/s_llrint.S | 39 --- .../powerpc/powerpc32/power6/fpu/s_llrintf.S | 39 --- .../powerpc/powerpc32/power6/fpu/s_llround.S | 53 --- .../powerpc/powerpc32/power6/fpu/s_llroundf.S | 1 - .../powerpc/powerpc32/power7/fpu/s_finite.S | 93 ------ .../powerpc/powerpc32/power7/fpu/s_finitef.S | 1 - .../powerpc/powerpc32/power7/fpu/s_isinf.S | 85 ----- .../powerpc/powerpc32/power7/fpu/s_isinff.S | 1 - .../powerpc/powerpc32/power7/fpu/s_isnan.S | 90 ------ .../powerpc/powerpc32/power7/fpu/s_isnanf.S | 1 - .../powerpc64/be/fpu/multiarch/Makefile | 65 ++++ .../be/fpu/multiarch/s_ceil-power5+.c | 3 + .../powerpc64/be/fpu/multiarch/s_ceil-ppc64.c | 3 + .../powerpc64/{ => be}/fpu/multiarch/s_ceil.c | 4 +- .../be/fpu/multiarch/s_ceilf-power5+.c | 3 + .../be/fpu/multiarch/s_ceilf-ppc64.c | 3 + .../{ => be}/fpu/multiarch/s_ceilf.c | 4 +- .../be/fpu/multiarch/s_floor-power5+.c | 3 + .../be/fpu/multiarch/s_floor-ppc64.c | 3 + .../{ => be}/fpu/multiarch/s_floor.c | 0 .../be/fpu/multiarch/s_floorf-power5+.c | 3 + .../be/fpu/multiarch/s_floorf-ppc64.c | 3 + .../{ => be}/fpu/multiarch/s_floorf.c | 0 .../be/fpu/multiarch/s_llrint-power6x.c | 2 + .../be/fpu/multiarch/s_llrint-power8.c | 2 + .../be/fpu/multiarch/s_llrint-ppc64.c | 2 + .../{ => be}/fpu/multiarch/s_llrint.c | 0 .../{ => be}/fpu/multiarch/s_llrintf.c | 0 .../be/fpu/multiarch/s_llround-power5+.c | 2 + .../be/fpu/multiarch/s_llround-power6x.c | 2 + .../be/fpu/multiarch/s_llround-power8.c | 2 + .../be/fpu/multiarch/s_llround-ppc64.c | 2 + .../{ => be}/fpu/multiarch/s_llround.c | 0 .../be/fpu/multiarch/s_llroundf-ppc64.c | 2 + .../{ => be}/fpu/multiarch/s_llroundf.c | 0 .../{ => be}/fpu/multiarch/s_logb-power7.c | 3 +- .../{ => be}/fpu/multiarch/s_logb-ppc64.c | 0 .../powerpc64/{ => be}/fpu/multiarch/s_logb.c | 0 .../{ => be}/fpu/multiarch/s_logbf-power7.c | 3 +- .../{ => be}/fpu/multiarch/s_logbf-ppc64.c | 0 .../{ => be}/fpu/multiarch/s_logbf.c | 0 .../{ => be}/fpu/multiarch/s_logbl-power7.c | 3 +- .../{ => be}/fpu/multiarch/s_logbl-ppc64.c | 0 .../{ => be}/fpu/multiarch/s_logbl.c | 0 .../{ => be}/fpu/multiarch/s_lrint.c | 0 .../{ => be}/fpu/multiarch/s_lround.c | 0 .../{ => be}/fpu/multiarch/s_modf-power5+.c | 3 +- .../{ => be}/fpu/multiarch/s_modf-ppc64.c | 0 .../powerpc64/{ => be}/fpu/multiarch/s_modf.c | 0 .../{ => be}/fpu/multiarch/s_modff-power5+.c | 3 +- .../{ => be}/fpu/multiarch/s_modff-ppc64.c | 0 .../{ => be}/fpu/multiarch/s_modff.c | 0 .../be/fpu/multiarch/s_round-power5+.c | 3 + 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-- .../powerpc64/fpu/multiarch/e_hypotf.c | 33 -- .../powerpc64/fpu/multiarch/s_ceil-power5+.S | 30 -- .../powerpc64/fpu/multiarch/s_ceil-ppc64.S | 30 -- .../powerpc64/fpu/multiarch/s_ceilf-power5+.S | 24 -- .../powerpc64/fpu/multiarch/s_ceilf-ppc64.S | 24 -- .../fpu/multiarch/s_copysign-power6.S | 32 -- .../fpu/multiarch/s_copysign-ppc64.S | 34 -- .../powerpc64/fpu/multiarch/s_copysign.c | 45 --- .../powerpc64/fpu/multiarch/s_copysignf.c | 34 -- .../powerpc64/fpu/multiarch/s_finite-power7.S | 32 -- .../powerpc64/fpu/multiarch/s_finite-power8.S | 32 -- .../powerpc64/fpu/multiarch/s_finite-ppc64.c | 34 -- .../powerpc64/fpu/multiarch/s_finite.c | 69 ---- .../powerpc64/fpu/multiarch/s_finitef-ppc64.c | 32 -- .../powerpc64/fpu/multiarch/s_finitef.c | 37 --- .../powerpc64/fpu/multiarch/s_floor-power5+.S | 30 -- .../powerpc64/fpu/multiarch/s_floor-ppc64.S | 30 -- .../fpu/multiarch/s_floorf-power5+.S | 24 -- .../powerpc64/fpu/multiarch/s_floorf-ppc64.S | 24 -- .../powerpc64/fpu/multiarch/s_isinf-power7.S | 32 -- .../powerpc64/fpu/multiarch/s_isinf-power8.S | 32 -- .../powerpc64/fpu/multiarch/s_isinf-ppc64.c | 33 -- .../powerpc/powerpc64/fpu/multiarch/s_isinf.c | 62 ---- .../powerpc64/fpu/multiarch/s_isinff-ppc64.c | 31 -- .../powerpc64/fpu/multiarch/s_isinff.c | 38 --- .../powerpc64/fpu/multiarch/s_isnan-power5.S | 32 -- .../powerpc64/fpu/multiarch/s_isnan-power6.S | 32 -- .../powerpc64/fpu/multiarch/s_isnan-power6x.S | 32 -- .../powerpc64/fpu/multiarch/s_isnan-power7.S | 32 -- .../powerpc64/fpu/multiarch/s_isnan-power8.S | 32 -- .../powerpc64/fpu/multiarch/s_isnan-ppc64.S | 36 --- .../powerpc/powerpc64/fpu/multiarch/s_isnan.c | 71 ---- .../powerpc64/fpu/multiarch/s_isnanf.c | 44 --- .../fpu/multiarch/s_llrint-power6x.S | 30 -- .../powerpc64/fpu/multiarch/s_llrint-power8.S | 30 -- .../powerpc64/fpu/multiarch/s_llrint-ppc64.S | 30 -- .../fpu/multiarch/s_llround-power5+.S | 31 -- .../fpu/multiarch/s_llround-power6x.S | 31 -- .../fpu/multiarch/s_llround-power8.S | 30 -- .../powerpc64/fpu/multiarch/s_llround-ppc64.S | 27 -- .../fpu/multiarch/s_llroundf-ppc64.S | 31 -- .../powerpc64/fpu/multiarch/s_round-power5+.S | 30 -- .../powerpc64/fpu/multiarch/s_round-ppc64.S | 30 -- .../fpu/multiarch/s_roundf-power5+.S | 24 -- .../powerpc64/fpu/multiarch/s_roundf-ppc64.S | 24 -- .../powerpc64/fpu/multiarch/s_trunc-power5+.S | 30 -- .../powerpc64/fpu/multiarch/s_trunc-ppc64.S | 30 -- .../fpu/multiarch/s_truncf-power5+.S | 24 -- .../powerpc64/fpu/multiarch/s_truncf-ppc64.S | 24 -- .../powerpc/powerpc64/fpu/multiarch/w_expf.c | 1 - sysdeps/powerpc/powerpc64/fpu/s_ceil.S | 65 ---- sysdeps/powerpc/powerpc64/fpu/s_ceilf.S | 67 ---- sysdeps/powerpc/powerpc64/fpu/s_copysign.S | 53 --- sysdeps/powerpc/powerpc64/fpu/s_copysignf.S | 1 - sysdeps/powerpc/powerpc64/fpu/s_floor.S | 65 ---- sysdeps/powerpc/powerpc64/fpu/s_floorf.S | 67 ---- sysdeps/powerpc/powerpc64/fpu/s_isnan.S | 56 ---- sysdeps/powerpc/powerpc64/fpu/s_llrint.S | 45 --- sysdeps/powerpc/powerpc64/fpu/s_llrint.c | 55 ++++ sysdeps/powerpc/powerpc64/fpu/s_llrintf.S | 1 - sysdeps/powerpc/powerpc64/fpu/s_llrintf.c | 1 + sysdeps/powerpc/powerpc64/fpu/s_llround.S | 86 ----- sysdeps/powerpc/powerpc64/fpu/s_llround.c | 83 +++++ sysdeps/powerpc/powerpc64/fpu/s_llroundf.S | 89 ----- sysdeps/powerpc/powerpc64/fpu/s_llroundf.c | 83 +++++ sysdeps/powerpc/powerpc64/fpu/s_lrint.S | 1 - sysdeps/powerpc/powerpc64/fpu/s_lrint.c | 1 + sysdeps/powerpc/powerpc64/fpu/s_lround.S | 1 - sysdeps/powerpc/powerpc64/fpu/s_lround.c | 1 + sysdeps/powerpc/powerpc64/fpu/s_lroundf.S | 1 - sysdeps/powerpc/powerpc64/fpu/s_lroundf.c | 1 + sysdeps/powerpc/powerpc64/fpu/s_nearbyint.S | 68 ---- sysdeps/powerpc/powerpc64/fpu/s_nearbyintf.S | 69 ---- sysdeps/powerpc/powerpc64/fpu/s_rint.S | 58 ---- sysdeps/powerpc/powerpc64/fpu/s_rintf.S | 57 ---- sysdeps/powerpc/powerpc64/fpu/s_round.S | 80 ----- sysdeps/powerpc/powerpc64/fpu/s_roundf.S | 82 ----- sysdeps/powerpc/powerpc64/fpu/s_trunc.S | 72 ----- sysdeps/powerpc/powerpc64/fpu/s_truncf.S | 74 ----- .../powerpc/powerpc64/power5+/fpu/s_ceil.S | 30 -- .../powerpc/powerpc64/power5+/fpu/s_ceilf.S | 31 -- .../powerpc/powerpc64/power5+/fpu/s_floor.S | 30 -- .../powerpc/powerpc64/power5+/fpu/s_floorf.S | 31 -- .../powerpc/powerpc64/power5+/fpu/s_llround.S | 56 ---- .../powerpc64/power5+/fpu/s_llroundf.S | 1 - .../powerpc/powerpc64/power5+/fpu/s_round.S | 30 -- .../powerpc/powerpc64/power5+/fpu/s_roundf.S | 31 -- .../powerpc/powerpc64/power5+/fpu/s_trunc.S | 30 -- .../powerpc/powerpc64/power5+/fpu/s_truncf.S | 31 -- .../powerpc/powerpc64/power5/fpu/s_isnan.S | 60 ---- .../powerpc/powerpc64/power6/fpu/s_copysign.S | 49 --- .../powerpc64/power6/fpu/s_copysignf.S | 1 - .../powerpc/powerpc64/power6/fpu/s_isnan.S | 59 ---- .../powerpc/powerpc64/power6x/fpu/s_isnan.S | 58 ---- .../powerpc/powerpc64/power6x/fpu/s_llrint.S | 42 --- .../powerpc/powerpc64/power6x/fpu/s_llround.S | 52 --- .../powerpc64/power6x/fpu/s_llroundf.S | 1 - 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