mbox series

[v3,00/14] dt-bindings: Cleanup of i.MX 8

Message ID 20200904152404.20636-1-krzk@kernel.org
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Series dt-bindings: Cleanup of i.MX 8 | expand

Message

Krzysztof Kozlowski Sept. 4, 2020, 3:23 p.m. UTC 
Hi Rob,

I am resending the series (v3) without actual changes.  You already
reviewed many of them.  I think that subsystem maintainers are hesitant
to pick them up, so maybe this could go via your tree (all of them)?

Changes against previous revisions are in individual patches.

Best regards,
Krzysztof


Krzysztof Kozlowski (14):
  dt-bindings: perf: fsl-imx-ddr: Add i.MX 8M compatibles
  dt-bindings: pwm: imx-pwm: Add i.MX 8M compatibles
  dt-bindings: serial: fsl-imx-uart: Add i.MX 8M compatibles
  dt-bindings: serial: fsl-lpuart: Fix compatible matching
  dt-bindings: watchdog: fsl-imx-wdt: Add i.MX 8M compatibles
  dt-bindings: reset: fsl,imx7-src: Add i.MX 8M compatibles
  dt-bindings: thermal: imx8mm-thermal: Add i.MX 8M Nano compatible
  dt-bindings: nvmem: imx-ocotp: Update i.MX 8M compatibles
  dt-bindings: mfd: rohm,bd71847-pmic: Correct clock properties
    requirements
  dt-bindings: interrupt-controller: fsl,irqsteer: Fix compatible
    matching
  dt-bindings: mtd: gpmi-nand: Add i.MX 8M compatibles
  dt-bindings: mtd: gpmi-nand: Fix matching of clocks on different SoCs
  dt-bindings: mtd: nand-controller: Fix matching with size-cells==1
  dt-bindings: clock: imx8m: Integrate duplicated i.MX 8M schemas

 .../bindings/clock/imx8m-clock.yaml           | 125 ++++++++++++++++++
 .../bindings/clock/imx8mm-clock.yaml          |  68 ----------
 .../bindings/clock/imx8mn-clock.yaml          |  70 ----------
 .../bindings/clock/imx8mp-clock.yaml          |  70 ----------
 .../bindings/clock/imx8mq-clock.yaml          |  72 ----------
 .../interrupt-controller/fsl,irqsteer.yaml    |   8 +-
 .../bindings/mfd/rohm,bd71847-pmic.yaml       |   9 +-
 .../devicetree/bindings/mtd/gpmi-nand.yaml    |  94 ++++++++++---
 .../bindings/mtd/nand-controller.yaml         |   5 +-
 .../devicetree/bindings/nvmem/imx-ocotp.yaml  |  38 +++---
 .../devicetree/bindings/perf/fsl-imx-ddr.yaml |  16 ++-
 .../devicetree/bindings/pwm/imx-pwm.yaml      |  14 +-
 .../bindings/reset/fsl,imx7-src.yaml          |  19 ++-
 .../bindings/serial/fsl-imx-uart.yaml         |   4 +
 .../bindings/serial/fsl-lpuart.yaml           |  17 ++-
 .../bindings/thermal/imx8mm-thermal.yaml      |  10 +-
 .../bindings/watchdog/fsl-imx-wdt.yaml        |  11 +-
 17 files changed, 303 insertions(+), 347 deletions(-)
 create mode 100644 Documentation/devicetree/bindings/clock/imx8m-clock.yaml
 delete mode 100644 Documentation/devicetree/bindings/clock/imx8mm-clock.yaml
 delete mode 100644 Documentation/devicetree/bindings/clock/imx8mn-clock.yaml
 delete mode 100644 Documentation/devicetree/bindings/clock/imx8mp-clock.yaml
 delete mode 100644 Documentation/devicetree/bindings/clock/imx8mq-clock.yaml

Comments

Rob Herring Sept. 4, 2020, 10:29 p.m. UTC | #1 
On Fri, Sep 4, 2020 at 9:25 AM Krzysztof Kozlowski <krzk@kernel.org> wrote:
>
> Most of Freescale/NXP GPMI device trees use size-cells==1 (even when
> actually not needed except few boards).  This fixes dtbs_check warnings
> like:
>
>     arch/arm64/boot/dts/freescale/imx8mm-beacon-kit.dt.yaml: nand-controller@33002000: #size-cells:0:0: 0 was expected
>
> Signed-off-by: Krzysztof Kozlowski <krzk@kernel.org>
> ---
>  Documentation/devicetree/bindings/mtd/nand-controller.yaml | 5 ++++-
>  1 file changed, 4 insertions(+), 1 deletion(-)
>
> diff --git a/Documentation/devicetree/bindings/mtd/nand-controller.yaml b/Documentation/devicetree/bindings/mtd/nand-controller.yaml
> index 40fc5b0b2b8c..0879e1108837 100644
> --- a/Documentation/devicetree/bindings/mtd/nand-controller.yaml
> +++ b/Documentation/devicetree/bindings/mtd/nand-controller.yaml
> @@ -34,7 +34,10 @@ properties:
>      const: 1
>
>    "#size-cells":
> -    const: 0
> +    description:
> +      Depends on your controller. Put zero unless you need a mapping between CS
> +      lines and dedicated memory regions.
> +    enum: [0, 1]

Humm, seems that was to describe partitions, but the expectation of
the nand binding is describing nand chips. It seems the nand chips are
never described and on 1 board even has partitions. I think you should
fix the dts to move 'partition@N' nodes under 'partitions' which is
preferred and needed if you ever describe nand chips. And then fix
'#size-cells' to be 0.

Rob
Rob Herring Sept. 14, 2020, 10:53 p.m. UTC | #2 
On Fri, Sep 04, 2020 at 05:23:50PM +0200, Krzysztof Kozlowski wrote:
> Hi Rob,
> 
> I am resending the series (v3) without actual changes.  You already
> reviewed many of them.  I think that subsystem maintainers are hesitant
> to pick them up, so maybe this could go via your tree (all of them)?
> 
> Changes against previous revisions are in individual patches.
> 
> Best regards,
> Krzysztof
> 
> 
> Krzysztof Kozlowski (14):
>   dt-bindings: perf: fsl-imx-ddr: Add i.MX 8M compatibles
>   dt-bindings: pwm: imx-pwm: Add i.MX 8M compatibles
>   dt-bindings: serial: fsl-imx-uart: Add i.MX 8M compatibles
>   dt-bindings: serial: fsl-lpuart: Fix compatible matching
>   dt-bindings: watchdog: fsl-imx-wdt: Add i.MX 8M compatibles
>   dt-bindings: reset: fsl,imx7-src: Add i.MX 8M compatibles
>   dt-bindings: thermal: imx8mm-thermal: Add i.MX 8M Nano compatible
>   dt-bindings: nvmem: imx-ocotp: Update i.MX 8M compatibles
>   dt-bindings: mfd: rohm,bd71847-pmic: Correct clock properties
>     requirements
>   dt-bindings: interrupt-controller: fsl,irqsteer: Fix compatible
>     matching
>   dt-bindings: mtd: gpmi-nand: Add i.MX 8M compatibles
>   dt-bindings: mtd: gpmi-nand: Fix matching of clocks on different SoCs
>   dt-bindings: mtd: nand-controller: Fix matching with size-cells==1
>   dt-bindings: clock: imx8m: Integrate duplicated i.MX 8M schemas

I've applied patches 1-11 and 14.

Rob