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([80.215.202.29]) by smtp.gmail.com with ESMTPSA id f126sm45616924wme.22.2017.01.18.06.20.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 18 Jan 2017 06:21:02 -0800 (PST) From: Benjamin Gaignard X-Google-Original-From: Benjamin Gaignard To: lee.jones@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, alexandre.torgue@st.com, devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, thierry.reding@gmail.com, linux-pwm@vger.kernel.org, jic23@kernel.org, knaack.h@gmx.de, lars@metafoo.de, pmeerw@pmeerw.net, linux-iio@vger.kernel.org, linux-arm-kernel@lists.infradead.org Subject: [PATCH v8 0/8] Add PWM and IIO timer drivers for STM32 Date: Wed, 18 Jan 2017 15:20:43 +0100 Message-Id: <1484749251-14445-1-git-send-email-benjamin.gaignard@st.com> X-Mailer: git-send-email 1.9.1 X-CRM114-Version: 20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 X-CRM114-CacheID: sfid-20170118_062124_799924_BD105B9D X-CRM114-Status: GOOD ( 18.55 ) X-Spam-Score: -2.7 (--) X-Spam-Report: SpamAssassin version 3.4.1 on bombadil.infradead.org summary: Content analysis details: (-2.7 points) pts rule name description ---- ---------------------- -------------------------------------------------- -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at http://www.dnswl.org/, low trust [2a00:1450:400c:c09:0:0:0:231 listed in] [list.dnswl.org] -0.0 SPF_PASS SPF: sender matches SPF record -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1% [score: 0.0000] 0.1 DKIM_SIGNED Message has a DKIM or DK signature, not necessarily valid -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from author's domain -0.1 DKIM_VALID Message has at least one valid DKIM or DK signature X-BeenThere: linux-arm-kernel@lists.infradead.org X-Mailman-Version: 2.1.21 Precedence: list List-Id: List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , Cc: linaro-kernel@lists.linaro.org, Benjamin Gaignard , arnaud.pouliquen@st.com, benjamin.gaignard@linaro.org, gerald.baeza@st.com, fabrice.gasnier@st.com MIME-Version: 1.0 Sender: "linux-arm-kernel" Errors-To: linux-arm-kernel-bounces+patch=linaro.org@lists.infradead.org version 8: - rebase on v4.10-rc4 - fix comments done by Thierry on PWM - reword "reg" parameter description - change kernel kernel in IIO ABI documentation version 7: - rebase on v4.10-rc2 - remove iio_device code from driver and keep only the trigger part version 6: - rename stm32-gptimer in stm32-timers. - change "st,stm32-gptimer" compatible to "st,stm32-timers". - modify "st,breakinput" parameter in pwm part. - split DT patch in 2 version 5: - fix comments done on version 4 - rebased on kernel 4.9-rc8 - change nodes names and re-order then by addresses version 4: - fix comments done on version 3 - don't use interrupts anymore in IIO timer - detect hardware capabilities at probe time to simplify binding version 3: - no change on mfd and pwm divers patches - add cross reference between bindings - change compatible to "st,stm32-timer-trigger" - fix attributes access rights - use string instead of int for master_mode and slave_mode - document device attributes in sysfs-bus-iio-timer-stm32 - update DT with the new compatible version 2: - keep only one compatible per driver - use DT parameters to describe hardware block configuration: - pwm channels, complementary output, counter size, break input - triggers accepted and create by IIO timers - change DT to limite use of reference to the node - interrupt is now in IIO timer driver - rename stm32-mfd-timer to stm32-timers (for general purpose timer) The following patches enable PWM and IIO Timer features for STM32 platforms. Those two features are mixed into the registers of the same hardware block (named general purpose timer) which lead to introduce a multifunctions driver on the top of them to be able to share the registers. In STM32f4 14 instances of timer hardware block exist, even if they all have the same register mapping they could have a different number of pwm channels and/or different triggers capabilities. We use various parameters in DT to describe the differences between hardware blocks The MFD (stm32-timers.c) takes care of clock and register mapping by using regmap. stm32_timers structure is provided to its sub-node to share those information. PWM driver is implemented into pwm-stm32.c. Depending of the instance we may have up to 4 channels, sometime with complementary outputs or 32 bits counter instead of 16 bits. Some hardware blocks may also have a break input function which allows to stop pwm depending of a level, defined in devicetree, on an external pin. IIO timer driver (stm32-timer-trigger.c and stm32-timer-trigger.h) define a list of hardware triggers usable by hardware blocks like ADC, DAC or other timers. The matrix of possible connections between blocks is quite complex so we use trigger names and is_stm32_iio_timer_trigger() function to be sure that triggers are valid and configure the IPs. At run time IIO timer hardware blocks can configure (through "master_mode" IIO device attribute) which internal signal (counter enable, reset, comparison block, etc...) is used to generate the trigger. Benjamin Gaignard (8): MFD: add bindings for STM32 Timers driver MFD: add STM32 Timers driver PWM: add pwm-stm32 DT bindings PWM: add PWM driver for STM32 plaftorm IIO: add bindings for STM32 timer trigger driver IIO: add STM32 timer trigger driver ARM: dts: stm32: add Timers driver for stm32f429 MCU ARM: dts: stm32: Enable pwm1 and pwm3 for stm32f469-disco .../ABI/testing/sysfs-bus-iio-timer-stm32 | 29 ++ .../bindings/iio/timer/stm32-timer-trigger.txt | 23 ++ .../devicetree/bindings/mfd/stm32-timers.txt | 46 +++ .../devicetree/bindings/pwm/pwm-stm32.txt | 35 ++ arch/arm/boot/dts/stm32f429.dtsi | 275 ++++++++++++++ arch/arm/boot/dts/stm32f469-disco.dts | 28 ++ drivers/iio/trigger/Kconfig | 9 + drivers/iio/trigger/Makefile | 1 + drivers/iio/trigger/stm32-timer-trigger.c | 342 ++++++++++++++++++ drivers/mfd/Kconfig | 11 + drivers/mfd/Makefile | 2 + drivers/mfd/stm32-timers.c | 80 +++++ drivers/pwm/Kconfig | 9 + drivers/pwm/Makefile | 1 + drivers/pwm/pwm-stm32.c | 398 +++++++++++++++++++++ include/linux/iio/timer/stm32-timer-trigger.h | 62 ++++ include/linux/mfd/stm32-timers.h | 71 ++++ 17 files changed, 1422 insertions(+) create mode 100644 Documentation/ABI/testing/sysfs-bus-iio-timer-stm32 create mode 100644 Documentation/devicetree/bindings/iio/timer/stm32-timer-trigger.txt create mode 100644 Documentation/devicetree/bindings/mfd/stm32-timers.txt create mode 100644 Documentation/devicetree/bindings/pwm/pwm-stm32.txt create mode 100644 drivers/iio/trigger/stm32-timer-trigger.c create mode 100644 drivers/mfd/stm32-timers.c create mode 100644 drivers/pwm/pwm-stm32.c create mode 100644 include/linux/iio/timer/stm32-timer-trigger.h create mode 100644 include/linux/mfd/stm32-timers.h -- 1.9.1 _______________________________________________ linux-arm-kernel mailing list linux-arm-kernel@lists.infradead.org http://lists.infradead.org/mailman/listinfo/linux-arm-kernel