Message ID | 1486492645-27803-1-git-send-email-peter.maydell@linaro.org |
---|---|
Headers | show |
Series | target-arm queue | expand |
On 7 February 2017 at 18:37, Peter Maydell <peter.maydell@linaro.org> wrote: > A random mix of items here, nothing very major. > > thanks > -- PMM > > > The following changes since commit d0dff238a87fa81393ed72754d4dc8b09e50b08b: > > Merge remote-tracking branch 'remotes/juanquintela/tags/migration/20170206' into staging (2017-02-07 15:29:26 +0000) > > are available in the git repository at: > > git://git.linaro.org/people/pmaydell/qemu-arm.git tags/pull-target-arm-20170207 > > for you to fetch changes up to 7727b832886fafbdec7299eb7773dc9071bf4cdd: > > stellaris: Use the 'unimplemented' device for parts we don't implement (2017-02-07 18:30:00 +0000) > > ---------------------------------------------------------------- > target-arm: > * new "unimplemented" device for stubbing out devices in a > system model so accesses can be logged > * stellaris: document the SoC memory map > * arm: create instruction syndromes for AArch32 data aborts > * arm: Correctly handle watchpoints for BE32 CPUs > * Fix Thumb-1 BE32 execution and disassembly > * arm: Add cfgend parameter for ARM CPU selection > * sd: sdhci: check data length during dma_memory_read > * aspeed: add a watchdog controller > * integratorcp: adding vmstate for save/restore Clang complains about unused functions; will squash in: @@ -997,7 +997,7 @@ static inline void gen_aa32_st##SUFF##_iss(DisasContext *s, \ TCGv_i32 a32, int index, \ ISSInfo issinfo) \ { \ - gen_aa32_st_i32(s, val, a32, index, OPC | s->be_data); \ + gen_aa32_st##SUFF(s, val, a32, index); \ disas_set_da_iss(s, OPC, issinfo | ISSIsWrite); \ } (which avoids the problem by having the _iss() versions of the function call the non-iss versions rather than duplicating their function body; seems like better code anyway.) thanks -- PMMdiff --git a/target/arm/translate.c b/target/arm/translate.c index a14f74c..4436d8f 100644 --- a/target/arm/translate.c +++ b/target/arm/translate.c @@ -982,7 +982,7 @@ static inline void gen_aa32_ld##SUFF##_iss(DisasContext *s, \ TCGv_i32 a32, int index, \ ISSInfo issinfo) \ { \ - gen_aa32_ld_i32(s, val, a32, index, OPC | s->be_data); \ + gen_aa32_ld##SUFF(s, val, a32, index); \ disas_set_da_iss(s, OPC, issinfo); \ }
Hi, Your series seems to have some coding style problems. See output below for more information: Type: series Subject: [Qemu-devel] [PULL 00/13] target-arm queue Message-id: 1486492645-27803-1-git-send-email-peter.maydell@linaro.org === TEST SCRIPT BEGIN === #!/bin/bash BASE=base n=1 total=$(git log --oneline $BASE.. | wc -l) failed=0 # Useful git options git config --local diff.renamelimit 0 git config --local diff.renames True commits="$(git log --format=%H --reverse $BASE..)" for c in $commits; do echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..." if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then failed=1 echo fi n=$((n+1)) done exit $failed === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu - [tag update] patchew/1486454676-29112-1-git-send-email-bharata@linux.vnet.ibm.com -> patchew/1486454676-29112-1-git-send-email-bharata@linux.vnet.ibm.com * [new tag] patchew/1486492645-27803-1-git-send-email-peter.maydell@linaro.org -> patchew/1486492645-27803-1-git-send-email-peter.maydell@linaro.org - [tag update] patchew/20170203160651.19917-1-dgilbert@redhat.com -> patchew/20170203160651.19917-1-dgilbert@redhat.com - [tag update] patchew/20170206112953.16993-1-berrange@redhat.com -> patchew/20170206112953.16993-1-berrange@redhat.com - [tag update] patchew/20170207135211.15870-1-marcandre.lureau@redhat.com -> patchew/20170207135211.15870-1-marcandre.lureau@redhat.com Switched to a new branch 'test' 42d6adc stellaris: Use the 'unimplemented' device for parts we don't implement 437dc39 hw/misc: New "unimplemented" sysbus device cf763a0 stellaris: Document memory map and which SoC devices are unimplemented f9d8179 target/arm: A32, T32: Create Instruction Syndromes for Data Aborts 9a7aa9e target/arm: Abstract out pbit/wbit tests in ARM ldr/str decode 9d362c5 arm: Correctly handle watchpoints for BE32 CPUs a454865 Fix Thumb-1 BE32 execution and disassembly. 753a1d2 target/arm: Add cfgend parameter for ARM CPU selection. 7ddb3c4 hw/arm/integratorcp: Support specifying features via -cpu 49b034d sd: sdhci: check data length during dma_memory_read 0ae81e4 aspeed: add a watchdog controller d7e9de5 wdt: Add Aspeed watchdog device model e677809 integratorcp: adding vmstate for save/restore === OUTPUT BEGIN === Checking PATCH 1/13: integratorcp: adding vmstate for save/restore... Checking PATCH 2/13: wdt: Add Aspeed watchdog device model... Checking PATCH 3/13: aspeed: add a watchdog controller... Checking PATCH 4/13: sd: sdhci: check data length during dma_memory_read... Checking PATCH 5/13: hw/arm/integratorcp: Support specifying features via -cpu... Checking PATCH 6/13: target/arm: Add cfgend parameter for ARM CPU selection.... Checking PATCH 7/13: Fix Thumb-1 BE32 execution and disassembly.... ERROR: code indent should never use tabs #44: FILE: include/disas/bfd.h:298: +#define INSN_ARM_BE32^I0x00010000$ total: 1 errors, 0 warnings, 77 lines checked Your patch has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. Checking PATCH 8/13: arm: Correctly handle watchpoints for BE32 CPUs... ERROR: space prohibited between function name and open parenthesis '(' #49: FILE: include/qom/cpu.h:200: + vaddr (*adjust_watchpoint_address)(CPUState *cpu, vaddr addr, int len); total: 1 errors, 0 warnings, 88 lines checked Your patch has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. Checking PATCH 9/13: target/arm: Abstract out pbit/wbit tests in ARM ldr/str decode... Checking PATCH 10/13: target/arm: A32, T32: Create Instruction Syndromes for Data Aborts... Checking PATCH 11/13: stellaris: Document memory map and which SoC devices are unimplemented... Checking PATCH 12/13: hw/misc: New "unimplemented" sysbus device... Checking PATCH 13/13: stellaris: Use the 'unimplemented' device for parts we don't implement... === OUTPUT END === Test command exited with code: 1 --- Email generated automatically by Patchew [http://patchew.org/]. Please send your feedback to patchew-devel@freelists.org