clk: sunxi-ng: enable SUNXI_CCU_MP for PRCM

Message ID 20170517212035.3100471-1-arnd@arndb.de
State Accepted
Commit f36afd38c5372a7cd5b363786fd62076c8b28427
Headers show

Commit Message

Arnd Bergmann May 17, 2017, 9:19 p.m.
The newly added PRCM CCU driver uses SUNXI_CCU_MP_WITH_MUX_GATE, which causes
a link error when no other driver enables SUNXI_CCU_MP:

drivers/clk/built-in.o:(.data+0x5c8c8): undefined reference to `ccu_mp_ops'

This adds an explicit 'select' statement for it.

Signed-off-by: Arnd Bergmann <arnd@arndb.de>

---
 drivers/clk/sunxi-ng/Kconfig | 1 +
 1 file changed, 1 insertion(+)

-- 
2.9.0

Comments

Chen-Yu Tsai May 18, 2017, 2:25 a.m. | #1
On Thu, May 18, 2017 at 5:19 AM, Arnd Bergmann <arnd@arndb.de> wrote:
> The newly added PRCM CCU driver uses SUNXI_CCU_MP_WITH_MUX_GATE, which causes

> a link error when no other driver enables SUNXI_CCU_MP:

>

> drivers/clk/built-in.o:(.data+0x5c8c8): undefined reference to `ccu_mp_ops'

>

> This adds an explicit 'select' statement for it.

>

> Signed-off-by: Arnd Bergmann <arnd@arndb.de>


Reviewed-by: Chen-Yu Tsai <wens@csie.org>
Maxime Ripard May 18, 2017, 6:49 a.m. | #2
On Thu, May 18, 2017 at 10:25:23AM +0800, Chen-Yu Tsai wrote:
> On Thu, May 18, 2017 at 5:19 AM, Arnd Bergmann <arnd@arndb.de> wrote:

> > The newly added PRCM CCU driver uses SUNXI_CCU_MP_WITH_MUX_GATE, which causes

> > a link error when no other driver enables SUNXI_CCU_MP:

> >

> > drivers/clk/built-in.o:(.data+0x5c8c8): undefined reference to `ccu_mp_ops'

> >

> > This adds an explicit 'select' statement for it.

> >

> > Signed-off-by: Arnd Bergmann <arnd@arndb.de>

> 

> Reviewed-by: Chen-Yu Tsai <wens@csie.org>


Applied, thanks!
Maxime

-- 
Maxime Ripard, Free Electrons
Embedded Linux and Kernel engineering
http://free-electrons.com

Patch

diff --git a/drivers/clk/sunxi-ng/Kconfig b/drivers/clk/sunxi-ng/Kconfig
index b0d551a8efe4..eb89c7801f00 100644
--- a/drivers/clk/sunxi-ng/Kconfig
+++ b/drivers/clk/sunxi-ng/Kconfig
@@ -156,6 +156,7 @@  config SUN8I_R_CCU
 	bool "Support for Allwinner SoCs' PRCM CCUs"
 	select SUNXI_CCU_DIV
 	select SUNXI_CCU_GATE
+	select SUNXI_CCU_MP
 	default MACH_SUN8I || (ARCH_SUNXI && ARM64)
 
 endif