From patchwork Thu May 18 17:24:33 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Will Deacon X-Patchwork-Id: 100113 Delivered-To: patch@linaro.org Received: by 10.140.96.100 with SMTP id j91csp825366qge; Thu, 18 May 2017 10:25:03 -0700 (PDT) X-Received: by 10.99.60.81 with SMTP id i17mr5660942pgn.183.1495128303213; Thu, 18 May 2017 10:25:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1495128303; cv=none; d=google.com; s=arc-20160816; b=jMmeJG75K7M2jXsMTqTy7jGuRuGm0MUAHeErpfU00UFMlJR7vU5aCbRqDVqV2ob4Kr EGcC4z2CcF7ZLYd1UnoITr+yt21aJAu0WttNYaneeofiGqcCCkG+uh7ckzKy5wymMkbN a71GKVxjEkqKsWnRLky5LYfVbtW4+z/X7eWulyjConRJCqwlOqrzECkPUnlKbriju7FU OtLOvKrhk/vqctPUQU9IP0tAhtSLeiOeH8b6K0qWxnO3jc4V3z3hgrxg6pzo4+BC2NvN HsCa68hcyOjNsT9NCLs0jtuexH5lRJogICkRou+wCmFe8B1GT/vpxPA0OQwPoFKWehek tDbA== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:references:in-reply-to:message-id:date :subject:cc:to:from:arc-authentication-results; bh=/ktp22+BngYhs3iGuD2IYIwUwDAU5V4W00gibrkKBX0=; b=lh2d9utcPCVXENvW7R2HSHc5m7X2BIheJvMOpm70YcFPOIDdyzN1xbUwlMaOUxxG5k 73rlF/HBRwhl3RkMQV9jjCS3g8XBygSAN+S/f05XTxCLPOgDyA4mMzfUQJRIt5ryMugI SyBqiPD5xEaehsED+O332gFHXV0haXY07jXP10yiPCR4XiMkTqpjQ4SR9NWydrW1IL2j 36SH8+4VUmQjN6wuvkV2a+F9S+oRy2x/MNbuNj4tKOeqFRKGcRYb2tCeYJvmzpuCNrrk NO/Q6Na9F/+OkN7gkUyodrMEJKxqJddPuRrjE8OgP8vVHy5SCkOKiZFF0Fr40Dn4BLAh AQwg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id s10si5810994pgc.166.2017.05.18.10.25.02; Thu, 18 May 2017 10:25:03 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S964781AbdERRYz (ORCPT + 25 others); Thu, 18 May 2017 13:24:55 -0400 Received: from foss.arm.com ([217.140.101.70]:34772 "EHLO foss.arm.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S934592AbdERRYg (ORCPT ); Thu, 18 May 2017 13:24:36 -0400 Received: from usa-sjc-imap-foss1.foss.arm.com (unknown [10.72.51.249]) by usa-sjc-mx-foss1.foss.arm.com (Postfix) with ESMTP id 651C91682; Thu, 18 May 2017 10:24:35 -0700 (PDT) Received: from edgewater-inn.cambridge.arm.com (usa-sjc-imap-foss1.foss.arm.com [10.72.51.249]) by usa-sjc-imap-foss1.foss.arm.com (Postfix) with ESMTPA id 35E6E3F41F; Thu, 18 May 2017 10:24:35 -0700 (PDT) Received: by edgewater-inn.cambridge.arm.com (Postfix, from userid 1000) id 0F3CE1AE3979; Thu, 18 May 2017 18:24:35 +0100 (BST) From: Will Deacon To: linux-arm-kernel@lists.infradead.org Cc: marc.zyngier@arm.com, mark.rutland@arm.com, kim.phillips@arm.com, tglx@linutronix.de, peterz@infradead.org, alexander.shishkin@linux.intel.com, robh@kernel.org, suzuki.poulose@arm.com, pawel.moll@arm.com, mathieu.poirier@linaro.org, mingo@redhat.com, linux-kernel@vger.kernel.org, Will Deacon Subject: [PATCH v3 5/5] dt-bindings: Document devicetree binding for ARM SPE Date: Thu, 18 May 2017 18:24:33 +0100 Message-Id: <1495128273-13941-6-git-send-email-will.deacon@arm.com> X-Mailer: git-send-email 2.1.4 In-Reply-To: <1495128273-13941-1-git-send-email-will.deacon@arm.com> References: <1495128273-13941-1-git-send-email-will.deacon@arm.com> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org This patch documents the devicetree binding in use for ARM SPE. Cc: Mark Rutland Cc: Rob Herring Signed-off-by: Will Deacon --- Documentation/devicetree/bindings/arm/spe-pmu.txt | 20 ++++++++++++++++++++ 1 file changed, 20 insertions(+) create mode 100644 Documentation/devicetree/bindings/arm/spe-pmu.txt -- 2.1.4 diff --git a/Documentation/devicetree/bindings/arm/spe-pmu.txt b/Documentation/devicetree/bindings/arm/spe-pmu.txt new file mode 100644 index 000000000000..93372f2a7df9 --- /dev/null +++ b/Documentation/devicetree/bindings/arm/spe-pmu.txt @@ -0,0 +1,20 @@ +* ARMv8.2 Statistical Profiling Extension (SPE) Performance Monitor Units (PMU) + +ARMv8.2 introduces the optional Statistical Profiling Extension for collecting +performance sample data using an in-memory trace buffer. + +** SPE Required properties: + +- compatible : should be one of: + "arm,statistical-profiling-extension-v1" + +- interrupts : Exactly 1 PPI must be listed. For heterogeneous systems where + SPE is only supported on a subset of the CPUs, please consult + the arm,gic-v3 binding for details on describing a PPI partition. + +** Example: + +spe-pmu { + compatible = "arm,statistical-profiling-extension-v1"; + interrupts = ; +};