[1/6] dt-bindings: mfd: Add hi6421v530 bindings

Message ID 20170526063518.21246-2-guodong.xu@linaro.org
State New
Headers show
Series
  • MFD: add driver for HiSilicon Hi6421v530 PMIC
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Commit Message

Guodong Xu May 26, 2017, 6:35 a.m.
DT bindings for hisilicon HI655x PMIC chip.

Signed-off-by: Guodong Xu <guodong.xu@linaro.org>

---
 .../bindings/mfd/hisilicon,hi6421v530.txt          | 25 ++++++++++++++++++++++
 1 file changed, 25 insertions(+)
 create mode 100644 Documentation/devicetree/bindings/mfd/hisilicon,hi6421v530.txt

-- 
2.10.2

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Comments

Rob Herring May 31, 2017, 6:07 p.m. | #1
On Fri, May 26, 2017 at 02:35:13PM +0800, Guodong Xu wrote:
> DT bindings for hisilicon HI655x PMIC chip.

> 

> Signed-off-by: Guodong Xu <guodong.xu@linaro.org>

> ---

>  .../bindings/mfd/hisilicon,hi6421v530.txt          | 25 ++++++++++++++++++++++

>  1 file changed, 25 insertions(+)

>  create mode 100644 Documentation/devicetree/bindings/mfd/hisilicon,hi6421v530.txt

> 

> diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hi6421v530.txt b/Documentation/devicetree/bindings/mfd/hisilicon,hi6421v530.txt

> new file mode 100644

> index 0000000..6ffe6f6

> --- /dev/null

> +++ b/Documentation/devicetree/bindings/mfd/hisilicon,hi6421v530.txt

> @@ -0,0 +1,25 @@

> +Hisilicon Hi6421v530 Power Management Integrated Circuit (PMIC)

> +

> +The hardware layout for access PMIC Hi6421v530 from AP SoC Hi3660.

> +Between PMIC Hi6421v530 and Hi3660, the physical signal channel is SSI.

> +We can use memory-mapped I/O to communicate.

> +

> ++----------------+             +-------------+

> +|                |             |             |

> +|    Hi3660      |   SSI bus   |  Hi6421v530 |

> +|                |-------------|             |

> +|                |(REGMAP_MMIO)|             |

> ++----------------+             +-------------+


regmap is a Linuxism and should not be part of the binding.

So there some sort of controller that generates SSI packets? based on 
MMIO addresses? That should be more fully described here. For example, 
the PMIC should probably be a child of the controller.
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Guodong Xu June 2, 2017, 9:01 a.m. | #2
On Thu, Jun 1, 2017 at 2:07 AM, Rob Herring <robh@kernel.org> wrote:
> On Fri, May 26, 2017 at 02:35:13PM +0800, Guodong Xu wrote:

>> DT bindings for hisilicon HI655x PMIC chip.

>>

>> Signed-off-by: Guodong Xu <guodong.xu@linaro.org>

>> ---

>>  .../bindings/mfd/hisilicon,hi6421v530.txt          | 25 ++++++++++++++++++++++

>>  1 file changed, 25 insertions(+)

>>  create mode 100644 Documentation/devicetree/bindings/mfd/hisilicon,hi6421v530.txt

>>

>> diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hi6421v530.txt b/Documentation/devicetree/bindings/mfd/hisilicon,hi6421v530.txt

>> new file mode 100644

>> index 0000000..6ffe6f6

>> --- /dev/null

>> +++ b/Documentation/devicetree/bindings/mfd/hisilicon,hi6421v530.txt

>> @@ -0,0 +1,25 @@

>> +Hisilicon Hi6421v530 Power Management Integrated Circuit (PMIC)

>> +

>> +The hardware layout for access PMIC Hi6421v530 from AP SoC Hi3660.

>> +Between PMIC Hi6421v530 and Hi3660, the physical signal channel is SSI.

>> +We can use memory-mapped I/O to communicate.

>> +

>> ++----------------+             +-------------+

>> +|                |             |             |

>> +|    Hi3660      |   SSI bus   |  Hi6421v530 |

>> +|                |-------------|             |

>> +|                |(REGMAP_MMIO)|             |

>> ++----------------+             +-------------+

>

> regmap is a Linuxism and should not be part of the binding.

>

> So there some sort of controller that generates SSI packets? based on

> MMIO addresses? That should be more fully described here. For example,

> the PMIC should probably be a child of the controller.


Hi, Rob

Thanks for review. I just sent v2 of this patchset, according to
review comments I got. In v2, I discarded this new binding file.
Actually, I extended the existing
Documentation/devicetree/bindings/mfd/hi6421.txt to make it support
v530. There is no regmap in that.

Yes, there is a controller to generate SSI packets. However that is
completely blind to main SoC. It's more MMIO.

-Guodong
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Patch hide | download patch | download mbox

diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hi6421v530.txt b/Documentation/devicetree/bindings/mfd/hisilicon,hi6421v530.txt
new file mode 100644
index 0000000..6ffe6f6
--- /dev/null
+++ b/Documentation/devicetree/bindings/mfd/hisilicon,hi6421v530.txt
@@ -0,0 +1,25 @@ 
+Hisilicon Hi6421v530 Power Management Integrated Circuit (PMIC)
+
+The hardware layout for access PMIC Hi6421v530 from AP SoC Hi3660.
+Between PMIC Hi6421v530 and Hi3660, the physical signal channel is SSI.
+We can use memory-mapped I/O to communicate.
+
++----------------+             +-------------+
+|                |             |             |
+|    Hi3660      |   SSI bus   |  Hi6421v530 |
+|                |-------------|             |
+|                |(REGMAP_MMIO)|             |
++----------------+             +-------------+
+
+Required properties:
+- compatible:           Should be "hisilicon,hi6421v530-pmic".
+- reg:                  Base address of PMIC on Hi3660 SoC.
+- interrupt-controller: Hi6421v530 has internal IRQs (has own IRQ domain).
+
+Example:
+	pmic: pmic@fff34000 {
+		compatible = "hisilicon,hi6421v530-pmic";
+		reg = <0x0 0xfff34000 0x0 0x1000>;
+		interrupt-controller;
+		#interrupt-cells = <2>;
+	}