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[209.132.180.67]) by mx.google.com with ESMTP id d83si30790270pfj.52.2017.05.25.23.35.57; Thu, 25 May 2017 23:35:57 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@linaro.org; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1163660AbdEZGfo (ORCPT + 7 others); Fri, 26 May 2017 02:35:44 -0400 Received: from mail-pf0-f170.google.com ([209.85.192.170]:36122 "EHLO mail-pf0-f170.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1163650AbdEZGfj (ORCPT ); Fri, 26 May 2017 02:35:39 -0400 Received: by mail-pf0-f170.google.com with SMTP id m17so2572903pfg.3 for ; Thu, 25 May 2017 23:35:39 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=7CcB9RKTfOzb8KzCcuBy6mzs91sw+vfK57RuHKWll2Y=; b=hK5qUvzP2zyqnzkXy8HPUjwntp5DPKPAq82+KT6X2kSRKjEFejmDy8eZer05yYdwgB PHqKHB297Spk91T41Ei9bSiqNHX3tT9JEheQz9eQ5r16vKLJxLxWEnQo4v2JV7lO10um 7WDZ5Wzf5yRnMmQt6zwARRF1W24pKnHqQtohY= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=7CcB9RKTfOzb8KzCcuBy6mzs91sw+vfK57RuHKWll2Y=; b=t3Lm1XwPC7ZbZ3/Xf/bBJR61+gqEMbBMg6SYUk/sNPXed8tolCwu6AZSHocxlFruFk obZ4zfDmMQRmXM7RFLXEV5bh7DO+BB4zLSw+amwxlXjMPcninJzkUBydxsOjpDGRefE/ XStQ4y4EFZn2SANwDyOZjXVh80f4kZyhBXOdhM/8hM58/TIvoxILYRMV467LRSQqmL64 AD7Qz9IUPeaiAOULDr3wo6nTZNybu9CnbL8nzXsUioDQSDQuCmfMnqK2wiwBJlOtteGT ANbTx2hHj98CN7OCykQZ4UWpvn98NKNIUPps8wrVp0P9eUMLESEgIdRzoPol7sDRCetV f86g== X-Gm-Message-State: AODbwcBHS6DIt6gdKIt54/DHzjuJP3Ej3r/McdkP5q6iE52S7/W9fKWc FbHckD6oJGMC8/LX X-Received: by 10.98.35.150 with SMTP id q22mr471410pfj.220.1495780539242; Thu, 25 May 2017 23:35:39 -0700 (PDT) Received: from docularxu-ThinkPad-T440p.219.146.1.66 ([45.56.159.222]) by smtp.gmail.com with ESMTPSA id j11sm11420635pgn.38.2017.05.25.23.35.31 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Thu, 25 May 2017 23:35:38 -0700 (PDT) From: Guodong Xu To: lee.jones@linaro.org, robh+dt@kernel.org, mark.rutland@arm.com, xuwei5@hisilicon.com, catalin.marinas@arm.com, will.deacon@arm.com, lgirdwood@gmail.com, broonie@kernel.org, khilman@baylibre.com, arnd@arndb.de, gregory.clement@free-electrons.com, olof@lixom.net, thomas.petazzoni@free-electrons.com, yamada.masahiro@socionext.com, riku.voipio@linaro.org, treding@nvidia.com, krzk@kernel.org, eric@anholt.net, damm+renesas@opensource.se, ard.biesheuvel@linaro.org, linus.walleij@linaro.org, geert+renesas@glider.be Cc: devicetree@vger.kernel.org, linux-kernel@vger.kernel.org, linux-arm-kernel@lists.infradead.org, hw.wangxiaoyin@hisilicon.com, Guodong Xu Subject: [PATCH 1/6] dt-bindings: mfd: Add hi6421v530 bindings Date: Fri, 26 May 2017 14:35:13 +0800 Message-Id: <20170526063518.21246-2-guodong.xu@linaro.org> X-Mailer: git-send-email 2.10.2 In-Reply-To: <20170526063518.21246-1-guodong.xu@linaro.org> References: <20170526063518.21246-1-guodong.xu@linaro.org> Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org DT bindings for hisilicon HI655x PMIC chip. Signed-off-by: Guodong Xu --- .../bindings/mfd/hisilicon,hi6421v530.txt | 25 ++++++++++++++++++++++ 1 file changed, 25 insertions(+) create mode 100644 Documentation/devicetree/bindings/mfd/hisilicon,hi6421v530.txt -- 2.10.2 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/Documentation/devicetree/bindings/mfd/hisilicon,hi6421v530.txt b/Documentation/devicetree/bindings/mfd/hisilicon,hi6421v530.txt new file mode 100644 index 0000000..6ffe6f6 --- /dev/null +++ b/Documentation/devicetree/bindings/mfd/hisilicon,hi6421v530.txt @@ -0,0 +1,25 @@ +Hisilicon Hi6421v530 Power Management Integrated Circuit (PMIC) + +The hardware layout for access PMIC Hi6421v530 from AP SoC Hi3660. +Between PMIC Hi6421v530 and Hi3660, the physical signal channel is SSI. +We can use memory-mapped I/O to communicate. + ++----------------+ +-------------+ +| | | | +| Hi3660 | SSI bus | Hi6421v530 | +| |-------------| | +| |(REGMAP_MMIO)| | ++----------------+ +-------------+ + +Required properties: +- compatible: Should be "hisilicon,hi6421v530-pmic". +- reg: Base address of PMIC on Hi3660 SoC. +- interrupt-controller: Hi6421v530 has internal IRQs (has own IRQ domain). + +Example: + pmic: pmic@fff34000 { + compatible = "hisilicon,hi6421v530-pmic"; + reg = <0x0 0xfff34000 0x0 0x1000>; + interrupt-controller; + #interrupt-cells = <2>; + }