[v2,1/3] firmware: qcom: scm: Expose secure IO service

Message ID 20170527063308.10483-1-bjorn.andersson@linaro.org
State New
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Series
  • [v2,1/3] firmware: qcom: scm: Expose secure IO service
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Commit Message

Bjorn Andersson May 27, 2017, 6:33 a.m.
The secure IO service provides operations for reading and writing secure
memory from non-secure mode, expose this API through SCM.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

---

Changes since v1:
- Correct scm-call return value handling
- Make scm_io_readl() return data by reference

 drivers/firmware/qcom_scm-32.c | 18 ++++++++++++++++++
 drivers/firmware/qcom_scm-64.c | 31 +++++++++++++++++++++++++++++++
 drivers/firmware/qcom_scm.c    | 12 ++++++++++++
 drivers/firmware/qcom_scm.h    |  6 ++++++
 include/linux/qcom_scm.h       |  4 ++++
 5 files changed, 71 insertions(+)

-- 
2.12.0

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Comments

Stephen Boyd May 31, 2017, 4:27 p.m. | #1
On 05/26, Bjorn Andersson wrote:
> In order to aid post-mortem debugging the Qualcomm platforms provides a

> "memory download mode", where the boot loader will provide an interface

> for custom tools to "download" the content of RAM to a host machine.

> 

> The mode is triggered by writing a magic value somehwere in RAM, that is

> read in the boot code path after a warm-restart. Two mechanism for

> setting this magic value are supported in modern platforms; a direct SCM

> call to enable the mode or through a secure io write of a magic value.

> 

> In order for a normal reboot not to trigger "download mode" the magic

> must be cleared during a clean reboot.

> 

> Download mode has to be enabled by including qcom_scm.download_mode=1 on

> the command line.


Why the kernel command line parameter? If we keep the kernel
command line param, perhaps we can also gain a config option to
make it default enabled or default disabled so that we don't have
to specify it on the commandline to get the feature all the time.

> 

> diff --git a/Documentation/devicetree/bindings/firmware/qcom,scm.txt b/Documentation/devicetree/bindings/firmware/qcom,scm.txt

> index 20f26fbce875..388817d1d00e 100644

> --- a/Documentation/devicetree/bindings/firmware/qcom,scm.txt

> +++ b/Documentation/devicetree/bindings/firmware/qcom,scm.txt

> @@ -18,6 +18,8 @@ Required properties:

>   * Core, iface, and bus clocks required for "qcom,scm"

>  - clock-names: Must contain "core" for the core clock, "iface" for the interface

>    clock and "bus" for the bus clock per the requirements of the compatible.

> +- qcom,dload-mode-addr: Specifies the address (2 cells) for the download mode

> +			magic (optional)


Was it decided that reg was improper? Or a phandle to a node that
has a reg property?

>  

>  Example for MSM8916:

>  

> diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c

> index e18d63935648..98f4747acddb 100644

> --- a/drivers/firmware/qcom_scm.c

> +++ b/drivers/firmware/qcom_scm.c

> @@ -19,6 +19,7 @@

>  #include <linux/cpumask.h>

>  #include <linux/export.h>

>  #include <linux/dma-mapping.h>

> +#include <linux/module.h>

>  #include <linux/types.h>

>  #include <linux/qcom_scm.h>

>  #include <linux/of.h>

> @@ -28,6 +29,9 @@

>  

>  #include "qcom_scm.h"

>  

> +static bool download_mode;

> +module_param(download_mode, bool, 0700);


0700? Not 0600? And what if we have it == 1 on the command line
and then write 0 at runtime with module param? Shouldn't we
handle that with a callback and turn off download mode there?
Otherwise when we reboot we will reboot into download mode?


> +

>  #define SCM_HAS_CORE_CLK	BIT(0)

>  #define SCM_HAS_IFACE_CLK	BIT(1)

>  #define SCM_HAS_BUS_CLK		BIT(2)

> @@ -365,6 +393,7 @@ static int qcom_scm_probe(struct platform_device *pdev)

>  	struct qcom_scm *scm;

>  	unsigned long clks;

>  	int ret;

> +	u64 val;

>  

>  	scm = devm_kzalloc(&pdev->dev, sizeof(*scm), GFP_KERNEL);

>  	if (!scm)

> @@ -418,9 +447,22 @@ static int qcom_scm_probe(struct platform_device *pdev)

>  

>  	__qcom_scm_init();

>  

> +	ret = of_property_read_u64(pdev->dev.of_node, "qcom,dload-mode-addr", &val);

> +	if (!ret)

> +		scm->dload_mode_addr = val;


How about:

	of_property_read_u64(pdev->dev.of_node, "qcom,dload-mode-addr",
			     &scm->dload_mode_addr)

> +

> +	if (download_mode)

> +		qcom_scm_set_download_mode(true);

> +

>  	return 0;

>  }

>  

> +void qcom_scm_shutdown(struct platform_device *pdev)


static?

> +{

> +	if (download_mode)

> +		qcom_scm_set_download_mode(false);

> +}

> +


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Stephen Boyd May 31, 2017, 4:28 p.m. | #2
On 05/26, Bjorn Andersson wrote:
> The secure IO service provides operations for reading and writing secure

> memory from non-secure mode, expose this API through SCM.

> 

> Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

> ---

> 

> Changes since v1:

> - Correct scm-call return value handling

> - Make scm_io_readl() return data by reference


I'm not sure we ever cared to check the return code of
read/write?

Reviewed-by: Stephen Boyd <sboyd@codeaurora.org>


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Patch hide | download patch | download mbox

diff --git a/drivers/firmware/qcom_scm-32.c b/drivers/firmware/qcom_scm-32.c
index 93e3b96b6dfa..11fdb1584823 100644
--- a/drivers/firmware/qcom_scm-32.c
+++ b/drivers/firmware/qcom_scm-32.c
@@ -596,3 +596,21 @@  int __qcom_scm_iommu_secure_ptbl_init(struct device *dev, u64 addr, u32 size,
 {
 	return -ENODEV;
 }
+
+int __qcom_scm_io_readl(struct device *dev, phys_addr_t addr,
+			unsigned int *val)
+{
+	int ret;
+
+	ret = qcom_scm_call_atomic1(QCOM_SCM_SVC_IO, QCOM_SCM_IO_READ, addr);
+	if (ret >= 0)
+		*val = ret;
+
+	return ret < 0 ? ret : 0;
+}
+
+int __qcom_scm_io_writel(struct device *dev, phys_addr_t addr, unsigned int val)
+{
+	return qcom_scm_call_atomic2(QCOM_SCM_SVC_IO, QCOM_SCM_IO_WRITE,
+				     addr, val);
+}
diff --git a/drivers/firmware/qcom_scm-64.c b/drivers/firmware/qcom_scm-64.c
index 6e6d561708e2..bf50fb59852e 100644
--- a/drivers/firmware/qcom_scm-64.c
+++ b/drivers/firmware/qcom_scm-64.c
@@ -439,3 +439,34 @@  int __qcom_scm_iommu_secure_ptbl_init(struct device *dev, u64 addr, u32 size,
 
 	return ret;
 }
+
+int __qcom_scm_io_readl(struct device *dev, phys_addr_t addr,
+			unsigned int *val)
+{
+	struct qcom_scm_desc desc = {0};
+	struct arm_smccc_res res;
+	int ret;
+
+	desc.args[0] = addr;
+	desc.arginfo = QCOM_SCM_ARGS(1);
+
+	ret = qcom_scm_call(dev, QCOM_SCM_SVC_IO, QCOM_SCM_IO_READ,
+			    &desc, &res);
+	if (ret >= 0)
+		*val = res.a1;
+
+	return ret < 0 ? ret : 0;
+}
+
+int __qcom_scm_io_writel(struct device *dev, phys_addr_t addr, unsigned int val)
+{
+	struct qcom_scm_desc desc = {0};
+	struct arm_smccc_res res;
+
+	desc.args[0] = addr;
+	desc.args[1] = val;
+	desc.arginfo = QCOM_SCM_ARGS(2);
+
+	return qcom_scm_call(dev, QCOM_SCM_SVC_IO, QCOM_SCM_IO_WRITE,
+			     &desc, &res);
+}
diff --git a/drivers/firmware/qcom_scm.c b/drivers/firmware/qcom_scm.c
index bb16510d75ba..e18d63935648 100644
--- a/drivers/firmware/qcom_scm.c
+++ b/drivers/firmware/qcom_scm.c
@@ -333,6 +333,18 @@  int qcom_scm_iommu_secure_ptbl_init(u64 addr, u32 size, u32 spare)
 }
 EXPORT_SYMBOL(qcom_scm_iommu_secure_ptbl_init);
 
+int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val)
+{
+	return __qcom_scm_io_readl(__scm->dev, addr, val);
+}
+EXPORT_SYMBOL(qcom_scm_io_readl);
+
+int qcom_scm_io_writel(phys_addr_t addr, unsigned int val)
+{
+	return __qcom_scm_io_writel(__scm->dev, addr, val);
+}
+EXPORT_SYMBOL(qcom_scm_io_writel);
+
 /**
  * qcom_scm_is_available() - Checks if SCM is available
  */
diff --git a/drivers/firmware/qcom_scm.h b/drivers/firmware/qcom_scm.h
index 9bea691f30fb..a60e4b9b1394 100644
--- a/drivers/firmware/qcom_scm.h
+++ b/drivers/firmware/qcom_scm.h
@@ -30,6 +30,12 @@  extern int __qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus);
 #define QCOM_SCM_CMD_CORE_HOTPLUGGED	0x10
 extern void __qcom_scm_cpu_power_down(u32 flags);
 
+#define QCOM_SCM_SVC_IO			0x5
+#define QCOM_SCM_IO_READ		0x1
+#define QCOM_SCM_IO_WRITE		0x2
+extern int __qcom_scm_io_readl(struct device *dev, phys_addr_t addr, unsigned int *val);
+extern int __qcom_scm_io_writel(struct device *dev, phys_addr_t addr, unsigned int val);
+
 #define QCOM_SCM_SVC_INFO		0x6
 #define QCOM_IS_CALL_AVAIL_CMD		0x1
 extern int __qcom_scm_is_call_available(struct device *dev, u32 svc_id,
diff --git a/include/linux/qcom_scm.h b/include/linux/qcom_scm.h
index e5380471c2cd..e8357f570695 100644
--- a/include/linux/qcom_scm.h
+++ b/include/linux/qcom_scm.h
@@ -43,6 +43,8 @@  extern int qcom_scm_set_remote_state(u32 state, u32 id);
 extern int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare);
 extern int qcom_scm_iommu_secure_ptbl_size(u32 spare, size_t *size);
 extern int qcom_scm_iommu_secure_ptbl_init(u64 addr, u32 size, u32 spare);
+extern int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val);
+extern int qcom_scm_io_writel(phys_addr_t addr, unsigned int val);
 #else
 static inline
 int qcom_scm_set_cold_boot_addr(void *entry, const cpumask_t *cpus)
@@ -73,5 +75,7 @@  qcom_scm_set_remote_state(u32 state,u32 id) { return -ENODEV; }
 static inline int qcom_scm_restore_sec_cfg(u32 device_id, u32 spare) { return -ENODEV; }
 static inline int qcom_scm_iommu_secure_ptbl_size(u32 spare, size_t *size) { return -ENODEV; }
 static inline int qcom_scm_iommu_secure_ptbl_init(u64 addr, u32 size, u32 spare) { return -ENODEV; }
+static inline int qcom_scm_io_readl(phys_addr_t addr, unsigned int *val) { return -ENODEV; }
+static inline int qcom_scm_io_writel(phys_addr_t addr, unsigned int val) { return -ENODEV; }
 #endif
 #endif