[v2,3/3] arm64: dts: qcom: Specify dload address for msm8916 and msm8996

Message ID 20170527063308.10483-3-bjorn.andersson@linaro.org
State New
Headers show
Series
  • [v2,1/3] firmware: qcom: scm: Expose secure IO service
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Commit Message

Bjorn Andersson May 27, 2017, 6:33 a.m.
On msm8916 and msm8996 boards a secure io-write is used to write the
magic for selecting "download mode", specify this address in the
DeviceTree.

Note that qcom_scm.download_mode=1 must be specified on the kernel
command line for the kernel to attempt selecting download mode.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>

---

Changes since v1:
- Add msm8916 to the patch

 arch/arm64/boot/dts/qcom/msm8916.dtsi | 2 ++
 arch/arm64/boot/dts/qcom/msm8996.dtsi | 2 ++
 2 files changed, 4 insertions(+)

-- 
2.12.0

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Comments

Bjorn Andersson May 31, 2017, 9:56 p.m. | #1
On Wed 31 May 09:30 PDT 2017, Stephen Boyd wrote:

> On 05/26, Bjorn Andersson wrote:

> > diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi

> > index ab3093995ded..33013835639d 100644

> > --- a/arch/arm64/boot/dts/qcom/msm8916.dtsi

> > +++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi

> > @@ -241,6 +241,8 @@

> >  			clocks = <&gcc GCC_CRYPTO_CLK>, <&gcc GCC_CRYPTO_AXI_CLK>, <&gcc GCC_CRYPTO_AHB_CLK>;

> >  			clock-names = "core", "bus", "iface";

> >  			#reset-cells = <1>;

> > +

> > +			qcom,dload-mode-addr = <0x0 0x193d100>;

> 

> This is TCSR, so why not a phandle to a node?

> 


That makes sense, the region is not mentioned in my documentation and I
didn't catch that it's in the middle of &tcsr. I'll update it to
reference the existing syscon.

Regards,
Bjorn
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Patch hide | download patch | download mbox

diff --git a/arch/arm64/boot/dts/qcom/msm8916.dtsi b/arch/arm64/boot/dts/qcom/msm8916.dtsi
index ab3093995ded..33013835639d 100644
--- a/arch/arm64/boot/dts/qcom/msm8916.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8916.dtsi
@@ -241,6 +241,8 @@ 
 			clocks = <&gcc GCC_CRYPTO_CLK>, <&gcc GCC_CRYPTO_AXI_CLK>, <&gcc GCC_CRYPTO_AHB_CLK>;
 			clock-names = "core", "bus", "iface";
 			#reset-cells = <1>;
+
+			qcom,dload-mode-addr = <0x0 0x193d100>;
 		};
 	};
 
diff --git a/arch/arm64/boot/dts/qcom/msm8996.dtsi b/arch/arm64/boot/dts/qcom/msm8996.dtsi
index 9bc9c857a000..7e64884ab7c7 100644
--- a/arch/arm64/boot/dts/qcom/msm8996.dtsi
+++ b/arch/arm64/boot/dts/qcom/msm8996.dtsi
@@ -261,6 +261,8 @@ 
 	firmware {
 		scm {
 			compatible = "qcom,scm-msm8996";
+
+			qcom,dload-mode-addr = <0x0 0x7b3000>;
 		};
 	};