From patchwork Wed Jun 7 21:27:26 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Suman Anna X-Patchwork-Id: 103317 Delivered-To: patch@linaro.org Received: by 10.140.91.77 with SMTP id y71csp2140733qgd; Wed, 7 Jun 2017 14:28:04 -0700 (PDT) X-Received: by 10.99.63.140 with SMTP id m134mr29701752pga.170.1496870883891; Wed, 07 Jun 2017 14:28:03 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1496870883; cv=none; d=google.com; s=arc-20160816; b=XQ5MLaDK1yLrUa3T7zKdmM5JXBcthKP/m6suBX8VCaWxyV3T/W9qrbH/8c+DAei8rY 57j4DcWBaRE8w0rbM01UPYPsXuGXbutzKMcFIPPUCdaDjFf7pcpknxieKw8Ao6rFUWHA sFkxYUc5mgukCIyQp80udrIarzxvwrp206UemPXuwbBnYJJYml/NpmAHfviDNChVqovX zt8CN5QJG3akZhFoga6YmWz+iX5Xans9zacSya3/BYtgqr12eTZ/FC6pZygwV6hZpD/j fMDzQwUuAhSg92t2dkpq5o7vtlFb7bFwT6PNEgb0wCZ238v0UQ6U4V4zznW3XpK1T317 prjg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=list-id:precedence:sender:mime-version:references:in-reply-to :message-id:date:subject:cc:to:from:dkim-signature :arc-authentication-results; bh=0vhcFLP/WnkN4uMu07Itnwgl2OsgFvv20l6MymtZTQs=; b=xg0rBclPhfgoiHhRl0ZY+za2DNyjZug53Ajky0+uw5L+BrcBkABA05N33KJ7gGZdd0 HEHn+yMqJiU81NsnSOyJ6OpRUxDy3K4GoaSl/1Xvz/MrHy91+Dogb5PxliApEkpaPTPO E1/YPSXCpIWeLg+lyVqpKjpPfFlN9p0B64Tk3897yAKpzPVG5gYnIw1strZgyhwUEb5v b5LEiynwr5elbsQ+fB1UrH+habzot1464BNGIXBQBZKG91t4+VVAAVm01S/t4AOiU8wB ZwN/yvPOEYG7gh5FWIwADr+/7qpDAzgEJvM5kIuAheADaLp9fL8weRj9VjnWY1AcRJu3 r2gw== ARC-Authentication-Results: i=1; mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Return-Path: Received: from vger.kernel.org (vger.kernel.org. [209.132.180.67]) by mx.google.com with ESMTP id h29si2737033pfa.290.2017.06.07.14.28.03; Wed, 07 Jun 2017 14:28:03 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=neutral (body hash did not verify) header.i=@ti.com; spf=pass (google.com: best guess record for domain of devicetree-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=devicetree-owner@vger.kernel.org; dmarc=fail (p=QUARANTINE sp=NONE dis=NONE) header.from=ti.com Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751512AbdFGV2B (ORCPT + 7 others); Wed, 7 Jun 2017 17:28:01 -0400 Received: from lelnx193.ext.ti.com ([198.47.27.77]:62916 "EHLO lelnx193.ext.ti.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751072AbdFGV2A (ORCPT ); Wed, 7 Jun 2017 17:28:00 -0400 Received: from dlelxv90.itg.ti.com ([172.17.2.17]) by lelnx193.ext.ti.com (8.15.1/8.15.1) with ESMTP id v57LRXuE029825; Wed, 7 Jun 2017 16:27:33 -0500 DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/simple; d=ti.com; s=ti-com-17Q1; t=1496870853; bh=Mp1Ede1L7EwcH5dAdStEhXeB5DKOyp6bywpIUdF/glo=; h=From:To:CC:Subject:Date:In-Reply-To:References; b=mdtWqcN2hn5FIyDqnJxwblxRtXvWlyqhwB862WeNBd7x3IzcQh2TOTzJEURx+nkR+ s8b7CWJwnlDTc5H2TNmE13Uw9RnJCBL0T+A6Anv8xum2LtWT8cXb0nR55HyKb9NaA0 SVxWKkmRVtsQwyHxhPAfcSqFXGwo3PTNPS0jX+DE= Received: from DLEE70.ent.ti.com (dlemailx.itg.ti.com [157.170.170.113]) by dlelxv90.itg.ti.com (8.14.3/8.13.8) with ESMTP id v57LRXjr010072; Wed, 7 Jun 2017 16:27:33 -0500 Received: from dflp33.itg.ti.com (10.64.6.16) by DLEE70.ent.ti.com (157.170.170.113) with Microsoft SMTP Server id 14.3.294.0; Wed, 7 Jun 2017 16:27:32 -0500 Received: from legion.dal.design.ti.com (legion.dal.design.ti.com [128.247.22.53]) by dflp33.itg.ti.com (8.14.3/8.13.8) with ESMTP id v57LRWVx025575; Wed, 7 Jun 2017 16:27:32 -0500 Received: from localhost (irmo.dhcp.ti.com [128.247.58.167]) by legion.dal.design.ti.com (8.11.7p1+Sun/8.11.7) with ESMTP id v57LRW307106; Wed, 7 Jun 2017 16:27:32 -0500 (CDT) From: Suman Anna To: Tony Lindgren CC: Tero Kristo , Lokesh Vutla , Subhajit Paul , , , , Suman Anna Subject: [PATCH 2/6] ARM: dts: omap54xx-clocks: Set IVA DPLL and its output clock rates Date: Wed, 7 Jun 2017 16:27:26 -0500 Message-ID: <20170607212730.33002-3-s-anna@ti.com> X-Mailer: git-send-email 2.12.0 In-Reply-To: <20170607212730.33002-1-s-anna@ti.com> References: <20170607212730.33002-1-s-anna@ti.com> MIME-Version: 1.0 Sender: devicetree-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: devicetree@vger.kernel.org The IVA DPLL is not an essential DPLL for the functionality of a bootloader and is usually not configured (e.g. older u-boots configure it only if CONFIG_SYS_CLOCKS_ENABLE_ALL is enabled and u-boots newer than 2014.01 do not even have an option), and this results in incorrect operating frequencies when trying to use a DSP or IVAHD, whose root clocks are derived from this DPLL. Use the DT standard properties "assigned-clocks" and "assigned-clock-rates" to set the IVA DPLL clock rate and the rates for its derivative clocks at boot time to properly initialize/lock this DPLL. The DPLL will automatically transition into a low-power stop mode when the associated output clocks are not utilized or gated automatically. The reset values of the dividers H11 & H12 (functional clocks for DSP and IVAHD respectively) are identical to each other, but are different at each OPP. The reset values also do not match a specific OPP. So, the derived output clocks from the IVA DPLL have to be initialized as well to avoid initializing these divider outputs to incorrect frequencies. The clock rates are chosen based on the OPP_NOM values as defined in the OMAP5432 SR2.0 Data Manual Book vK, section 5.2.3.5 "DPLL_IVA Preferred Settings". The recommended maximum DPLL locked frequency is 2330 MHz for OPP_NOM (value for DPLL_IVA_X2_CLK), so the dpll_iva_ck clock rate used is half of this value. The value 465.92 MHz is used instead of 465.9 MHz for dpll_iva_h11x2_ck so that proper divider value can be calculated. Signed-off-by: Suman Anna --- arch/arm/boot/dts/omap54xx-clocks.dtsi | 6 ++++++ 1 file changed, 6 insertions(+) -- 2.12.0 -- To unsubscribe from this list: send the line "unsubscribe devicetree" in the body of a message to majordomo@vger.kernel.org More majordomo info at http://vger.kernel.org/majordomo-info.html diff --git a/arch/arm/boot/dts/omap54xx-clocks.dtsi b/arch/arm/boot/dts/omap54xx-clocks.dtsi index 4899c2359d0a..529193442620 100644 --- a/arch/arm/boot/dts/omap54xx-clocks.dtsi +++ b/arch/arm/boot/dts/omap54xx-clocks.dtsi @@ -315,6 +315,8 @@ compatible = "ti,omap4-dpll-clock"; clocks = <&sys_clkin>, <&dpll_iva_byp_mux>; reg = <0x01a0>, <0x01a4>, <0x01ac>, <0x01a8>; + assigned-clocks = <&dpll_iva_ck>; + assigned-clock-rates = <1165000000>; }; dpll_iva_x2_ck: dpll_iva_x2_ck { @@ -330,6 +332,8 @@ ti,max-div = <63>; reg = <0x01b8>; ti,index-starts-at-one; + assigned-clocks = <&dpll_iva_h11x2_ck>; + assigned-clock-rates = <465920000>; }; dpll_iva_h12x2_ck: dpll_iva_h12x2_ck@1bc { @@ -339,6 +343,8 @@ ti,max-div = <63>; reg = <0x01bc>; ti,index-starts-at-one; + assigned-clocks = <&dpll_iva_h12x2_ck>; + assigned-clock-rates = <388300000>; }; mpu_dpll_hs_clk_div: mpu_dpll_hs_clk_div {