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[209.132.180.67]) by mx.google.com with ESMTP id m11si9340618pgc.389.2017.06.10.09.23.14; Sat, 10 Jun 2017 09:23:14 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752070AbdFJQXO (ORCPT + 1 other); Sat, 10 Jun 2017 12:23:14 -0400 Received: from mail-wr0-f172.google.com ([209.85.128.172]:35838 "EHLO mail-wr0-f172.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1751958AbdFJQXN (ORCPT ); Sat, 10 Jun 2017 12:23:13 -0400 Received: by mail-wr0-f172.google.com with SMTP id q97so58889441wrb.2 for ; Sat, 10 Jun 2017 09:23:12 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=aE9Od/9BxzamDalJm7nnhdadu27YvYhEbdwO1+WJl58=; b=RN5z79jt6lpY1+umNooamZeLEifXZOJZKsguExDsruZqyX68GxOoXp6Y/emo77AgU2 YDfQgtpdyVStV9KSBT43c9kvmJ+eBvIYH8pFrSY/6+2a3SmWzSvy045FdLNfuyoAaGTr Lu0/mUTSdJh1MKfGDiInUcHTTcyRwe+T9cgvc= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=aE9Od/9BxzamDalJm7nnhdadu27YvYhEbdwO1+WJl58=; b=Oisk5/4uwi8ewhzatimedV5VYbVlxIMWmdTSzPGYdydDx7Zu8ybo98bHeEpxXGue0i TxYqGdJ87x0x/cwtpoJx3K9w0RtSG3fWlooy7jxnfijPy4kQCRE8nfYxCpGS6/Ge1K14 8XKGeERXWeXOuWWTYWmRZI+j/sVOLjjUvN+gJAZQpMy11MfrwLg3xSmq7bQubEq/Hwbl Ois4w/jwLw2z3DM8QhfXx/m4pxht4mnBFO9u4Bwo7TI9HcypaHLJVfsJ8URDbakyOUXY EEI1JG8rkQPyI81RM1xLEYwbK2PI/4UrsMQsAW9MryOy8B4RBHp+0uN2e64isw78u+ag Apng== X-Gm-Message-State: AKS2vOyI9o0nn4u+JjyqEZBeo1yHL71QxIsKh9SM+KUViAu5Fdk1ZLRh w8GjUG4JgG1Xw9sE8fcPkA== X-Received: by 10.28.27.76 with SMTP id b73mr3228424wmb.120.1497111791506; Sat, 10 Jun 2017 09:23:11 -0700 (PDT) Received: from localhost.localdomain ([160.165.120.116]) by smtp.gmail.com with ESMTPSA id k35sm4440181wre.9.2017.06.10.09.23.09 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 10 Jun 2017 09:23:10 -0700 (PDT) From: Ard Biesheuvel To: linux-crypto@vger.kernel.org, herbert@gondor.apana.org.au, linux-arm-kernel@lists.infradead.org, catalin.marinas@arm.com, will.deacon@arm.com, dave.martin@arm.com Cc: Ard Biesheuvel Subject: [PATCH 03/12] crypto: arm64/crct10dif - add non-SIMD generic fallback Date: Sat, 10 Jun 2017 16:22:49 +0000 Message-Id: <1497111778-4210-4-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1497111778-4210-1-git-send-email-ard.biesheuvel@linaro.org> References: <1497111778-4210-1-git-send-email-ard.biesheuvel@linaro.org> Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org The arm64 kernel will shortly disallow nested kernel mode NEON, so add a fallback to scalar C code that can be invoked in that case. Signed-off-by: Ard Biesheuvel --- arch/arm64/crypto/crct10dif-ce-glue.c | 13 +++++++++---- 1 file changed, 9 insertions(+), 4 deletions(-) -- 2.7.4 diff --git a/arch/arm64/crypto/crct10dif-ce-glue.c b/arch/arm64/crypto/crct10dif-ce-glue.c index 60cb590c2590..96f0cae4a022 100644 --- a/arch/arm64/crypto/crct10dif-ce-glue.c +++ b/arch/arm64/crypto/crct10dif-ce-glue.c @@ -1,7 +1,7 @@ /* * Accelerated CRC-T10DIF using arm64 NEON and Crypto Extensions instructions * - * Copyright (C) 2016 Linaro Ltd + * Copyright (C) 2016 - 2017 Linaro Ltd * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -18,6 +18,7 @@ #include #include +#include #define CRC_T10DIF_PMULL_CHUNK_SIZE 16U @@ -48,9 +49,13 @@ static int crct10dif_update(struct shash_desc *desc, const u8 *data, } if (length > 0) { - kernel_neon_begin_partial(14); - *crc = crc_t10dif_pmull(*crc, data, length); - kernel_neon_end(); + if (may_use_simd()) { + kernel_neon_begin(); + *crc = crc_t10dif_pmull(*crc, data, length); + kernel_neon_end(); + } else { + *crc = crc_t10dif_generic(*crc, data, length); + } } return 0;