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[209.132.180.67]) by mx.google.com with ESMTP id m11si9340618pgc.389.2017.06.10.09.23.19; Sat, 10 Jun 2017 09:23:19 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org; spf=pass (google.com: best guess record for domain of linux-crypto-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-crypto-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1751958AbdFJQXS (ORCPT + 1 other); Sat, 10 Jun 2017 12:23:18 -0400 Received: from mail-wr0-f181.google.com ([209.85.128.181]:34835 "EHLO mail-wr0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752144AbdFJQXR (ORCPT ); Sat, 10 Jun 2017 12:23:17 -0400 Received: by mail-wr0-f181.google.com with SMTP id q97so58890402wrb.2 for ; Sat, 10 Jun 2017 09:23:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=9Ya/sYOTgTER6xd/QF5C2mX/Hr3cZ/QXRNZQ20+oWtY=; b=WXbaQPLVKJr58dCXndUKWKHPpselWCyRGnz88dNvG4yD932PO90mpjce0S9tTtzKOX EsSAp6uslOfEuU/bfzC7eh9bXpWs7fLpJEhG2nIcnK1hQjhU9S+UUkqRkjl8aRxmKclX P+RDVjwxbbdFwPl/RFEq/BhN9MxZWLaU70Bx0= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=9Ya/sYOTgTER6xd/QF5C2mX/Hr3cZ/QXRNZQ20+oWtY=; b=oKEZfNUkJOSA8jBlMfVBn2mNvZvf79VjleLfhUntLqPP/04RPdfltzKG87ITvYlWg0 hV28l6c/0dOgjw4BPEf/OWnfkQWaaQ5/MbtQVZ9XwEbHWhAJKv3QuMxV+kd/aD7AJlmT enF+tBquXEzdKXLlDHhNqFPpjbvrvEYWyeYaxdjqu/NB7E8sxvxCKsQDlrCwYgI4qN+6 2ILaT9NLu0vOOIRNEd+LBv1ntsbpDP35NE6KeXfnDFOBBrppg6UC4zTKlrHZSK3o4wme 1xovGgiOSGZrp4u2bYTtbqk4i6qhLWGcnugMsWSQbQxcwOcRAdsjwi8m73+Wu64Zotk+ FV8A== X-Gm-Message-State: AODbwcC7qHaiUhd41eBG5mvPHlvdPDYjlTLMITTERCgGTtblU2U8xav+ ds5djJuysJjJvGmn9jkolA== X-Received: by 10.223.174.194 with SMTP id y60mr2696242wrc.155.1497111795919; Sat, 10 Jun 2017 09:23:15 -0700 (PDT) Received: from localhost.localdomain ([160.165.120.116]) by smtp.gmail.com with ESMTPSA id k35sm4440181wre.9.2017.06.10.09.23.13 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Sat, 10 Jun 2017 09:23:15 -0700 (PDT) From: Ard Biesheuvel To: linux-crypto@vger.kernel.org, herbert@gondor.apana.org.au, linux-arm-kernel@lists.infradead.org, catalin.marinas@arm.com, will.deacon@arm.com, dave.martin@arm.com Cc: Ard Biesheuvel Subject: [PATCH 05/12] crypto: arm64/sha1-ce - add non-SIMD generic fallback Date: Sat, 10 Jun 2017 16:22:51 +0000 Message-Id: <1497111778-4210-6-git-send-email-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1497111778-4210-1-git-send-email-ard.biesheuvel@linaro.org> References: <1497111778-4210-1-git-send-email-ard.biesheuvel@linaro.org> Sender: linux-crypto-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-crypto@vger.kernel.org The arm64 kernel will shortly disallow nested kernel mode NEON, so add a fallback to scalar C code that can be invoked in that case. Signed-off-by: Ard Biesheuvel --- arch/arm64/crypto/Kconfig | 3 ++- arch/arm64/crypto/sha1-ce-glue.c | 18 ++++++++++++++---- 2 files changed, 16 insertions(+), 5 deletions(-) -- 2.7.4 diff --git a/arch/arm64/crypto/Kconfig b/arch/arm64/crypto/Kconfig index 7d75a363e317..5d5953545dad 100644 --- a/arch/arm64/crypto/Kconfig +++ b/arch/arm64/crypto/Kconfig @@ -18,8 +18,9 @@ config CRYPTO_SHA512_ARM64 config CRYPTO_SHA1_ARM64_CE tristate "SHA-1 digest algorithm (ARMv8 Crypto Extensions)" - depends on ARM64 && KERNEL_MODE_NEON + depends on KERNEL_MODE_NEON select CRYPTO_HASH + select CRYPTO_SHA1 config CRYPTO_SHA2_ARM64_CE tristate "SHA-224/SHA-256 digest algorithm (ARMv8 Crypto Extensions)" diff --git a/arch/arm64/crypto/sha1-ce-glue.c b/arch/arm64/crypto/sha1-ce-glue.c index aefda9868627..058cbe299dd6 100644 --- a/arch/arm64/crypto/sha1-ce-glue.c +++ b/arch/arm64/crypto/sha1-ce-glue.c @@ -1,7 +1,7 @@ /* * sha1-ce-glue.c - SHA-1 secure hash using ARMv8 Crypto Extensions * - * Copyright (C) 2014 Linaro Ltd + * Copyright (C) 2014 - 2017 Linaro Ltd * * This program is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License version 2 as @@ -9,6 +9,7 @@ */ #include +#include #include #include #include @@ -37,8 +38,11 @@ static int sha1_ce_update(struct shash_desc *desc, const u8 *data, { struct sha1_ce_state *sctx = shash_desc_ctx(desc); + if (!may_use_simd()) + return crypto_sha1_update(desc, data, len); + sctx->finalize = 0; - kernel_neon_begin_partial(16); + kernel_neon_begin(); sha1_base_do_update(desc, data, len, (sha1_block_fn *)sha1_ce_transform); kernel_neon_end(); @@ -57,13 +61,16 @@ static int sha1_ce_finup(struct shash_desc *desc, const u8 *data, ASM_EXPORT(sha1_ce_offsetof_finalize, offsetof(struct sha1_ce_state, finalize)); + if (!may_use_simd()) + return crypto_sha1_finup(desc, data, len, out); + /* * Allow the asm code to perform the finalization if there is no * partial data and the input is a round multiple of the block size. */ sctx->finalize = finalize; - kernel_neon_begin_partial(16); + kernel_neon_begin(); sha1_base_do_update(desc, data, len, (sha1_block_fn *)sha1_ce_transform); if (!finalize) @@ -76,8 +83,11 @@ static int sha1_ce_final(struct shash_desc *desc, u8 *out) { struct sha1_ce_state *sctx = shash_desc_ctx(desc); + if (!may_use_simd()) + return crypto_sha1_finup(desc, NULL, 0, out); + sctx->finalize = 0; - kernel_neon_begin_partial(16); + kernel_neon_begin(); sha1_base_do_finalize(desc, (sha1_block_fn *)sha1_ce_transform); kernel_neon_end(); return sha1_base_finish(desc, out);