[1/8,V2] EXYNOS5: Add pinmux support for SPI

Message ID 1343732461-3092-2-git-send-email-rajeshwari.s@samsung.com
State New
Headers show

Commit Message

Rajeshwari Shinde July 31, 2012, 11 a.m.
This patch adds pinmux support for SPI channels

Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
---
Changes in V2:
	- None.
 arch/arm/cpu/armv7/exynos/pinmux.c        |   51 ++++++++++++++++++++++++++++-
 arch/arm/include/asm/arch-exynos/periph.h |    5 +++
 arch/arm/include/asm/arch-exynos/pinmux.h |    3 ++
 3 files changed, 58 insertions(+), 1 deletions(-)

Comments

Simon Glass Oct. 2, 2012, 6:02 a.m. | #1
Hi,

I haven't seen any more comments on this series, nor has it been
applied so far as I can see. Any word?

On Tue, Jul 31, 2012 at 4:00 AM, Rajeshwari Shinde
<rajeshwari.s@samsung.com> wrote:
> This patch adds pinmux support for SPI channels
>
> Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>

Acked-by: Simon Glass <sjg@chromium.org>

> ---
> Changes in V2:
>         - None.
>  arch/arm/cpu/armv7/exynos/pinmux.c        |   51 ++++++++++++++++++++++++++++-
>  arch/arm/include/asm/arch-exynos/periph.h |    5 +++
>  arch/arm/include/asm/arch-exynos/pinmux.h |    3 ++
>  3 files changed, 58 insertions(+), 1 deletions(-)
>
> diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c
> index 7776add..13f75e0 100644
> --- a/arch/arm/cpu/armv7/exynos/pinmux.c
> +++ b/arch/arm/cpu/armv7/exynos/pinmux.c
> @@ -230,6 +230,49 @@ static void exynos5_i2c_config(int peripheral, int flags)
>         }
>  }
>
> +void exynos5_spi_config(int peripheral)
> +{
> +       int cfg = 0, pin = 0, i;
> +       struct s5p_gpio_bank *bank = NULL;
> +       struct exynos5_gpio_part1 *gpio1 =
> +               (struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
> +       struct exynos5_gpio_part2 *gpio2 =
> +               (struct exynos5_gpio_part2 *) samsung_get_base_gpio_part2();
> +
> +       switch (peripheral) {
> +       case PERIPH_ID_SPI0:
> +               bank = &gpio1->a2;
> +               cfg = GPIO_FUNC(0x2);
> +               pin = 0;
> +               break;
> +       case PERIPH_ID_SPI1:
> +               bank = &gpio1->a2;
> +               cfg = GPIO_FUNC(0x2);
> +               pin = 4;
> +               break;
> +       case PERIPH_ID_SPI2:
> +               bank = &gpio1->b1;
> +               cfg = GPIO_FUNC(0x5);
> +               pin = 1;
> +               break;
> +       case PERIPH_ID_SPI3:
> +               bank = &gpio2->f1;
> +               cfg = GPIO_FUNC(0x2);
> +               pin = 0;
> +               break;
> +       case PERIPH_ID_SPI4:
> +               for (i = 2; i < 4; i++)
> +                       s5p_gpio_cfg_pin(&gpio2->f0, i, GPIO_FUNC(0x4));
> +               for (i = 4; i < 6; i++)
> +                       s5p_gpio_cfg_pin(&gpio2->e0, i, GPIO_FUNC(0x4));
> +               break;
> +       }
> +       if (peripheral != PERIPH_ID_SPI4) {
> +               for (i = pin; i < pin + 4; i++)
> +                       s5p_gpio_cfg_pin(bank, i, cfg);
> +       }
> +}
> +
>  static int exynos5_pinmux_config(int peripheral, int flags)
>  {
>         switch (peripheral) {
> @@ -257,11 +300,17 @@ static int exynos5_pinmux_config(int peripheral, int flags)
>         case PERIPH_ID_I2C7:
>                 exynos5_i2c_config(peripheral, flags);
>                 break;
> +       case PERIPH_ID_SPI0:
> +       case PERIPH_ID_SPI1:
> +       case PERIPH_ID_SPI2:
> +       case PERIPH_ID_SPI3:
> +       case PERIPH_ID_SPI4:
> +               exynos5_spi_config(peripheral);
> +               break;
>         default:
>                 debug("%s: invalid peripheral %d", __func__, peripheral);
>                 return -1;
>         }
> -

I think U-Boot likes to keep a blank line before the 'return' at the
end of a function.

>         return 0;
>  }
>
> diff --git a/arch/arm/include/asm/arch-exynos/periph.h b/arch/arm/include/asm/arch-exynos/periph.h
> index b861d7d..dafc3f3 100644
> --- a/arch/arm/include/asm/arch-exynos/periph.h
> +++ b/arch/arm/include/asm/arch-exynos/periph.h
> @@ -43,6 +43,11 @@ enum periph_id {
>         PERIPH_ID_SDMMC2,
>         PERIPH_ID_SDMMC3,
>         PERIPH_ID_SROMC,
> +       PERIPH_ID_SPI0,
> +       PERIPH_ID_SPI1,
> +       PERIPH_ID_SPI2,
> +       PERIPH_ID_SPI3,
> +       PERIPH_ID_SPI4,
>         PERIPH_ID_UART0,
>         PERIPH_ID_UART1,
>         PERIPH_ID_UART2,
> diff --git a/arch/arm/include/asm/arch-exynos/pinmux.h b/arch/arm/include/asm/arch-exynos/pinmux.h
> index 10ea736..57c80be 100644
> --- a/arch/arm/include/asm/arch-exynos/pinmux.h
> +++ b/arch/arm/include/asm/arch-exynos/pinmux.h
> @@ -36,6 +36,9 @@ enum {
>         /* Flags for eMMC */
>         PINMUX_FLAG_8BIT_MODE   = 1 << 0,       /* SDMMC 8-bit mode */
>
> +       /* Flag for SPI */
> +       PINMUX_FLAG_SLAVE_MODE  = 1 << 0,       /* Slave mode */
> +
>         /* Flags for SROM controller */
>         PINMUX_FLAG_BANK        = 3 << 0,       /* bank number (0-3) */
>         PINMUX_FLAG_16BIT       = 1 << 2,       /* 16-bit width */
> --
> 1.7.4.4
>

Regards,
Simon

Patch

diff --git a/arch/arm/cpu/armv7/exynos/pinmux.c b/arch/arm/cpu/armv7/exynos/pinmux.c
index 7776add..13f75e0 100644
--- a/arch/arm/cpu/armv7/exynos/pinmux.c
+++ b/arch/arm/cpu/armv7/exynos/pinmux.c
@@ -230,6 +230,49 @@  static void exynos5_i2c_config(int peripheral, int flags)
 	}
 }
 
+void exynos5_spi_config(int peripheral)
+{
+	int cfg = 0, pin = 0, i;
+	struct s5p_gpio_bank *bank = NULL;
+	struct exynos5_gpio_part1 *gpio1 =
+		(struct exynos5_gpio_part1 *) samsung_get_base_gpio_part1();
+	struct exynos5_gpio_part2 *gpio2 =
+		(struct exynos5_gpio_part2 *) samsung_get_base_gpio_part2();
+
+	switch (peripheral) {
+	case PERIPH_ID_SPI0:
+		bank = &gpio1->a2;
+		cfg = GPIO_FUNC(0x2);
+		pin = 0;
+		break;
+	case PERIPH_ID_SPI1:
+		bank = &gpio1->a2;
+		cfg = GPIO_FUNC(0x2);
+		pin = 4;
+		break;
+	case PERIPH_ID_SPI2:
+		bank = &gpio1->b1;
+		cfg = GPIO_FUNC(0x5);
+		pin = 1;
+		break;
+	case PERIPH_ID_SPI3:
+		bank = &gpio2->f1;
+		cfg = GPIO_FUNC(0x2);
+		pin = 0;
+		break;
+	case PERIPH_ID_SPI4:
+		for (i = 2; i < 4; i++)
+			s5p_gpio_cfg_pin(&gpio2->f0, i, GPIO_FUNC(0x4));
+		for (i = 4; i < 6; i++)
+			s5p_gpio_cfg_pin(&gpio2->e0, i, GPIO_FUNC(0x4));
+		break;
+	}
+	if (peripheral != PERIPH_ID_SPI4) {
+		for (i = pin; i < pin + 4; i++)
+			s5p_gpio_cfg_pin(bank, i, cfg);
+	}
+}
+
 static int exynos5_pinmux_config(int peripheral, int flags)
 {
 	switch (peripheral) {
@@ -257,11 +300,17 @@  static int exynos5_pinmux_config(int peripheral, int flags)
 	case PERIPH_ID_I2C7:
 		exynos5_i2c_config(peripheral, flags);
 		break;
+	case PERIPH_ID_SPI0:
+	case PERIPH_ID_SPI1:
+	case PERIPH_ID_SPI2:
+	case PERIPH_ID_SPI3:
+	case PERIPH_ID_SPI4:
+		exynos5_spi_config(peripheral);
+		break;
 	default:
 		debug("%s: invalid peripheral %d", __func__, peripheral);
 		return -1;
 	}
-
 	return 0;
 }
 
diff --git a/arch/arm/include/asm/arch-exynos/periph.h b/arch/arm/include/asm/arch-exynos/periph.h
index b861d7d..dafc3f3 100644
--- a/arch/arm/include/asm/arch-exynos/periph.h
+++ b/arch/arm/include/asm/arch-exynos/periph.h
@@ -43,6 +43,11 @@  enum periph_id {
 	PERIPH_ID_SDMMC2,
 	PERIPH_ID_SDMMC3,
 	PERIPH_ID_SROMC,
+	PERIPH_ID_SPI0,
+	PERIPH_ID_SPI1,
+	PERIPH_ID_SPI2,
+	PERIPH_ID_SPI3,
+	PERIPH_ID_SPI4,
 	PERIPH_ID_UART0,
 	PERIPH_ID_UART1,
 	PERIPH_ID_UART2,
diff --git a/arch/arm/include/asm/arch-exynos/pinmux.h b/arch/arm/include/asm/arch-exynos/pinmux.h
index 10ea736..57c80be 100644
--- a/arch/arm/include/asm/arch-exynos/pinmux.h
+++ b/arch/arm/include/asm/arch-exynos/pinmux.h
@@ -36,6 +36,9 @@  enum {
 	/* Flags for eMMC */
 	PINMUX_FLAG_8BIT_MODE	= 1 << 0,       /* SDMMC 8-bit mode */
 
+	/* Flag for SPI */
+	PINMUX_FLAG_SLAVE_MODE  = 1 << 0,	/* Slave mode */
+
 	/* Flags for SROM controller */
 	PINMUX_FLAG_BANK	= 3 << 0,       /* bank number (0-3) */
 	PINMUX_FLAG_16BIT	= 1 << 2,       /* 16-bit width */