Applied "ASoC: tas2552: Fix typos in the binding doc" to the asoc tree

Message ID E1cy2bu-0007yF-2C@debutante
State New
Headers show

Commit Message

Mark Brown April 11, 2017, 8:41 p.m.
The patch

   ASoC: tas2552: Fix typos in the binding doc

has been applied to the asoc tree at

   git://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound.git 

All being well this means that it will be integrated into the linux-next
tree (usually sometime in the next 24 hours) and sent to Linus during
the next merge window (or sooner if it is a bug fix), however if
problems are discovered then the patch may be dropped or reverted.  

You may get further e-mails resulting from automated or manual testing
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Thanks,
Mark

From 7d8d2c9482474804a5c2b33ea9218d33dbcb48ba Mon Sep 17 00:00:00 2001
From: Fabio Estevam <fabio.estevam@nxp.com>

Date: Tue, 11 Apr 2017 15:49:35 -0300
Subject: [PATCH] ASoC: tas2552: Fix typos in the binding doc

Fix the following typos:

"receive its reference clock" and "selected".

Signed-off-by: Fabio Estevam <fabio.estevam@nxp.com>

Signed-off-by: Mark Brown <broonie@kernel.org>

---
 Documentation/devicetree/bindings/sound/tas2552.txt | 4 ++--
 1 file changed, 2 insertions(+), 2 deletions(-)

-- 
2.11.0

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diff --git a/Documentation/devicetree/bindings/sound/tas2552.txt b/Documentation/devicetree/bindings/sound/tas2552.txt
index ea8abf08b094..2d71eb05c1d3 100644
--- a/Documentation/devicetree/bindings/sound/tas2552.txt
+++ b/Documentation/devicetree/bindings/sound/tas2552.txt
@@ -15,11 +15,11 @@  Required properties:
 Optional properties:
 	- enable-gpio - gpio pin to enable/disable the device
 
-tas2552 can receive it's reference clock via MCLK, BCLK, IVCLKIN pin or use the
+tas2552 can receive its reference clock via MCLK, BCLK, IVCLKIN pin or use the
 internal 1.8MHz. This CLKIN is used by the PLL. In addition to PLL, the PDM
 reference clock is also selectable: PLL, IVCLKIN, BCLK or MCLK.
 For system integration the dt-bindings/sound/tas2552.h header file provides
-defined values to selct and configure the PLL and PDM reference clocks.
+defined values to select and configure the PLL and PDM reference clocks.
 
 Example: