[4/7,V4] EXYNOS5: Add base address for SPI.

Message ID 1343892310-21018-5-git-send-email-rajeshwari.s@samsung.com
State New
Headers show

Commit Message

Rajeshwari Shinde Aug. 2, 2012, 7:25 a.m.
Signed-off-by: Rajeshwari Shinde <rajeshwari.s@samsung.com>
---
Changes in V2:
        - None
Changes in V3:
        - None.
Changes in V4:
        - Rebased on Mainline u-boot.git.
 arch/arm/include/asm/arch-exynos/cpu.h |    6 ++++++
 1 files changed, 6 insertions(+), 0 deletions(-)

Patch

diff --git a/arch/arm/include/asm/arch-exynos/cpu.h b/arch/arm/include/asm/arch-exynos/cpu.h
index 0e6ea87..89c2dd3 100644
--- a/arch/arm/include/asm/arch-exynos/cpu.h
+++ b/arch/arm/include/asm/arch-exynos/cpu.h
@@ -51,11 +51,13 @@ 
 #define EXYNOS4_UART_BASE		0x13800000
 #define EXYNOS4_I2C_BASE		0x13860000
 #define EXYNOS4_ADC_BASE		0x13910000
+#define EXYNOS4_SPI_BASE		0x13920000
 #define EXYNOS4_PWMTIMER_BASE		0x139D0000
 #define EXYNOS4_MODEM_BASE		0x13A00000
 #define EXYNOS4_USBPHY_CONTROL		0x10020704
 
 #define EXYNOS4_GPIO_PART4_BASE		DEVICE_NOT_AVAILABLE
+#define EXYNOS4_SPI_ISP_BASE		DEVICE_NOT_AVAILABLE
 
 /* EXYNOS5 */
 #define EXYNOS5_I2C_SPACING		0x10000
@@ -80,7 +82,9 @@ 
 #define EXYNOS5_SROMC_BASE		0x12250000
 #define EXYNOS5_UART_BASE		0x12C00000
 #define EXYNOS5_I2C_BASE		0x12C60000
+#define EXYNOS5_SPI_BASE		0x12D20000
 #define EXYNOS5_PWMTIMER_BASE		0x12DD0000
+#define EXYNOS5_SPI_ISP_BASE		0x131A0000
 #define EXYNOS5_GPIO_PART2_BASE		0x13400000
 #define EXYNOS5_FIMD_BASE		0x14400000
 
@@ -170,6 +174,8 @@  SAMSUNG_BASE(usb_ehci, USB_HOST_EHCI_BASE)
 SAMSUNG_BASE(usb_otg, USBOTG_BASE)
 SAMSUNG_BASE(watchdog, WATCHDOG_BASE)
 SAMSUNG_BASE(power, POWER_BASE)
+SAMSUNG_BASE(spi, SPI_BASE)
+SAMSUNG_BASE(spi_isp, SPI_ISP_BASE)
 #endif
 
 #endif	/* _EXYNOS4_CPU_H */