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[209.132.180.67]) by mx.google.com with ESMTP id 89si625331plc.277.2017.06.14.05.41.26; Wed, 14 Jun 2017 05:41:26 -0700 (PDT) Received-SPF: pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) client-ip=209.132.180.67; Authentication-Results: mx.google.com; dkim=pass header.i=@linaro.org header.b=XGV0ouFt; spf=pass (google.com: best guess record for domain of linux-kernel-owner@vger.kernel.org designates 209.132.180.67 as permitted sender) smtp.mailfrom=linux-kernel-owner@vger.kernel.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: (majordomo@vger.kernel.org) by vger.kernel.org via listexpand id S1752582AbdFNMlX (ORCPT + 25 others); Wed, 14 Jun 2017 08:41:23 -0400 Received: from mail-wr0-f181.google.com ([209.85.128.181]:36398 "EHLO mail-wr0-f181.google.com" rhost-flags-OK-OK-OK-OK) by vger.kernel.org with ESMTP id S1752548AbdFNMlV (ORCPT ); Wed, 14 Jun 2017 08:41:21 -0400 Received: by mail-wr0-f181.google.com with SMTP id 36so66278262wry.3 for ; Wed, 14 Jun 2017 05:41:16 -0700 (PDT) DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=linaro.org; s=google; h=from:to:cc:subject:date:message-id:in-reply-to:references; bh=1NkE8kTzSalcDktEXa0trOW/GkwI1yE0VMBPFi90YFo=; b=XGV0ouFtpLtCQZfsErY82bGjjYUWSPF/HS/s2TZQSwWMEHOaHlbrAYg9Wqn4Nu01Bx Bzd6Iq/SdehNbsskMtkrG+AO6R9fhqV9HS/Sze8sITVHdN5mrJ5NGQ0m2saQp4udqyhE gnVTvvhS8ojTCEOmdwuOeHVNXbYW6PmYbe2rU= X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=1NkE8kTzSalcDktEXa0trOW/GkwI1yE0VMBPFi90YFo=; b=rfNx1qdq8ZMBMGlvgaYNyNC0uEpWQyLeDzV0hj1wd774lYRVCxLd9j7lrNWyJ666TF wXXWeyIhfcUYx7lmf6YcPBgBpcW85bCAjfmRXZtlFCO8ugoRiEauaM5GV6ARjnmeqtf8 B9NgAoDIEf4uPZa3tWWiTzLVHROqC9IsD9z1RR0n5i+0yJIcuO1oqPOxH+zOuAuJJ3Gz yQT7ocH8UpPIRj401QJ1DN9OxPnxhuozFc3R5DKDEy8BWMJiPrvdCmwDSEOsYaaCEIaZ sF3xHwZBWT7UKdwJzI21s6nhEebCL4hOoMCHWhQBB8taj63vPyFAdvJns05yyZD3BTUH cq7g== X-Gm-Message-State: AKS2vOxl2jSSfBKMgMTDp4kLWIUtZlD+J76XeI3qJXVl5jFC6cBSjstC hr4Vd7suGcTCyxDN X-Received: by 10.28.143.16 with SMTP id r16mr963000wmd.50.1497444075157; Wed, 14 Jun 2017 05:41:15 -0700 (PDT) Received: from localhost.localdomain ([2a01:e35:879a:6cd0:19a:b336:54d7:46e9]) by smtp.gmail.com with ESMTPSA id 80sm1457015wmg.17.2017.06.14.05.41.14 (version=TLS1_2 cipher=ECDHE-RSA-AES128-SHA bits=128/128); Wed, 14 Jun 2017 05:41:14 -0700 (PDT) From: Daniel Lezcano To: tglx@linutronix.de Cc: linux-kernel@vger.kernel.org, Joel Stanley , Andrew Jeffery Subject: [PATCH 10/23] clocksource/drivers/fttmr010: Fix aspeed-2500 initialization Date: Wed, 14 Jun 2017 14:39:31 +0200 Message-Id: <1497443984-12371-10-git-send-email-daniel.lezcano@linaro.org> X-Mailer: git-send-email 2.7.4 In-Reply-To: <1497443984-12371-1-git-send-email-daniel.lezcano@linaro.org> References: <20170614123800.GH2261@mai> <1497443984-12371-1-git-send-email-daniel.lezcano@linaro.org> Sender: linux-kernel-owner@vger.kernel.org Precedence: bulk List-ID: X-Mailing-List: linux-kernel@vger.kernel.org The recent changes made the fttmr010 to be more generic and support different timers with a very few differences like moxart or aspeed. The aspeed timer uses a countdown and there is a test against the aspeed2400 compatible string to set a flag. With the previous patch, we added the aspeed2500 compatible string but without taking care of setting the countdown flag. Fix this by specifiying a init function and pass the aspeed flag to a common init function. Reviewed-by: Linus Walleij Tested-by: Andrew Jeffery Reviewed-by: Andrew Jeffery Acked-by: Joel Stanley Signed-off-by: Daniel Lezcano --- drivers/clocksource/timer-fttmr010.c | 23 ++++++++++++++++------- 1 file changed, 16 insertions(+), 7 deletions(-) -- 2.7.4 diff --git a/drivers/clocksource/timer-fttmr010.c b/drivers/clocksource/timer-fttmr010.c index 68982ad..d96190e 100644 --- a/drivers/clocksource/timer-fttmr010.c +++ b/drivers/clocksource/timer-fttmr010.c @@ -210,10 +210,9 @@ static irqreturn_t fttmr010_timer_interrupt(int irq, void *dev_id) return IRQ_HANDLED; } -static int __init fttmr010_timer_init(struct device_node *np) +static int __init fttmr010_common_init(struct device_node *np, bool is_aspeed) { struct fttmr010 *fttmr010; - bool is_ast2400; int irq; struct clk *clk; int ret; @@ -260,8 +259,7 @@ static int __init fttmr010_timer_init(struct device_node *np) * The Aspeed AST2400 moves bits around in the control register, * otherwise it works the same. */ - is_ast2400 = of_device_is_compatible(np, "aspeed,ast2400-timer"); - if (is_ast2400) { + if (is_aspeed) { fttmr010->t1_enable_val = TIMER_1_CR_ASPEED_ENABLE | TIMER_1_CR_ASPEED_INT; /* Downward not available */ @@ -280,7 +278,7 @@ static int __init fttmr010_timer_init(struct device_node *np) * Enable timer 1 count up, timer 2 count up, except on Aspeed, * where everything just counts down. */ - if (is_ast2400) + if (is_aspeed) val = TIMER_2_CR_ASPEED_ENABLE; else { val = TIMER_2_CR_ENABLE; @@ -355,8 +353,19 @@ static int __init fttmr010_timer_init(struct device_node *np) return ret; } + +static __init int aspeed_timer_init(struct device_node *np) +{ + return fttmr010_common_init(np, true); +} + +static __init int fttmr010_timer_init(struct device_node *np) +{ + return fttmr010_common_init(np, false); +} + CLOCKSOURCE_OF_DECLARE(fttmr010, "faraday,fttmr010", fttmr010_timer_init); CLOCKSOURCE_OF_DECLARE(gemini, "cortina,gemini-timer", fttmr010_timer_init); CLOCKSOURCE_OF_DECLARE(moxart, "moxa,moxart-timer", fttmr010_timer_init); -CLOCKSOURCE_OF_DECLARE(ast2400, "aspeed,ast2400-timer", fttmr010_timer_init); -CLOCKSOURCE_OF_DECLARE(ast2500, "aspeed,ast2500-timer", fttmr010_timer_init); +CLOCKSOURCE_OF_DECLARE(ast2400, "aspeed,ast2400-timer", aspeed_timer_init); +CLOCKSOURCE_OF_DECLARE(ast2500, "aspeed,ast2500-timer", aspeed_timer_init);