From patchwork Fri Jun 23 18:30:41 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 106280 Delivered-To: patch@linaro.org Received: by 10.140.91.2 with SMTP id y2csp345955qgd; Fri, 23 Jun 2017 11:31:37 -0700 (PDT) X-Received: by 10.55.1.65 with SMTP id 62mr10228929qkb.210.1498242697475; Fri, 23 Jun 2017 11:31:37 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1498242697; cv=none; d=google.com; s=arc-20160816; b=IFKFV0F0KZDnYwl/CsOAbsLc9G/M9Mo5bYvk/vHiAEPLuwtJRFVE7/XTWQ24ZnhBWO oVLGdyRXAyZU30q+8RjK0ONDnfOR4Jd86mjJLNDyyGNm+FEsljagLocV8AsfP5D1q82Y vg/kX0f/SDDT1YqO36pP0wLRORWjCnfHca0Hv1Mj4SJc0zKeVbpkQ8vjVELDKghMyrjb rwhGZDPArkMSP9uxs6DmQ+1WvINVm+IOeT0CDfdVXkgs8ub6b9KI/6HtzQP0R211Hk6D AGnJyTKucXLrGW0IAcYpGu2xs+iOOj9sT26W3fLr5s0SRBUD/dPXQ9jGuaBmOc+Kc+8H u1Mg== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:delivered-to:arc-authentication-results; bh=TC5M/RdS5THXfei8lUNDKtmlpKP4pRxkJp8oGb8oDGw=; b=zVbJQ+CPNQkulfxVIpkDzzwbhA+kc6AGTh135WLlj5cTvRJmfnil3rPuir4WtoybeW aN5Hc4tEnUb42A03U0uAiZeJeVUFiA7HIIpnFF4Q2xSTXctUScsEkFEPclGFV8lra4s0 /37zahhANhCIM/flGnAkYm3glXkrrQJ9+zmw61JBH99Ua/RFaKIEwr2L/evfxNbZ5dUN nqpZLAU42dYvkEOQ/6rjt21+lDrEvYKkmaD6jmhg0naGTndkTIBXmtb0PvP1SPhYp0Tr D2Et8s2KaVI4tVmAiFW7vxpdWz7JnVqa3KDQ7hrLK2hiD4YLCzqki0YKaK105PlizrLA 8yTQ== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.linaro.org (lists.linaro.org. [54.225.227.206]) by mx.google.com with ESMTP id e123si4216506qkf.341.2017.06.23.11.31.37; Fri, 23 Jun 2017 11:31:37 -0700 (PDT) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 21BB960C35; Fri, 23 Jun 2017 18:31:37 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-4.2 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H2, RCVD_IN_SORBS_SPAM, URIBL_BLOCKED autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id 0776560C2F; Fri, 23 Jun 2017 18:31:19 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 0C42660C2F; Fri, 23 Jun 2017 18:31:15 +0000 (UTC) Received: from mail-wr0-f169.google.com (mail-wr0-f169.google.com [209.85.128.169]) by lists.linaro.org (Postfix) with ESMTPS id E17AF60C30 for ; Fri, 23 Jun 2017 18:31:00 +0000 (UTC) Received: by mail-wr0-f169.google.com with SMTP id k67so76170519wrc.2 for ; Fri, 23 Jun 2017 11:31:00 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=36xuJ4ugt4e5OXUFgMdCe47UdYE6s3SrYzT5j2Zyyu4=; b=fzZ4mx8XTEBt4YWHAo6xypOgrnJLC2b/ExNXWR9oU0ChwUBR9yzrebMIdBV9Qot4Dr oiJaTu7ElhciDDUUmeM7TEDTvffnL9IIR6VNqhmvJSCk4B/X7ReGQE1pMwRMJ4oHlDlJ L9YnnqLBu9eIHkSg+J9EkL2eP76SG/z6FbVmYTTJ9as0rDlHNcv6xdnnJ1eLKLw2YNaE qsKbw4LnkkRI9jalFtOk1+s4HcuqVNYv5i1nxR1i0tkcYBKM2yVo22fvzZx69BwHHwQc /AIyaSD4hYOTFcvtG1cp3YhFyZi5QUO8iQMMjE4PsYG8P7BDJCudBReH2VR5Hnjkf/PW 4cVQ== X-Gm-Message-State: AKS2vOwDTAfQy0h5dpfhQYMWyYvTt3hG4abjJgHztl9wcfXGRigLGCbQ E+IAOews4qYK3hn2gyypG3eX X-Received: by 10.28.222.195 with SMTP id v186mr6253206wmg.88.1498242659619; Fri, 23 Jun 2017 11:30:59 -0700 (PDT) Received: from localhost.localdomain ([160.171.41.197]) by smtp.gmail.com with ESMTPSA id l190sm5632336wmb.18.2017.06.23.11.30.58 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Fri, 23 Jun 2017 11:30:59 -0700 (PDT) From: Ard Biesheuvel To: linaro-uefi@lists.linaro.org Date: Fri, 23 Jun 2017 18:30:41 +0000 Message-Id: <20170623183045.21494-3-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170623183045.21494-1-ard.biesheuvel@linaro.org> References: <20170623183045.21494-1-ard.biesheuvel@linaro.org> Cc: rfranz@cavium.com, alan@softiron.co.uk Subject: [Linaro-uefi] [PATCH 2/6] Platforms/AMD/Styx: set SATA port mode to Gen3 on all ports X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: "For discussions about Linaro-related UEFI development. Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" The SATA related PCDs consumed by AmdSataInitLib contain a PcdSataPortMode PCD that sets the port mode to all ports. This PCD defaults to zero, while the code in question has no default, i.e., the value 0 is not treated as either 1, 2 or 3, and so the init sequence is not carried out correctly. While observed SATA link detection issues on CelloBoard appear to be unrelated to this (i.e., this change did not improve the situation), let's set the correct values nonetheless. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel --- Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 1 + Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc | 2 ++ Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 1 + 3 files changed, 4 insertions(+) diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index ddb944d0beb4..d10c0901c811 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -404,6 +404,7 @@ DEFINE DO_KCS = 0 # gAmdStyxTokenSpaceGuid.PcdSata0PortCount|2 gAmdStyxTokenSpaceGuid.PcdSata1PortCount|0 + gAmdStyxTokenSpaceGuid.PcdSataPortMode|0xf # PCIe Support gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xF0000000 diff --git a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc index f6d2d37014dd..298cf3eb1c28 100644 --- a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc +++ b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc @@ -406,6 +406,8 @@ DEFINE DO_KCS = 1 # gAmdStyxTokenSpaceGuid.PcdSata0PortCount|2 gAmdStyxTokenSpaceGuid.PcdSata1PortCount|0 + gAmdStyxTokenSpaceGuid.PcdSataPortMode|0xf + # PCIe Support gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xF0000000 diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index 7ac3ce3760fa..d0b541f9bfa1 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -413,6 +413,7 @@ DEFINE DO_KCS = 1 # gAmdStyxTokenSpaceGuid.PcdSata0PortCount|8 gAmdStyxTokenSpaceGuid.PcdSata1PortCount|6 + gAmdStyxTokenSpaceGuid.PcdSataPortMode|0xfffffff # PCIe Support gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xF0000000