From patchwork Tue Jun 27 13:21:38 2017 Content-Type: text/plain; charset="utf-8" MIME-Version: 1.0 Content-Transfer-Encoding: 7bit X-Patchwork-Submitter: Ard Biesheuvel X-Patchwork-Id: 106423 Delivered-To: patch@linaro.org Received: by 10.140.101.48 with SMTP id t45csp1198190qge; Tue, 27 Jun 2017 06:22:57 -0700 (PDT) X-Received: by 10.200.54.108 with SMTP id n41mr6803138qtb.219.1498569777570; Tue, 27 Jun 2017 06:22:57 -0700 (PDT) ARC-Seal: i=1; a=rsa-sha256; t=1498569777; cv=none; d=google.com; s=arc-20160816; b=Ityu12cARkfHLr96aHjccIZBokR4aT9pR9WWBhzPfflMvkyknD/7YGZYw5BFanVWrh zScxJbDvowhakTe3MDkVc9gzLcgoA+YI+U9c2UhkNcrrcRNpH57uiRRYuooclrZGUtEW fePkBCs+9cPiF0gRSZYtJH2gi9Jf//Pzck6MVaiF6saVEiyXA/SghKWouln+0Qzvv3mn yGz+yP2IJ2LKl9aVlct/+9yr22gyn+LWQM5zxof6xH4EoZ6RLJNOy7ofFIk0lbncQYgB o08Iimk7FjRtZ93F0jxPJwkY2YKYYdRpE6xsmhk4TNBgAW6GTUNX7LPysmT7FnP06G3p k0wQ== ARC-Message-Signature: i=1; a=rsa-sha256; c=relaxed/relaxed; d=google.com; s=arc-20160816; h=sender:errors-to:content-transfer-encoding:mime-version :list-subscribe:list-help:list-post:list-archive:list-unsubscribe :list-id:precedence:subject:cc:references:in-reply-to:message-id :date:to:from:delivered-to:arc-authentication-results; bh=Ch0ookVjZrTkjb5D85tGVGHNAFH95MOBn2XTv2Tf57w=; b=Zq4xjnYJnDo0XjIu2f9s6183HOuX04OWNeqvWOz2Ieg08uDDgNF/0+bYM8mi5hLe4p V2JQSoqyDz4tvSKg+n5o9bKrEUDgRc08bzIJR6pEZZjmi0Oc5AfLE/62nq62u7sstDef qQQw5MRxXwyeJQ+x951Y2a2S9e2FrCW+Z9eYKA27OEPSWk4lEIq8sOuoDUEtcJewHay5 JyQDYQuqU1t6nN6qAVbLbU0pHJZTzziYEcw7RZmVdaS3FC07yaPt0sy205OyYjikpIUn HYdVm2jW7ogFbyqrVB00tnG2PY2BTvAIT+IMkfJAm0COYImJCvddIZRcl8JdA9fdVDmP 75Pg== ARC-Authentication-Results: i=1; mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Return-Path: Received: from lists.linaro.org (lists.linaro.org. [54.225.227.206]) by mx.google.com with ESMTP id p41si683229qta.19.2017.06.27.06.22.57; Tue, 27 Jun 2017 06:22:57 -0700 (PDT) Received-SPF: pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) client-ip=54.225.227.206; Authentication-Results: mx.google.com; spf=pass (google.com: domain of linaro-uefi-bounces@lists.linaro.org designates 54.225.227.206 as permitted sender) smtp.mailfrom=linaro-uefi-bounces@lists.linaro.org; dmarc=pass (p=NONE sp=NONE dis=NONE) header.from=linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 2BC5160D42; Tue, 27 Jun 2017 13:22:57 +0000 (UTC) X-Spam-Checker-Version: SpamAssassin 3.4.0 (2014-02-07) on ip-10-142-244-252 X-Spam-Level: X-Spam-Status: No, score=-1.9 required=5.0 tests=BAYES_00, RCVD_IN_DNSWL_NONE, RCVD_IN_MSPIKE_H3, RCVD_IN_MSPIKE_WL autolearn=disabled version=3.4.0 Received: from [127.0.0.1] (localhost [127.0.0.1]) by lists.linaro.org (Postfix) with ESMTP id A5F4A60C1C; Tue, 27 Jun 2017 13:22:38 +0000 (UTC) X-Original-To: linaro-uefi@lists.linaro.org Delivered-To: linaro-uefi@lists.linaro.org Received: by lists.linaro.org (Postfix, from userid 109) id 788F960C20; Tue, 27 Jun 2017 13:22:34 +0000 (UTC) Received: from mail-wm0-f41.google.com (mail-wm0-f41.google.com [74.125.82.41]) by lists.linaro.org (Postfix) with ESMTPS id 69C6560BF4 for ; Tue, 27 Jun 2017 13:22:02 +0000 (UTC) Received: by mail-wm0-f41.google.com with SMTP id 62so24551705wmw.1 for ; Tue, 27 Jun 2017 06:22:02 -0700 (PDT) X-Google-DKIM-Signature: v=1; a=rsa-sha256; c=relaxed/relaxed; d=1e100.net; s=20161025; h=x-gm-message-state:from:to:cc:subject:date:message-id:in-reply-to :references; bh=Oy1vh0pTUexxv4OooSAMtPWwj3CULIH8QRomc55WF7A=; b=J3oEfGmZrP5INaiNU2ddWMHoV6ZpEGLEo2Q2n8hDU4i3do1Itr0R+qhTbymN7pWLtk jE0/79OKt2YTAND1MSIz9YipWRoxPrMhCtU5qowTwHRgWVrptLjWDYv2i98Nfn9ATK6P ECmQ+QbWk6dKCLd9uMb+DGuiwa5tvvnqyhrv+TagNLdASjrXSzug3nCpKYqWqPKDZbFO dHtRbkG8qgTaC3wfXILuRnxQb94X5URClYLMOfncfRSuSKD7OGbNjuAwHa08QmzT4VWi Pq8K+GFZQLlqswb4LHSoVmmPIy8J2y5XrrWKqTVt0xVAAr1YA3e8dTJYntF+WFCu1YH6 5i7w== X-Gm-Message-State: AKS2vOx1h48gi5w8kyPQ3OmUk+bgUn44TBvdc4KQ6GdMpufOxvdFFVhN VC2FZHCgzidEQq80ou16lgBt X-Received: by 10.28.99.84 with SMTP id x81mr3543828wmb.87.1498569721228; Tue, 27 Jun 2017 06:22:01 -0700 (PDT) Received: from localhost.localdomain ([105.133.250.69]) by smtp.gmail.com with ESMTPSA id p99sm18801062wrb.6.2017.06.27.06.21.59 (version=TLS1_2 cipher=ECDHE-RSA-AES128-GCM-SHA256 bits=128/128); Tue, 27 Jun 2017 06:22:00 -0700 (PDT) From: Ard Biesheuvel To: linaro-uefi@lists.linaro.org Date: Tue, 27 Jun 2017 13:21:38 +0000 Message-Id: <20170627132145.28159-4-ard.biesheuvel@linaro.org> X-Mailer: git-send-email 2.9.3 In-Reply-To: <20170627132145.28159-1-ard.biesheuvel@linaro.org> References: <20170627132145.28159-1-ard.biesheuvel@linaro.org> Cc: rfranz@cavium.com, alan@softiron.co.uk Subject: [Linaro-uefi] [PATCH v2 03/10] Platforms/AMD/Styx: set SATA port mode to Gen3 on all ports X-BeenThere: linaro-uefi@lists.linaro.org X-Mailman-Version: 2.1.16 Precedence: list List-Id: "For discussions about Linaro-related UEFI development. Not a substitute for edk2-devel." List-Unsubscribe: , List-Archive: List-Post: List-Help: List-Subscribe: , MIME-Version: 1.0 Errors-To: linaro-uefi-bounces@lists.linaro.org Sender: "Linaro-uefi" The SATA related PCDs consumed by AmdSataInitLib contain a PcdSataPortMode PCD that sets the port mode to all ports. This PCD defaults to zero, while the code in question has no default, i.e., the value 0 is not treated as either 1, 2 or 3, and so the init sequence is not carried out correctly. While observed SATA link detection issues on CelloBoard appear to be unrelated to this (i.e., this change did not improve the situation), let's set the correct values nonetheless. Contributed-under: TianoCore Contribution Agreement 1.0 Signed-off-by: Ard Biesheuvel Reviewed-by: Leif Lindholm --- Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc | 1 + Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc | 2 ++ Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc | 2 +- 3 files changed, 4 insertions(+), 1 deletion(-) diff --git a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc index ddb944d0beb4..d10c0901c811 100644 --- a/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc +++ b/Platforms/AMD/Styx/CelloBoard/CelloBoard.dsc @@ -404,6 +404,7 @@ DEFINE DO_KCS = 0 # gAmdStyxTokenSpaceGuid.PcdSata0PortCount|2 gAmdStyxTokenSpaceGuid.PcdSata1PortCount|0 + gAmdStyxTokenSpaceGuid.PcdSataPortMode|0xf # PCIe Support gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xF0000000 diff --git a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc index f6d2d37014dd..298cf3eb1c28 100644 --- a/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc +++ b/Platforms/AMD/Styx/Overdrive1000Board/Overdrive1000Board.dsc @@ -406,6 +406,8 @@ DEFINE DO_KCS = 1 # gAmdStyxTokenSpaceGuid.PcdSata0PortCount|2 gAmdStyxTokenSpaceGuid.PcdSata1PortCount|0 + gAmdStyxTokenSpaceGuid.PcdSataPortMode|0xf + # PCIe Support gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xF0000000 diff --git a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc index 9d533149af07..6c284fb3b7db 100644 --- a/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc +++ b/Platforms/AMD/Styx/OverdriveBoard/OverdriveBoard.dsc @@ -415,7 +415,7 @@ DEFINE DO_KCS = 1 # will crash the firmware. So use the first controller only. # gAmdStyxTokenSpaceGuid.PcdSata0PortCount|8 - gAmdStyxTokenSpaceGuid.PcdSata1PortCount|0 + gAmdStyxTokenSpaceGuid.PcdSataPortMode|0xffff # PCIe Support gEfiMdePkgTokenSpaceGuid.PcdPciExpressBaseAddress|0xF0000000