[01/77] Add an E_ prefix to mode names

Message ID 871spkohra.fsf@linaro.org
State New
Headers show
Series
  • Add wrapper classes for machine_modes
Related show

Commit Message

Richard Sandiford July 13, 2017, 8:36 a.m.
Later patches will add wrapper types for specific classes
of mode.  E.g. SImode will be a scalar_int_mode, SFmode will be a
scalar_float_mode, etc.  This patch prepares for that change by adding
an E_ prefix to the mode enum values.  It also adds #defines that map
the unprefixed names to the prefixed names; e.g:

  #define QImode E_QImode

Later patches will change this to use things like scalar_int_mode
where appropriate.

The patch continues to use enum values to initialise static data.
This isn't necessary for correctness, but it cuts down on the amount
of load-time initialisation and shouldn't have any downsides.

The patch also changes things like:

  cmp_mode == DImode ? DFmode : DImode

to:

  cmp_mode == DImode ? E_DFmode : E_DImode

This is because DImode and DFmode will eventually be different
classes, so the original ?: wouldn't be well-formed.

2017-07-13  Richard Sandiford  <richard.sandiford@linaro.org>
	    Alan Hayward  <alan.hayward@arm.com>
	    David Sherwood  <david.sherwood@arm.com>

gcc/
	* genmodes.c (mode_size_inline): Add an E_ prefix to mode names.
	(mode_nunits_inline): Likewise.
	(mode_inner_inline): Likewise.
	(mode_unit_size_inline): Likewise.
	(mode_unit_precision_inline): Likewise.
	(emit_insn_modes_h): Likewise.  Also emit a #define of the
	unprefixed name.
	(emit_mode_wider): Add an E_ prefix to mode names.
	(emit_mode_complex): Likewise.
	(emit_mode_inner): Likewise.
	(emit_mode_adjustments): Likewise.
	(emit_mode_int_n): Likewise.
	* config/aarch64/aarch64-builtins.c (v8qi_UP, v4hi_UP, v4hf_UP)
	(v2si_UP, v2sf_UP, v1df_UP, di_UP, df_UP, v16qi_UP, v8hi_UP, v8hf_UP)
	(v4si_UP, v4sf_UP, v2di_UP, v2df_UP, ti_UP, oi_UP, ci_UP, xi_UP)
	(si_UP, sf_UP, hi_UP, hf_UP, qi_UP): Likewise.
	(CRC32_BUILTIN, ENTRY): Likewise.
	* config/aarch64/aarch64.c (aarch64_push_regs): Likewise.
	(aarch64_pop_regs): Likewise.
	(aarch64_process_components): Likewise.
	* config/alpha/alpha.c (alpha_emit_conditional_move): Likewise.
	* config/arm/arm-builtins.c (v8qi_UP, v4hi_UP, v4hf_UP, v2si_UP)
	(v2sf_UP, di_UP, v16qi_UP, v8hi_UP, v8hf_UP, v4si_UP, v4sf_UP)
	(v2di_UP, ti_UP, ei_UP, oi_UP, hf_UP, si_UP, void_UP): Likewise.
	* config/arm/arm.c (arm_init_libfuncs): Likewise.
	* config/i386/i386-builtin-types.awk (ix86_builtin_type_vect_mode):
	Likewise.
	* config/i386/i386-builtin.def (pcmpestr): Likewise.
	(pcmpistr): Likewise.
	* config/microblaze/microblaze.c (double_memory_operand): Likewise.
	* config/mmix/mmix.c (mmix_output_condition): Likewise.
	* config/powerpcspe/powerpcspe.c (rs6000_init_hard_regno_mode_ok):
	Likewise.
	* config/rl78/rl78.c (mduc_regs): Likewise.
	* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Likewise.
	(htm_expand_builtin): Likewise.
	* config/sh/sh.h (REGISTER_NATURAL_MODE): Likewise.
	* config/sparc/sparc.c (emit_save_or_restore_regs): Likewise.
	* config/xtensa/xtensa.c (print_operand): Likewise.
	* expmed.h (NUM_MODE_PARTIAL_INT): Likewise.
	(NUM_MODE_VECTOR_INT): Likewise.
	* genoutput.c (null_operand): Likewise.
	(output_operand_data): Likewise.
	* genrecog.c (print_parameter_value): Likewise.
	* lra.c (debug_operand_data): Likewise.

Comments

Jeff Law Aug. 11, 2017, 4:46 p.m. | #1
On 07/13/2017 02:36 AM, Richard Sandiford wrote:
> Later patches will add wrapper types for specific classes

> of mode.  E.g. SImode will be a scalar_int_mode, SFmode will be a

> scalar_float_mode, etc.  This patch prepares for that change by adding

> an E_ prefix to the mode enum values.  It also adds #defines that map

> the unprefixed names to the prefixed names; e.g:

> 

>   #define QImode E_QImode

> 

> Later patches will change this to use things like scalar_int_mode

> where appropriate.

> 

> The patch continues to use enum values to initialise static data.

> This isn't necessary for correctness, but it cuts down on the amount

> of load-time initialisation and shouldn't have any downsides.

> 

> The patch also changes things like:

> 

>   cmp_mode == DImode ? DFmode : DImode

> 

> to:

> 

>   cmp_mode == DImode ? E_DFmode : E_DImode

> 

> This is because DImode and DFmode will eventually be different

> classes, so the original ?: wouldn't be well-formed.

> 

> 2017-07-13  Richard Sandiford  <richard.sandiford@linaro.org>

> 	    Alan Hayward  <alan.hayward@arm.com>

> 	    David Sherwood  <david.sherwood@arm.com>

> 

> gcc/

> 	* genmodes.c (mode_size_inline): Add an E_ prefix to mode names.

> 	(mode_nunits_inline): Likewise.

> 	(mode_inner_inline): Likewise.

> 	(mode_unit_size_inline): Likewise.

> 	(mode_unit_precision_inline): Likewise.

> 	(emit_insn_modes_h): Likewise.  Also emit a #define of the

> 	unprefixed name.

> 	(emit_mode_wider): Add an E_ prefix to mode names.

> 	(emit_mode_complex): Likewise.

> 	(emit_mode_inner): Likewise.

> 	(emit_mode_adjustments): Likewise.

> 	(emit_mode_int_n): Likewise.

> 	* config/aarch64/aarch64-builtins.c (v8qi_UP, v4hi_UP, v4hf_UP)

> 	(v2si_UP, v2sf_UP, v1df_UP, di_UP, df_UP, v16qi_UP, v8hi_UP, v8hf_UP)

> 	(v4si_UP, v4sf_UP, v2di_UP, v2df_UP, ti_UP, oi_UP, ci_UP, xi_UP)

> 	(si_UP, sf_UP, hi_UP, hf_UP, qi_UP): Likewise.

> 	(CRC32_BUILTIN, ENTRY): Likewise.

> 	* config/aarch64/aarch64.c (aarch64_push_regs): Likewise.

> 	(aarch64_pop_regs): Likewise.

> 	(aarch64_process_components): Likewise.

> 	* config/alpha/alpha.c (alpha_emit_conditional_move): Likewise.

> 	* config/arm/arm-builtins.c (v8qi_UP, v4hi_UP, v4hf_UP, v2si_UP)

> 	(v2sf_UP, di_UP, v16qi_UP, v8hi_UP, v8hf_UP, v4si_UP, v4sf_UP)

> 	(v2di_UP, ti_UP, ei_UP, oi_UP, hf_UP, si_UP, void_UP): Likewise.

> 	* config/arm/arm.c (arm_init_libfuncs): Likewise.

> 	* config/i386/i386-builtin-types.awk (ix86_builtin_type_vect_mode):

> 	Likewise.

> 	* config/i386/i386-builtin.def (pcmpestr): Likewise.

> 	(pcmpistr): Likewise.

> 	* config/microblaze/microblaze.c (double_memory_operand): Likewise.

> 	* config/mmix/mmix.c (mmix_output_condition): Likewise.

> 	* config/powerpcspe/powerpcspe.c (rs6000_init_hard_regno_mode_ok):

> 	Likewise.

> 	* config/rl78/rl78.c (mduc_regs): Likewise.

> 	* config/rs6000/rs6000.c (rs6000_init_hard_regno_mode_ok): Likewise.

> 	(htm_expand_builtin): Likewise.

> 	* config/sh/sh.h (REGISTER_NATURAL_MODE): Likewise.

> 	* config/sparc/sparc.c (emit_save_or_restore_regs): Likewise.

> 	* config/xtensa/xtensa.c (print_operand): Likewise.

> 	* expmed.h (NUM_MODE_PARTIAL_INT): Likewise.

> 	(NUM_MODE_VECTOR_INT): Likewise.

> 	* genoutput.c (null_operand): Likewise.

> 	(output_operand_data): Likewise.

> 	* genrecog.c (print_parameter_value): Likewise.

> 	* lra.c (debug_operand_data): Likewise.

OK.  As are any natural tweaks to deal with changes that have occurred
on the trunk since this was submitted.

Jeff

Patch

Index: gcc/genmodes.c
===================================================================
--- gcc/genmodes.c	2017-07-02 10:05:20.996539436 +0100
+++ gcc/genmodes.c	2017-07-13 09:18:17.576867543 +0100
@@ -983,7 +983,7 @@  mode_size_inline (machine_mode mode)\n\
 
   for_all_modes (c, m)
     if (!m->need_bytesize_adj)
-      printf ("    case %smode: return %u;\n", m->name, m->bytesize);
+      printf ("    case E_%smode: return %u;\n", m->name, m->bytesize);
 
   puts ("\
     default: return mode_size[mode];\n\
@@ -1013,7 +1013,7 @@  mode_nunits_inline (machine_mode mode)\n
     {");
 
   for_all_modes (c, m)
-    printf ("    case %smode: return %u;\n", m->name, m->ncomponents);
+    printf ("    case E_%smode: return %u;\n", m->name, m->ncomponents);
 
   puts ("\
     default: return mode_nunits[mode];\n\
@@ -1043,7 +1043,7 @@  mode_inner_inline (machine_mode mode)\n\
     {");
 
   for_all_modes (c, m)
-    printf ("    case %smode: return %smode;\n", m->name,
+    printf ("    case E_%smode: return E_%smode;\n", m->name,
 	    c != MODE_PARTIAL_INT && m->component
 	    ? m->component->name : m->name);
 
@@ -1082,7 +1082,7 @@  mode_unit_size_inline (machine_mode mode
       if (c != MODE_PARTIAL_INT && m2->component)
 	m2 = m2->component;
       if (!m2->need_bytesize_adj)
-	printf ("    case %smode: return %u;\n", name, m2->bytesize);
+	printf ("    case E_%smode: return %u;\n", name, m2->bytesize);
     }
 
   puts ("\
@@ -1117,9 +1117,9 @@  mode_unit_precision_inline (machine_mode
       struct mode_data *m2
 	= (c != MODE_PARTIAL_INT && m->component) ? m->component : m;
       if (m2->precision != (unsigned int)-1)
-	printf ("    case %smode: return %u;\n", m->name, m2->precision);
+	printf ("    case E_%smode: return %u;\n", m->name, m2->precision);
       else
-	printf ("    case %smode: return %u*BITS_PER_UNIT;\n",
+	printf ("    case E_%smode: return %u*BITS_PER_UNIT;\n",
 		m->name, m2->bytesize);
     }
 
@@ -1151,10 +1151,12 @@  enum machine_mode\n{");
   for (c = 0; c < MAX_MODE_CLASS; c++)
     for (m = modes[c]; m; m = m->next)
       {
-	int count_ = printf ("  %smode,", m->name);
+	int count_ = printf ("  E_%smode,", m->name);
 	printf ("%*s/* %s:%d */\n", 27 - count_, "",
 		 trim_filename (m->file), m->line);
 	printf ("#define HAVE_%smode\n", m->name);
+	printf ("#define %smode E_%smode\n",
+		m->name, m->name);
       }
 
   puts ("  MAX_MACHINE_MODE,\n");
@@ -1174,11 +1176,11 @@  enum machine_mode\n{");
 	first = first->next;
 
       if (first && last)
-	printf ("  MIN_%s = %smode,\n  MAX_%s = %smode,\n\n",
+	printf ("  MIN_%s = E_%smode,\n  MAX_%s = E_%smode,\n\n",
 		 mode_class_names[c], first->name,
 		 mode_class_names[c], last->name);
       else
-	printf ("  MIN_%s = %smode,\n  MAX_%s = %smode,\n\n",
+	printf ("  MIN_%s = E_%smode,\n  MAX_%s = E_%smode,\n\n",
 		 mode_class_names[c], void_mode->name,
 		 mode_class_names[c], void_mode->name);
     }
@@ -1350,7 +1352,7 @@  emit_mode_wider (void)
   print_decl ("unsigned char", "mode_wider", "NUM_MACHINE_MODES");
 
   for_all_modes (c, m)
-    tagged_printf ("%smode",
+    tagged_printf ("E_%smode",
 		   m->wider ? m->wider->name : void_mode->name,
 		   m->name);
 
@@ -1397,7 +1399,7 @@  emit_mode_wider (void)
 	}
       if (m2 == void_mode)
 	m2 = 0;
-      tagged_printf ("%smode",
+      tagged_printf ("E_%smode",
 		     m2 ? m2->name : void_mode->name,
 		     m->name);
     }
@@ -1414,7 +1416,7 @@  emit_mode_complex (void)
   print_decl ("unsigned char", "mode_complex", "NUM_MACHINE_MODES");
 
   for_all_modes (c, m)
-    tagged_printf ("%smode",
+    tagged_printf ("E_%smode",
 		   m->complex ? m->complex->name : void_mode->name,
 		   m->name);
 
@@ -1454,7 +1456,7 @@  emit_mode_inner (void)
   print_decl ("unsigned char", "mode_inner", "NUM_MACHINE_MODES");
 
   for_all_modes (c, m)
-    tagged_printf ("%smode",
+    tagged_printf ("E_%smode",
 		   c != MODE_PARTIAL_INT && m->component
 		   ? m->component->name : m->name,
 		   m->name);
@@ -1597,9 +1599,9 @@  emit_mode_adjustments (void)
     {
       printf ("\n  /* %s:%d */\n  s = %s;\n",
 	      a->file, a->line, a->adjustment);
-      printf ("  mode_size[%smode] = s;\n", a->mode->name);
-      printf ("  mode_unit_size[%smode] = s;\n", a->mode->name);
-      printf ("  mode_base_align[%smode] = s & (~s + 1);\n",
+      printf ("  mode_size[E_%smode] = s;\n", a->mode->name);
+      printf ("  mode_unit_size[E_%smode] = s;\n", a->mode->name);
+      printf ("  mode_base_align[E_%smode] = s & (~s + 1);\n",
 	      a->mode->name);
 
       for (m = a->mode->contained; m; m = m->next_cont)
@@ -1608,9 +1610,9 @@  emit_mode_adjustments (void)
 	    {
 	    case MODE_COMPLEX_INT:
 	    case MODE_COMPLEX_FLOAT:
-	      printf ("  mode_size[%smode] = 2*s;\n", m->name);
-	      printf ("  mode_unit_size[%smode] = s;\n", m->name);
-	      printf ("  mode_base_align[%smode] = s & (~s + 1);\n",
+	      printf ("  mode_size[E_%smode] = 2*s;\n", m->name);
+	      printf ("  mode_unit_size[E_%smode] = s;\n", m->name);
+	      printf ("  mode_base_align[E_%smode] = s & (~s + 1);\n",
 		      m->name);
 	      break;
 
@@ -1620,10 +1622,10 @@  emit_mode_adjustments (void)
 	    case MODE_VECTOR_UFRACT:
 	    case MODE_VECTOR_ACCUM:
 	    case MODE_VECTOR_UACCUM:
-	      printf ("  mode_size[%smode] = %d*s;\n",
+	      printf ("  mode_size[E_%smode] = %d*s;\n",
 		      m->name, m->ncomponents);
-	      printf ("  mode_unit_size[%smode] = s;\n", m->name);
-	      printf ("  mode_base_align[%smode] = (%d*s) & (~(%d*s)+1);\n",
+	      printf ("  mode_unit_size[E_%smode] = s;\n", m->name);
+	      printf ("  mode_base_align[E_%smode] = (%d*s) & (~(%d*s)+1);\n",
 		      m->name, m->ncomponents, m->ncomponents);
 	      break;
 
@@ -1642,7 +1644,7 @@  emit_mode_adjustments (void)
     {
       printf ("\n  /* %s:%d */\n  s = %s;\n",
 	      a->file, a->line, a->adjustment);
-      printf ("  mode_base_align[%smode] = s;\n", a->mode->name);
+      printf ("  mode_base_align[E_%smode] = s;\n", a->mode->name);
 
       for (m = a->mode->contained; m; m = m->next_cont)
 	{
@@ -1650,7 +1652,7 @@  emit_mode_adjustments (void)
 	    {
 	    case MODE_COMPLEX_INT:
 	    case MODE_COMPLEX_FLOAT:
-	      printf ("  mode_base_align[%smode] = s;\n", m->name);
+	      printf ("  mode_base_align[E_%smode] = s;\n", m->name);
 	      break;
 
 	    case MODE_VECTOR_INT:
@@ -1659,7 +1661,7 @@  emit_mode_adjustments (void)
 	    case MODE_VECTOR_UFRACT:
 	    case MODE_VECTOR_ACCUM:
 	    case MODE_VECTOR_UACCUM:
-	      printf ("  mode_base_align[%smode] = %d*s;\n",
+	      printf ("  mode_base_align[E_%smode] = %d*s;\n",
 		      m->name, m->ncomponents);
 	      break;
 
@@ -1677,7 +1679,7 @@  emit_mode_adjustments (void)
     {
       printf ("\n  /* %s:%d */\n  s = %s;\n",
 	      a->file, a->line, a->adjustment);
-      printf ("  mode_ibit[%smode] = s;\n", a->mode->name);
+      printf ("  mode_ibit[E_%smode] = s;\n", a->mode->name);
     }
 
   /* Fbit adjustments don't have to propagate.  */
@@ -1685,12 +1687,12 @@  emit_mode_adjustments (void)
     {
       printf ("\n  /* %s:%d */\n  s = %s;\n",
 	      a->file, a->line, a->adjustment);
-      printf ("  mode_fbit[%smode] = s;\n", a->mode->name);
+      printf ("  mode_fbit[E_%smode] = s;\n", a->mode->name);
     }
 
   /* Real mode formats don't have to propagate anywhere.  */
   for (a = adj_format; a; a = a->next)
-    printf ("\n  /* %s:%d */\n  REAL_MODE_FORMAT (%smode) = %s;\n",
+    printf ("\n  /* %s:%d */\n  REAL_MODE_FORMAT (E_%smode) = %s;\n",
 	    a->file, a->line, a->mode->name, a->adjustment);
 
   puts ("}");
@@ -1768,7 +1770,7 @@  emit_mode_int_n (void)
       m = mode_sort[i];
       printf(" {\n");
       tagged_printf ("%u", m->int_n, m->name);
-      printf ("%smode,", m->name);
+      printf ("E_%smode,", m->name);
       printf(" },\n");
     }
 
Index: gcc/config/aarch64/aarch64-builtins.c
===================================================================
--- gcc/config/aarch64/aarch64-builtins.c	2017-07-05 16:29:19.581861907 +0100
+++ gcc/config/aarch64/aarch64-builtins.c	2017-07-13 09:18:17.560869355 +0100
@@ -41,30 +41,30 @@ 
 #include "gimple-iterator.h"
 #include "case-cfn-macros.h"
 
-#define v8qi_UP  V8QImode
-#define v4hi_UP  V4HImode
-#define v4hf_UP  V4HFmode
-#define v2si_UP  V2SImode
-#define v2sf_UP  V2SFmode
-#define v1df_UP  V1DFmode
-#define di_UP    DImode
-#define df_UP    DFmode
-#define v16qi_UP V16QImode
-#define v8hi_UP  V8HImode
-#define v8hf_UP  V8HFmode
-#define v4si_UP  V4SImode
-#define v4sf_UP  V4SFmode
-#define v2di_UP  V2DImode
-#define v2df_UP  V2DFmode
-#define ti_UP	 TImode
-#define oi_UP	 OImode
-#define ci_UP	 CImode
-#define xi_UP	 XImode
-#define si_UP    SImode
-#define sf_UP    SFmode
-#define hi_UP    HImode
-#define hf_UP    HFmode
-#define qi_UP    QImode
+#define v8qi_UP  E_V8QImode
+#define v4hi_UP  E_V4HImode
+#define v4hf_UP  E_V4HFmode
+#define v2si_UP  E_V2SImode
+#define v2sf_UP  E_V2SFmode
+#define v1df_UP  E_V1DFmode
+#define di_UP    E_DImode
+#define df_UP    E_DFmode
+#define v16qi_UP E_V16QImode
+#define v8hi_UP  E_V8HImode
+#define v8hf_UP  E_V8HFmode
+#define v4si_UP  E_V4SImode
+#define v4sf_UP  E_V4SFmode
+#define v2di_UP  E_V2DImode
+#define v2df_UP  E_V2DFmode
+#define ti_UP	 E_TImode
+#define oi_UP	 E_OImode
+#define ci_UP	 E_CImode
+#define xi_UP	 E_XImode
+#define si_UP    E_SImode
+#define sf_UP    E_SFmode
+#define hi_UP    E_HImode
+#define hf_UP    E_HFmode
+#define qi_UP    E_QImode
 #define UP(X) X##_UP
 
 #define SIMD_MAX_BUILTIN_ARGS 5
@@ -385,7 +385,7 @@  enum aarch64_builtins
 
 #undef CRC32_BUILTIN
 #define CRC32_BUILTIN(N, M) \
-  {"__builtin_aarch64_"#N, M##mode, CODE_FOR_aarch64_##N, AARCH64_BUILTIN_##N},
+  {"__builtin_aarch64_"#N, E_##M##mode, CODE_FOR_aarch64_##N, AARCH64_BUILTIN_##N},
 
 static aarch64_crc_builtin_datum aarch64_crc_builtin_data[] = {
   AARCH64_CRC32_BUILTINS
@@ -464,7 +464,7 @@  struct aarch64_simd_type_info
 };
 
 #define ENTRY(E, M, Q, G)  \
-  {E, "__" #E, #G "__" #E, NULL_TREE, NULL_TREE, M##mode, qualifier_##Q},
+  {E, "__" #E, #G "__" #E, NULL_TREE, NULL_TREE, E_##M##mode, qualifier_##Q},
 static struct aarch64_simd_type_info aarch64_simd_types [] = {
 #include "aarch64-simd-builtin-types.def"
 };
Index: gcc/config/aarch64/aarch64.c
===================================================================
--- gcc/config/aarch64/aarch64.c	2017-07-08 11:37:45.755825991 +0100
+++ gcc/config/aarch64/aarch64.c	2017-07-13 09:18:17.561869242 +0100
@@ -3124,7 +3124,7 @@  aarch64_gen_storewb_pair (machine_mode m
 aarch64_push_regs (unsigned regno1, unsigned regno2, HOST_WIDE_INT adjustment)
 {
   rtx_insn *insn;
-  machine_mode mode = (regno1 <= R30_REGNUM) ? DImode : DFmode;
+  machine_mode mode = (regno1 <= R30_REGNUM) ? E_DImode : E_DFmode;
 
   if (regno2 == INVALID_REGNUM)
     return aarch64_pushwb_single_reg (mode, regno1, adjustment);
@@ -3167,7 +3167,7 @@  aarch64_gen_loadwb_pair (machine_mode mo
 aarch64_pop_regs (unsigned regno1, unsigned regno2, HOST_WIDE_INT adjustment,
 		  rtx *cfi_ops)
 {
-  machine_mode mode = (regno1 <= R30_REGNUM) ? DImode : DFmode;
+  machine_mode mode = (regno1 <= R30_REGNUM) ? E_DImode : E_DFmode;
   rtx reg1 = gen_rtx_REG (mode, regno1);
 
   *cfi_ops = alloc_reg_note (REG_CFA_RESTORE, reg1, *cfi_ops);
@@ -3505,7 +3505,7 @@  aarch64_process_components (sbitmap comp
     {
       /* AAPCS64 section 5.1.2 requires only the bottom 64 bits to be saved
 	 so DFmode for the vector registers is enough.  */
-      machine_mode mode = GP_REGNUM_P (regno) ? DImode : DFmode;
+      machine_mode mode = GP_REGNUM_P (regno) ? E_DImode : E_DFmode;
       rtx reg = gen_rtx_REG (mode, regno);
       HOST_WIDE_INT offset = cfun->machine->frame.reg_offset[regno];
       if (!frame_pointer_needed)
Index: gcc/config/alpha/alpha.c
===================================================================
--- gcc/config/alpha/alpha.c	2017-05-24 11:10:23.194093438 +0100
+++ gcc/config/alpha/alpha.c	2017-07-13 09:18:17.562869128 +0100
@@ -2780,7 +2780,7 @@  alpha_emit_conditional_move (rtx cmp, ma
       emit_insn (gen_rtx_SET (tem, gen_rtx_fmt_ee (cmp_code, cmp_mode,
 						   op0, op1)));
 
-      cmp_mode = cmp_mode == DImode ? DFmode : DImode;
+      cmp_mode = cmp_mode == DImode ? E_DFmode : E_DImode;
       op0 = gen_lowpart (cmp_mode, tem);
       op1 = CONST0_RTX (cmp_mode);
       cmp = gen_rtx_fmt_ee (code, VOIDmode, op0, op1);
Index: gcc/config/arm/arm-builtins.c
===================================================================
--- gcc/config/arm/arm-builtins.c	2017-07-05 16:29:19.583661907 +0100
+++ gcc/config/arm/arm-builtins.c	2017-07-13 09:18:17.563869015 +0100
@@ -255,24 +255,24 @@  #define STORE1_QUALIFIERS (arm_store1_qu
       qualifier_none, qualifier_struct_load_store_lane_index };
 #define STORE1LANE_QUALIFIERS (arm_storestruct_lane_qualifiers)
 
-#define v8qi_UP  V8QImode
-#define v4hi_UP  V4HImode
-#define v4hf_UP  V4HFmode
-#define v2si_UP  V2SImode
-#define v2sf_UP  V2SFmode
-#define di_UP    DImode
-#define v16qi_UP V16QImode
-#define v8hi_UP  V8HImode
-#define v8hf_UP  V8HFmode
-#define v4si_UP  V4SImode
-#define v4sf_UP  V4SFmode
-#define v2di_UP  V2DImode
-#define ti_UP	 TImode
-#define ei_UP	 EImode
-#define oi_UP	 OImode
-#define hf_UP	 HFmode
-#define si_UP	 SImode
-#define void_UP	 VOIDmode
+#define v8qi_UP  E_V8QImode
+#define v4hi_UP  E_V4HImode
+#define v4hf_UP  E_V4HFmode
+#define v2si_UP  E_V2SImode
+#define v2sf_UP  E_V2SFmode
+#define di_UP    E_DImode
+#define v16qi_UP E_V16QImode
+#define v8hi_UP  E_V8HImode
+#define v8hf_UP  E_V8HFmode
+#define v4si_UP  E_V4SImode
+#define v4sf_UP  E_V4SFmode
+#define v2di_UP  E_V2DImode
+#define ti_UP	 E_TImode
+#define ei_UP	 E_EImode
+#define oi_UP	 E_OImode
+#define hf_UP	 E_HFmode
+#define si_UP	 E_SImode
+#define void_UP	 E_VOIDmode
 
 #define UP(X) X##_UP
 
Index: gcc/config/arm/arm.c
===================================================================
--- gcc/config/arm/arm.c	2017-07-08 11:37:45.851016912 +0100
+++ gcc/config/arm/arm.c	2017-07-13 09:18:17.565868789 +0100
@@ -2552,52 +2552,52 @@  arm_init_libfuncs (void)
   {
     const arm_fixed_mode_set fixed_arith_modes[] =
       {
-	{ QQmode, "qq" },
-	{ UQQmode, "uqq" },
-	{ HQmode, "hq" },
-	{ UHQmode, "uhq" },
-	{ SQmode, "sq" },
-	{ USQmode, "usq" },
-	{ DQmode, "dq" },
-	{ UDQmode, "udq" },
-	{ TQmode, "tq" },
-	{ UTQmode, "utq" },
-	{ HAmode, "ha" },
-	{ UHAmode, "uha" },
-	{ SAmode, "sa" },
-	{ USAmode, "usa" },
-	{ DAmode, "da" },
-	{ UDAmode, "uda" },
-	{ TAmode, "ta" },
-	{ UTAmode, "uta" }
+	{ E_QQmode, "qq" },
+	{ E_UQQmode, "uqq" },
+	{ E_HQmode, "hq" },
+	{ E_UHQmode, "uhq" },
+	{ E_SQmode, "sq" },
+	{ E_USQmode, "usq" },
+	{ E_DQmode, "dq" },
+	{ E_UDQmode, "udq" },
+	{ E_TQmode, "tq" },
+	{ E_UTQmode, "utq" },
+	{ E_HAmode, "ha" },
+	{ E_UHAmode, "uha" },
+	{ E_SAmode, "sa" },
+	{ E_USAmode, "usa" },
+	{ E_DAmode, "da" },
+	{ E_UDAmode, "uda" },
+	{ E_TAmode, "ta" },
+	{ E_UTAmode, "uta" }
       };
     const arm_fixed_mode_set fixed_conv_modes[] =
       {
-	{ QQmode, "qq" },
-	{ UQQmode, "uqq" },
-	{ HQmode, "hq" },
-	{ UHQmode, "uhq" },
-	{ SQmode, "sq" },
-	{ USQmode, "usq" },
-	{ DQmode, "dq" },
-	{ UDQmode, "udq" },
-	{ TQmode, "tq" },
-	{ UTQmode, "utq" },
-	{ HAmode, "ha" },
-	{ UHAmode, "uha" },
-	{ SAmode, "sa" },
-	{ USAmode, "usa" },
-	{ DAmode, "da" },
-	{ UDAmode, "uda" },
-	{ TAmode, "ta" },
-	{ UTAmode, "uta" },
-	{ QImode, "qi" },
-	{ HImode, "hi" },
-	{ SImode, "si" },
-	{ DImode, "di" },
-	{ TImode, "ti" },
-	{ SFmode, "sf" },
-	{ DFmode, "df" }
+	{ E_QQmode, "qq" },
+	{ E_UQQmode, "uqq" },
+	{ E_HQmode, "hq" },
+	{ E_UHQmode, "uhq" },
+	{ E_SQmode, "sq" },
+	{ E_USQmode, "usq" },
+	{ E_DQmode, "dq" },
+	{ E_UDQmode, "udq" },
+	{ E_TQmode, "tq" },
+	{ E_UTQmode, "utq" },
+	{ E_HAmode, "ha" },
+	{ E_UHAmode, "uha" },
+	{ E_SAmode, "sa" },
+	{ E_USAmode, "usa" },
+	{ E_DAmode, "da" },
+	{ E_UDAmode, "uda" },
+	{ E_TAmode, "ta" },
+	{ E_UTAmode, "uta" },
+	{ E_QImode, "qi" },
+	{ E_HImode, "hi" },
+	{ E_SImode, "si" },
+	{ E_DImode, "di" },
+	{ E_TImode, "ti" },
+	{ E_SFmode, "sf" },
+	{ E_DFmode, "df" }
       };
     unsigned int i, j;
 
Index: gcc/config/i386/i386-builtin-types.awk
===================================================================
--- gcc/config/i386/i386-builtin-types.awk	2017-02-23 19:54:22.000000000 +0000
+++ gcc/config/i386/i386-builtin-types.awk	2017-07-13 09:18:17.565868789 +0100
@@ -187,7 +187,7 @@  END {
 	    printf ",\n  "
 	else
 	    printf ", "
-	printf vect_mode[i] "mode"
+	printf "E_" vect_mode[i] "mode"
     }
     print "\n};\n\n"
 
Index: gcc/config/i386/i386-builtin.def
===================================================================
--- gcc/config/i386/i386-builtin.def	2017-07-08 11:37:45.816948583 +0100
+++ gcc/config/i386/i386-builtin.def	2017-07-13 09:18:17.566868676 +0100
@@ -66,11 +66,11 @@  BDESC_END (COMI, PCMPESTR)
 BDESC_FIRST (pcmpestr, PCMPESTR,
        OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpestr, "__builtin_ia32_pcmpestri128", IX86_BUILTIN_PCMPESTRI128, UNKNOWN, 0)
 BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpestr, "__builtin_ia32_pcmpestrm128", IX86_BUILTIN_PCMPESTRM128, UNKNOWN, 0)
-BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpestr, "__builtin_ia32_pcmpestria128", IX86_BUILTIN_PCMPESTRA128, UNKNOWN, (int) CCAmode)
-BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpestr, "__builtin_ia32_pcmpestric128", IX86_BUILTIN_PCMPESTRC128, UNKNOWN, (int) CCCmode)
-BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpestr, "__builtin_ia32_pcmpestrio128", IX86_BUILTIN_PCMPESTRO128, UNKNOWN, (int) CCOmode)
-BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpestr, "__builtin_ia32_pcmpestris128", IX86_BUILTIN_PCMPESTRS128, UNKNOWN, (int) CCSmode)
-BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpestr, "__builtin_ia32_pcmpestriz128", IX86_BUILTIN_PCMPESTRZ128, UNKNOWN, (int) CCZmode)
+BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpestr, "__builtin_ia32_pcmpestria128", IX86_BUILTIN_PCMPESTRA128, UNKNOWN, (int) E_CCAmode)
+BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpestr, "__builtin_ia32_pcmpestric128", IX86_BUILTIN_PCMPESTRC128, UNKNOWN, (int) E_CCCmode)
+BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpestr, "__builtin_ia32_pcmpestrio128", IX86_BUILTIN_PCMPESTRO128, UNKNOWN, (int) E_CCOmode)
+BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpestr, "__builtin_ia32_pcmpestris128", IX86_BUILTIN_PCMPESTRS128, UNKNOWN, (int) E_CCSmode)
+BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpestr, "__builtin_ia32_pcmpestriz128", IX86_BUILTIN_PCMPESTRZ128, UNKNOWN, (int) E_CCZmode)
 
 BDESC_END (PCMPESTR, PCMPISTR)
 
@@ -78,11 +78,11 @@  BDESC_END (PCMPESTR, PCMPISTR)
 BDESC_FIRST (pcmpistr, PCMPISTR,
        OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpistr, "__builtin_ia32_pcmpistri128", IX86_BUILTIN_PCMPISTRI128, UNKNOWN, 0)
 BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpistr, "__builtin_ia32_pcmpistrm128", IX86_BUILTIN_PCMPISTRM128, UNKNOWN, 0)
-BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpistr, "__builtin_ia32_pcmpistria128", IX86_BUILTIN_PCMPISTRA128, UNKNOWN, (int) CCAmode)
-BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpistr, "__builtin_ia32_pcmpistric128", IX86_BUILTIN_PCMPISTRC128, UNKNOWN, (int) CCCmode)
-BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpistr, "__builtin_ia32_pcmpistrio128", IX86_BUILTIN_PCMPISTRO128, UNKNOWN, (int) CCOmode)
-BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpistr, "__builtin_ia32_pcmpistris128", IX86_BUILTIN_PCMPISTRS128, UNKNOWN, (int) CCSmode)
-BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpistr, "__builtin_ia32_pcmpistriz128", IX86_BUILTIN_PCMPISTRZ128, UNKNOWN, (int) CCZmode)
+BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpistr, "__builtin_ia32_pcmpistria128", IX86_BUILTIN_PCMPISTRA128, UNKNOWN, (int) E_CCAmode)
+BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpistr, "__builtin_ia32_pcmpistric128", IX86_BUILTIN_PCMPISTRC128, UNKNOWN, (int) E_CCCmode)
+BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpistr, "__builtin_ia32_pcmpistrio128", IX86_BUILTIN_PCMPISTRO128, UNKNOWN, (int) E_CCOmode)
+BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpistr, "__builtin_ia32_pcmpistris128", IX86_BUILTIN_PCMPISTRS128, UNKNOWN, (int) E_CCSmode)
+BDESC (OPTION_MASK_ISA_SSE4_2, CODE_FOR_sse4_2_pcmpistr, "__builtin_ia32_pcmpistriz128", IX86_BUILTIN_PCMPISTRZ128, UNKNOWN, (int) E_CCZmode)
 
 BDESC_END (PCMPISTR, SPECIAL_ARGS)
 
Index: gcc/config/microblaze/microblaze.c
===================================================================
--- gcc/config/microblaze/microblaze.c	2017-07-05 16:29:19.589061906 +0100
+++ gcc/config/microblaze/microblaze.c	2017-07-13 09:18:17.567868562 +0100
@@ -374,7 +374,7 @@  double_memory_operand (rtx op, machine_m
     return 1;
 
   return memory_address_p ((GET_MODE_CLASS (mode) == MODE_INT
-			    ? SImode : SFmode),
+			    ? E_SImode : E_SFmode),
 			   plus_constant (Pmode, addr, 4));
 }
 
Index: gcc/config/mmix/mmix.c
===================================================================
--- gcc/config/mmix/mmix.c	2017-02-23 19:54:26.000000000 +0000
+++ gcc/config/mmix/mmix.c	2017-07-13 09:18:17.567868562 +0100
@@ -2647,12 +2647,12 @@  #define CCEND {UNKNOWN, NULL, NULL}
 #undef CCEND
 
   static const struct cc_type_conv cc_convs[]
-    = {{CC_FUNmode, cc_fun_convs},
-       {CC_FPmode, cc_fp_convs},
-       {CC_FPEQmode, cc_fpeq_convs},
-       {CC_UNSmode, cc_uns_convs},
-       {CCmode, cc_signed_convs},
-       {DImode, cc_di_convs}};
+    = {{E_CC_FUNmode, cc_fun_convs},
+       {E_CC_FPmode, cc_fp_convs},
+       {E_CC_FPEQmode, cc_fpeq_convs},
+       {E_CC_UNSmode, cc_uns_convs},
+       {E_CCmode, cc_signed_convs},
+       {E_DImode, cc_di_convs}};
 
   size_t i;
   int j;
Index: gcc/config/powerpcspe/powerpcspe.c
===================================================================
--- gcc/config/powerpcspe/powerpcspe.c	2017-07-05 16:29:19.591761905 +0100
+++ gcc/config/powerpcspe/powerpcspe.c	2017-07-13 09:18:17.571868109 +0100
@@ -3543,67 +3543,67 @@  rs6000_init_hard_regno_mode_ok (bool glo
       };
 
       static const struct fuse_insns addis_insns[] = {
-	{ SFmode, DImode, RELOAD_REG_FPR,
+	{ E_SFmode, E_DImode, RELOAD_REG_FPR,
 	  CODE_FOR_fusion_vsx_di_sf_load,
 	  CODE_FOR_fusion_vsx_di_sf_store },
 
-	{ SFmode, SImode, RELOAD_REG_FPR,
+	{ E_SFmode, E_SImode, RELOAD_REG_FPR,
 	  CODE_FOR_fusion_vsx_si_sf_load,
 	  CODE_FOR_fusion_vsx_si_sf_store },
 
-	{ DFmode, DImode, RELOAD_REG_FPR,
+	{ E_DFmode, E_DImode, RELOAD_REG_FPR,
 	  CODE_FOR_fusion_vsx_di_df_load,
 	  CODE_FOR_fusion_vsx_di_df_store },
 
-	{ DFmode, SImode, RELOAD_REG_FPR,
+	{ E_DFmode, E_SImode, RELOAD_REG_FPR,
 	  CODE_FOR_fusion_vsx_si_df_load,
 	  CODE_FOR_fusion_vsx_si_df_store },
 
-	{ DImode, DImode, RELOAD_REG_FPR,
+	{ E_DImode, E_DImode, RELOAD_REG_FPR,
 	  CODE_FOR_fusion_vsx_di_di_load,
 	  CODE_FOR_fusion_vsx_di_di_store },
 
-	{ DImode, SImode, RELOAD_REG_FPR,
+	{ E_DImode, E_SImode, RELOAD_REG_FPR,
 	  CODE_FOR_fusion_vsx_si_di_load,
 	  CODE_FOR_fusion_vsx_si_di_store },
 
-	{ QImode, DImode, RELOAD_REG_GPR,
+	{ E_QImode, E_DImode, RELOAD_REG_GPR,
 	  CODE_FOR_fusion_gpr_di_qi_load,
 	  CODE_FOR_fusion_gpr_di_qi_store },
 
-	{ QImode, SImode, RELOAD_REG_GPR,
+	{ E_QImode, E_SImode, RELOAD_REG_GPR,
 	  CODE_FOR_fusion_gpr_si_qi_load,
 	  CODE_FOR_fusion_gpr_si_qi_store },
 
-	{ HImode, DImode, RELOAD_REG_GPR,
+	{ E_HImode, E_DImode, RELOAD_REG_GPR,
 	  CODE_FOR_fusion_gpr_di_hi_load,
 	  CODE_FOR_fusion_gpr_di_hi_store },
 
-	{ HImode, SImode, RELOAD_REG_GPR,
+	{ E_HImode, E_SImode, RELOAD_REG_GPR,
 	  CODE_FOR_fusion_gpr_si_hi_load,
 	  CODE_FOR_fusion_gpr_si_hi_store },
 
-	{ SImode, DImode, RELOAD_REG_GPR,
+	{ E_SImode, E_DImode, RELOAD_REG_GPR,
 	  CODE_FOR_fusion_gpr_di_si_load,
 	  CODE_FOR_fusion_gpr_di_si_store },
 
-	{ SImode, SImode, RELOAD_REG_GPR,
+	{ E_SImode, E_SImode, RELOAD_REG_GPR,
 	  CODE_FOR_fusion_gpr_si_si_load,
 	  CODE_FOR_fusion_gpr_si_si_store },
 
-	{ SFmode, DImode, RELOAD_REG_GPR,
+	{ E_SFmode, E_DImode, RELOAD_REG_GPR,
 	  CODE_FOR_fusion_gpr_di_sf_load,
 	  CODE_FOR_fusion_gpr_di_sf_store },
 
-	{ SFmode, SImode, RELOAD_REG_GPR,
+	{ E_SFmode, E_SImode, RELOAD_REG_GPR,
 	  CODE_FOR_fusion_gpr_si_sf_load,
 	  CODE_FOR_fusion_gpr_si_sf_store },
 
-	{ DImode, DImode, RELOAD_REG_GPR,
+	{ E_DImode, E_DImode, RELOAD_REG_GPR,
 	  CODE_FOR_fusion_gpr_di_di_load,
 	  CODE_FOR_fusion_gpr_di_di_store },
 
-	{ DFmode, DImode, RELOAD_REG_GPR,
+	{ E_DFmode, E_DImode, RELOAD_REG_GPR,
 	  CODE_FOR_fusion_gpr_di_df_load,
 	  CODE_FOR_fusion_gpr_di_df_store },
       };
@@ -15456,7 +15456,7 @@  htm_expand_builtin (tree exp, rtx target
 
 	if (nonvoid)
 	  {
-	    machine_mode tmode = (uses_spr) ? insn_op->mode : SImode;
+	    machine_mode tmode = (uses_spr) ? insn_op->mode : E_SImode;
 	    if (!target
 		|| GET_MODE (target) != tmode
 		|| (uses_spr && !(*insn_op->predicate) (target, tmode)))
Index: gcc/config/rl78/rl78.c
===================================================================
--- gcc/config/rl78/rl78.c	2017-07-05 16:29:19.592661905 +0100
+++ gcc/config/rl78/rl78.c	2017-07-13 09:18:17.571868109 +0100
@@ -86,12 +86,12 @@  struct mduc_reg_type
 
 struct mduc_reg_type  mduc_regs[] =
 {
-  {0xf00e8, QImode},
-  {0xffff0, HImode},
-  {0xffff2, HImode},
-  {0xf2224, HImode},
-  {0xf00e0, HImode},
-  {0xf00e2, HImode}
+  {0xf00e8, E_QImode},
+  {0xffff0, E_HImode},
+  {0xffff2, E_HImode},
+  {0xf2224, E_HImode},
+  {0xf00e0, E_HImode},
+  {0xf00e2, E_HImode}
 };
 
 struct GTY(()) machine_function
Index: gcc/config/rs6000/rs6000.c
===================================================================
--- gcc/config/rs6000/rs6000.c	2017-07-13 09:17:39.960572804 +0100
+++ gcc/config/rs6000/rs6000.c	2017-07-13 09:18:17.574867770 +0100
@@ -3499,67 +3499,67 @@  rs6000_init_hard_regno_mode_ok (bool glo
       };
 
       static const struct fuse_insns addis_insns[] = {
-	{ SFmode, DImode, RELOAD_REG_FPR,
+	{ E_SFmode, E_DImode, RELOAD_REG_FPR,
 	  CODE_FOR_fusion_vsx_di_sf_load,
 	  CODE_FOR_fusion_vsx_di_sf_store },
 
-	{ SFmode, SImode, RELOAD_REG_FPR,
+	{ E_SFmode, E_SImode, RELOAD_REG_FPR,
 	  CODE_FOR_fusion_vsx_si_sf_load,
 	  CODE_FOR_fusion_vsx_si_sf_store },
 
-	{ DFmode, DImode, RELOAD_REG_FPR,
+	{ E_DFmode, E_DImode, RELOAD_REG_FPR,
 	  CODE_FOR_fusion_vsx_di_df_load,
 	  CODE_FOR_fusion_vsx_di_df_store },
 
-	{ DFmode, SImode, RELOAD_REG_FPR,
+	{ E_DFmode, E_SImode, RELOAD_REG_FPR,
 	  CODE_FOR_fusion_vsx_si_df_load,
 	  CODE_FOR_fusion_vsx_si_df_store },
 
-	{ DImode, DImode, RELOAD_REG_FPR,
+	{ E_DImode, E_DImode, RELOAD_REG_FPR,
 	  CODE_FOR_fusion_vsx_di_di_load,
 	  CODE_FOR_fusion_vsx_di_di_store },
 
-	{ DImode, SImode, RELOAD_REG_FPR,
+	{ E_DImode, E_SImode, RELOAD_REG_FPR,
 	  CODE_FOR_fusion_vsx_si_di_load,
 	  CODE_FOR_fusion_vsx_si_di_store },
 
-	{ QImode, DImode, RELOAD_REG_GPR,
+	{ E_QImode, E_DImode, RELOAD_REG_GPR,
 	  CODE_FOR_fusion_gpr_di_qi_load,
 	  CODE_FOR_fusion_gpr_di_qi_store },
 
-	{ QImode, SImode, RELOAD_REG_GPR,
+	{ E_QImode, E_SImode, RELOAD_REG_GPR,
 	  CODE_FOR_fusion_gpr_si_qi_load,
 	  CODE_FOR_fusion_gpr_si_qi_store },
 
-	{ HImode, DImode, RELOAD_REG_GPR,
+	{ E_HImode, E_DImode, RELOAD_REG_GPR,
 	  CODE_FOR_fusion_gpr_di_hi_load,
 	  CODE_FOR_fusion_gpr_di_hi_store },
 
-	{ HImode, SImode, RELOAD_REG_GPR,
+	{ E_HImode, E_SImode, RELOAD_REG_GPR,
 	  CODE_FOR_fusion_gpr_si_hi_load,
 	  CODE_FOR_fusion_gpr_si_hi_store },
 
-	{ SImode, DImode, RELOAD_REG_GPR,
+	{ E_SImode, E_DImode, RELOAD_REG_GPR,
 	  CODE_FOR_fusion_gpr_di_si_load,
 	  CODE_FOR_fusion_gpr_di_si_store },
 
-	{ SImode, SImode, RELOAD_REG_GPR,
+	{ E_SImode, E_SImode, RELOAD_REG_GPR,
 	  CODE_FOR_fusion_gpr_si_si_load,
 	  CODE_FOR_fusion_gpr_si_si_store },
 
-	{ SFmode, DImode, RELOAD_REG_GPR,
+	{ E_SFmode, E_DImode, RELOAD_REG_GPR,
 	  CODE_FOR_fusion_gpr_di_sf_load,
 	  CODE_FOR_fusion_gpr_di_sf_store },
 
-	{ SFmode, SImode, RELOAD_REG_GPR,
+	{ E_SFmode, E_SImode, RELOAD_REG_GPR,
 	  CODE_FOR_fusion_gpr_si_sf_load,
 	  CODE_FOR_fusion_gpr_si_sf_store },
 
-	{ DImode, DImode, RELOAD_REG_GPR,
+	{ E_DImode, E_DImode, RELOAD_REG_GPR,
 	  CODE_FOR_fusion_gpr_di_di_load,
 	  CODE_FOR_fusion_gpr_di_di_store },
 
-	{ DFmode, DImode, RELOAD_REG_GPR,
+	{ E_DFmode, E_DImode, RELOAD_REG_GPR,
 	  CODE_FOR_fusion_gpr_di_df_load,
 	  CODE_FOR_fusion_gpr_di_df_store },
       };
@@ -14939,7 +14939,7 @@  htm_expand_builtin (tree exp, rtx target
 
 	if (nonvoid)
 	  {
-	    machine_mode tmode = (uses_spr) ? insn_op->mode : SImode;
+	    machine_mode tmode = (uses_spr) ? insn_op->mode : E_SImode;
 	    if (!target
 		|| GET_MODE (target) != tmode
 		|| (uses_spr && !(*insn_op->predicate) (target, tmode)))
Index: gcc/config/sh/sh.h
===================================================================
--- gcc/config/sh/sh.h	2017-02-23 19:54:22.000000000 +0000
+++ gcc/config/sh/sh.h	2017-07-13 09:18:17.574867770 +0100
@@ -689,7 +689,8 @@  #define VALID_REGISTER_P(REGNO) \
 /* The mode that should be generally used to store a register by
    itself in the stack, or to load it back.  */
 #define REGISTER_NATURAL_MODE(REGNO) \
-  (FP_REGISTER_P (REGNO) ? SFmode : XD_REGISTER_P (REGNO) ? DFmode : SImode)
+  (FP_REGISTER_P (REGNO) ? E_SFmode \
+   : XD_REGISTER_P (REGNO) ? E_DFmode : E_SImode)
 
 
 #define FIRST_PSEUDO_REGISTER 156
Index: gcc/config/sparc/sparc.c
===================================================================
--- gcc/config/sparc/sparc.c	2017-07-12 14:49:07.993948709 +0100
+++ gcc/config/sparc/sparc.c	2017-07-13 09:18:17.575867657 +0100
@@ -5502,17 +5502,17 @@  emit_save_or_restore_regs (unsigned int
 
 	  if (reg0 && reg1)
 	    {
-	      mode = SPARC_INT_REG_P (i) ? DImode : DFmode;
+	      mode = SPARC_INT_REG_P (i) ? E_DImode : E_DFmode;
 	      regno = i;
 	    }
 	  else if (reg0)
 	    {
-	      mode = SPARC_INT_REG_P (i) ? SImode : SFmode;
+	      mode = SPARC_INT_REG_P (i) ? E_SImode : E_SFmode;
 	      regno = i;
 	    }
 	  else if (reg1)
 	    {
-	      mode = SPARC_INT_REG_P (i) ? SImode : SFmode;
+	      mode = SPARC_INT_REG_P (i) ? E_SImode : E_SFmode;
 	      regno = i + 1;
 	      offset += 4;
 	    }
Index: gcc/config/xtensa/xtensa.c
===================================================================
--- gcc/config/xtensa/xtensa.c	2017-06-16 07:49:01.164077421 +0100
+++ gcc/config/xtensa/xtensa.c	2017-07-13 09:18:17.576867543 +0100
@@ -2331,7 +2331,8 @@  print_operand (FILE *file, rtx x, int le
       if (GET_CODE (x) == MEM
 	  && (GET_MODE (x) == DFmode || GET_MODE (x) == DImode))
 	{
-	  x = adjust_address (x, GET_MODE (x) == DFmode ? SFmode : SImode, 4);
+	  x = adjust_address (x, GET_MODE (x) == DFmode ? E_SFmode : E_SImode,
+			      4);
 	  output_address (GET_MODE (x), XEXP (x, 0));
 	}
       else
Index: gcc/expmed.h
===================================================================
--- gcc/expmed.h	2017-07-05 16:29:19.597161905 +0100
+++ gcc/expmed.h	2017-07-13 09:18:17.576867543 +0100
@@ -136,10 +136,10 @@  #define NUM_ALG_HASH_ENTRIES 307
 #define NUM_MODE_INT \
   (MAX_MODE_INT - MIN_MODE_INT + 1)
 #define NUM_MODE_PARTIAL_INT \
-  (MIN_MODE_PARTIAL_INT == VOIDmode ? 0 \
+  (MIN_MODE_PARTIAL_INT == E_VOIDmode ? 0 \
    : MAX_MODE_PARTIAL_INT - MIN_MODE_PARTIAL_INT + 1)
 #define NUM_MODE_VECTOR_INT \
-  (MIN_MODE_VECTOR_INT == VOIDmode ? 0 \
+  (MIN_MODE_VECTOR_INT == E_VOIDmode ? 0 \
    : MAX_MODE_VECTOR_INT - MIN_MODE_VECTOR_INT + 1)
 
 #define NUM_MODE_IP_INT (NUM_MODE_INT + NUM_MODE_PARTIAL_INT)
Index: gcc/genoutput.c
===================================================================
--- gcc/genoutput.c	2017-02-23 19:54:03.000000000 +0000
+++ gcc/genoutput.c	2017-07-13 09:18:17.576867543 +0100
@@ -127,7 +127,7 @@  struct operand_data
 
 static struct operand_data null_operand =
 {
-  0, 0, "", "", VOIDmode, 0, 0, 0, 0, 0
+  0, 0, "", "", E_VOIDmode, 0, 0, 0, 0, 0
 };
 
 static struct operand_data *odata = &null_operand;
@@ -253,7 +253,7 @@  output_operand_data (void)
 
       printf ("    \"%s\",\n", d->constraint ? d->constraint : "");
 
-      printf ("    %smode,\n", GET_MODE_NAME (d->mode));
+      printf ("    E_%smode,\n", GET_MODE_NAME (d->mode));
 
       printf ("    %d,\n", d->strict_low);
 
Index: gcc/genrecog.c
===================================================================
--- gcc/genrecog.c	2017-07-05 16:29:19.598061904 +0100
+++ gcc/genrecog.c	2017-07-13 09:18:17.577867430 +0100
@@ -4489,7 +4489,7 @@  print_parameter_value (const parameter &
 	break;
 
       case parameter::MODE:
-	printf ("%smode", GET_MODE_NAME ((machine_mode) param.value));
+	printf ("E_%smode", GET_MODE_NAME ((machine_mode) param.value));
 	break;
 
       case parameter::INT:
Index: gcc/lra.c
===================================================================
--- gcc/lra.c	2017-04-18 19:52:34.020571018 +0100
+++ gcc/lra.c	2017-07-13 09:18:17.577867430 +0100
@@ -596,7 +596,7 @@  static struct lra_operand_data debug_ope
   {
     NULL, /* alternative  */
     0, /* early_clobber_alts */
-    VOIDmode, /* We are not interesting in the operand mode.  */
+    E_VOIDmode, /* We are not interesting in the operand mode.  */
     OP_IN,
     0, 0, 0, 0
   };