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[92.40.249.184]) by smtp.gmail.com with ESMTPSA id q70sm4594434wrb.3.2017.07.13.01.52.08 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 13 Jul 2017 01:52:09 -0700 (PDT) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@linaro.org Subject: [38/77] Move SCALAR_INT_MODE_P out of strict_volatile_bitfield_p References: <8760ewohsv.fsf@linaro.org> Date: Thu, 13 Jul 2017 09:52:07 +0100 In-Reply-To: <8760ewohsv.fsf@linaro.org> (Richard Sandiford's message of "Thu, 13 Jul 2017 09:35:44 +0100") Message-ID: <87lgnshg7c.fsf@linaro.org> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.2 (gnu/linux) MIME-Version: 1.0 strict_volatile_bitfield_p returns false for any mode that isn't a scalar integer. This patch moves the check to the caller and makes strict_volatile_bitfield_p take the mode as a scalar_int_mode. The handling of a true return can then also use the mode as a scalar_int_mode. 2017-07-13 Richard Sandiford Alan Hayward David Sherwood gcc/ * expmed.c (strict_volatile_bitfield_p): Change the type of fieldmode to scalar_int_mode. Remove check for SCALAR_INT_MODE_P. (store_bit_field): Check is_a before calling strict_volatile_bitfield_p. (extract_bit_field): Likewise. Index: gcc/expmed.c =================================================================== --- gcc/expmed.c 2017-07-13 09:18:40.784633351 +0100 +++ gcc/expmed.c 2017-07-13 09:18:41.241595261 +0100 @@ -514,7 +514,7 @@ lowpart_bit_field_p (unsigned HOST_WIDE_ static bool strict_volatile_bitfield_p (rtx op0, unsigned HOST_WIDE_INT bitsize, unsigned HOST_WIDE_INT bitnum, - machine_mode fieldmode, + scalar_int_mode fieldmode, unsigned HOST_WIDE_INT bitregion_start, unsigned HOST_WIDE_INT bitregion_end) { @@ -527,11 +527,6 @@ strict_volatile_bitfield_p (rtx op0, uns || flag_strict_volatile_bitfields <= 0) return false; - /* Non-integral modes likely only happen with packed structures. - Punt. */ - if (!SCALAR_INT_MODE_P (fieldmode)) - return false; - /* The bit size must not be larger than the field mode, and the field mode must not be larger than a word. */ if (bitsize > modesize || modesize > BITS_PER_WORD) @@ -1056,19 +1051,21 @@ store_bit_field (rtx str_rtx, unsigned H rtx value, bool reverse) { /* Handle -fstrict-volatile-bitfields in the cases where it applies. */ - if (strict_volatile_bitfield_p (str_rtx, bitsize, bitnum, fieldmode, - bitregion_start, bitregion_end)) + scalar_int_mode int_mode; + if (is_a (fieldmode, &int_mode) + && strict_volatile_bitfield_p (str_rtx, bitsize, bitnum, int_mode, + bitregion_start, bitregion_end)) { /* Storing of a full word can be done with a simple store. We know here that the field can be accessed with one single instruction. For targets that support unaligned memory, an unaligned access may be necessary. */ - if (bitsize == GET_MODE_BITSIZE (fieldmode)) + if (bitsize == GET_MODE_BITSIZE (int_mode)) { - str_rtx = adjust_bitfield_address (str_rtx, fieldmode, + str_rtx = adjust_bitfield_address (str_rtx, int_mode, bitnum / BITS_PER_UNIT); if (reverse) - value = flip_storage_order (fieldmode, value); + value = flip_storage_order (int_mode, value); gcc_assert (bitnum % BITS_PER_UNIT == 0); emit_move_insn (str_rtx, value); } @@ -1076,12 +1073,12 @@ store_bit_field (rtx str_rtx, unsigned H { rtx temp; - str_rtx = narrow_bit_field_mem (str_rtx, fieldmode, bitsize, bitnum, + str_rtx = narrow_bit_field_mem (str_rtx, int_mode, bitsize, bitnum, &bitnum); - gcc_assert (bitnum + bitsize <= GET_MODE_BITSIZE (fieldmode)); + gcc_assert (bitnum + bitsize <= GET_MODE_BITSIZE (int_mode)); temp = copy_to_reg (str_rtx); if (!store_bit_field_1 (temp, bitsize, bitnum, 0, 0, - fieldmode, value, reverse, true)) + int_mode, value, reverse, true)) gcc_unreachable (); emit_move_insn (str_rtx, temp); @@ -1899,25 +1896,27 @@ extract_bit_field (rtx str_rtx, unsigned else mode1 = tmode; - if (strict_volatile_bitfield_p (str_rtx, bitsize, bitnum, mode1, 0, 0)) + scalar_int_mode int_mode; + if (is_a (mode1, &int_mode) + && strict_volatile_bitfield_p (str_rtx, bitsize, bitnum, int_mode, 0, 0)) { - /* Extraction of a full MODE1 value can be done with a simple load. + /* Extraction of a full INT_MODE value can be done with a simple load. We know here that the field can be accessed with one single instruction. For targets that support unaligned memory, an unaligned access may be necessary. */ - if (bitsize == GET_MODE_BITSIZE (mode1)) + if (bitsize == GET_MODE_BITSIZE (int_mode)) { - rtx result = adjust_bitfield_address (str_rtx, mode1, + rtx result = adjust_bitfield_address (str_rtx, int_mode, bitnum / BITS_PER_UNIT); if (reverse) - result = flip_storage_order (mode1, result); + result = flip_storage_order (int_mode, result); gcc_assert (bitnum % BITS_PER_UNIT == 0); return convert_extracted_bit_field (result, mode, tmode, unsignedp); } - str_rtx = narrow_bit_field_mem (str_rtx, mode1, bitsize, bitnum, + str_rtx = narrow_bit_field_mem (str_rtx, int_mode, bitsize, bitnum, &bitnum); - gcc_assert (bitnum + bitsize <= GET_MODE_BITSIZE (mode1)); + gcc_assert (bitnum + bitsize <= GET_MODE_BITSIZE (int_mode)); str_rtx = copy_to_reg (str_rtx); }