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[92.40.249.184]) by smtp.gmail.com with ESMTPSA id t125sm4956677wmt.20.2017.07.13.01.54.08 for (version=TLS1_2 cipher=ECDHE-RSA-CHACHA20-POLY1305 bits=256/256); Thu, 13 Jul 2017 01:54:08 -0700 (PDT) From: Richard Sandiford To: gcc-patches@gcc.gnu.org Mail-Followup-To: gcc-patches@gcc.gnu.org, richard.sandiford@linaro.org Subject: [44/77] Make simplify_and_const_int take a scalar_int_mode References: <8760ewohsv.fsf@linaro.org> Date: Thu, 13 Jul 2017 09:54:06 +0100 In-Reply-To: <8760ewohsv.fsf@linaro.org> (Richard Sandiford's message of "Thu, 13 Jul 2017 09:35:44 +0100") Message-ID: <87vamwg1jl.fsf@linaro.org> User-Agent: Gnus/5.13 (Gnus v5.13) Emacs/25.2 (gnu/linux) MIME-Version: 1.0 After previous patches, top-level calls to simplify_and_const_int always pass a scalar_int_mode. The only call site that needs to be updated is the recursive one in simplify_and_const_int_1, at which point we know "varop" has a scalar integer mode. 2017-07-13 Richard Sandiford Alan Hayward David Sherwood gcc/ * combine.c (simplify_and_const_int): Change the type of the mode parameter to scalar_int_mode. (simplify_and_const_int_1): Likewise. Update recursive call. Index: gcc/combine.c =================================================================== --- gcc/combine.c 2017-07-13 09:18:43.379419324 +0100 +++ gcc/combine.c 2017-07-13 09:18:43.779386786 +0100 @@ -459,9 +459,9 @@ static int rtx_equal_for_field_assignmen static rtx make_field_assignment (rtx); static rtx apply_distributive_law (rtx); static rtx distribute_and_simplify_rtx (rtx, int); -static rtx simplify_and_const_int_1 (machine_mode, rtx, +static rtx simplify_and_const_int_1 (scalar_int_mode, rtx, unsigned HOST_WIDE_INT); -static rtx simplify_and_const_int (rtx, machine_mode, rtx, +static rtx simplify_and_const_int (rtx, scalar_int_mode, rtx, unsigned HOST_WIDE_INT); static int merge_outer_ops (enum rtx_code *, HOST_WIDE_INT *, enum rtx_code, HOST_WIDE_INT, machine_mode, int *); @@ -9927,7 +9927,7 @@ distribute_and_simplify_rtx (rtx x, int (const_int CONSTOP)). Otherwise, return NULL_RTX. */ static rtx -simplify_and_const_int_1 (machine_mode mode, rtx varop, +simplify_and_const_int_1 (scalar_int_mode mode, rtx varop, unsigned HOST_WIDE_INT constop) { unsigned HOST_WIDE_INT nonzero; @@ -9987,19 +9987,20 @@ simplify_and_const_int_1 (machine_mode m won't match a pattern either with or without this. */ if (GET_CODE (varop) == IOR || GET_CODE (varop) == XOR) - return - gen_lowpart - (mode, - apply_distributive_law - (simplify_gen_binary (GET_CODE (varop), GET_MODE (varop), - simplify_and_const_int (NULL_RTX, - GET_MODE (varop), - XEXP (varop, 0), - constop), - simplify_and_const_int (NULL_RTX, - GET_MODE (varop), - XEXP (varop, 1), - constop)))); + { + scalar_int_mode varop_mode = as_a (GET_MODE (varop)); + return + gen_lowpart + (mode, + apply_distributive_law + (simplify_gen_binary (GET_CODE (varop), varop_mode, + simplify_and_const_int (NULL_RTX, varop_mode, + XEXP (varop, 0), + constop), + simplify_and_const_int (NULL_RTX, varop_mode, + XEXP (varop, 1), + constop)))); + } /* If VAROP is PLUS, and the constant is a mask of low bits, distribute the AND and see if one of the operands simplifies to zero. If so, we @@ -10042,7 +10043,7 @@ simplify_and_const_int_1 (machine_mode m X is zero, we are to always construct the equivalent form. */ static rtx -simplify_and_const_int (rtx x, machine_mode mode, rtx varop, +simplify_and_const_int (rtx x, scalar_int_mode mode, rtx varop, unsigned HOST_WIDE_INT constop) { rtx tem = simplify_and_const_int_1 (mode, varop, constop);